clk: qcom: Add regmap mux-div clocks support
Add support for hardware that can switch both parent clock and divider
at the same time. This avoids generating intermediate frequencies from
either the old parent clock and new divider or new parent clock and
old divider combinations.
Signed-off-by: Georgi Djakov <[email protected]>
Tested-by: Amit Kucheria <[email protected]>
[[email protected]: Change a comment style, drop parent_map in
favor of a u32 array instead, export symbols for clk_ops and mux
function]
Signed-off-by: Stephen Boyd <[email protected]>
3 files changed