ARM: davinci: aintc: drop the 00 prefix from register offsets
Since no offset goes past 0xff - let's drop the 00 prefix for better
readability. While we're at it: convert all hex numbers to lower-case.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Signed-off-by: Sekhar Nori <[email protected]>
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 2eb3d9b..2df91fc 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -19,17 +19,17 @@
#include "irqs.h"
-#define DAVINCI_AINTC_FIQ_REG0 0x0000
-#define DAVINCI_AINTC_FIQ_REG1 0x0004
-#define DAVINCI_AINTC_IRQ_REG0 0x0008
-#define DAVINCI_AINTC_IRQ_REG1 0x000C
-#define DAVINCI_AINTC_IRQ_IRQENTRY 0x0014
-#define DAVINCI_AINTC_IRQ_ENT_REG0 0x0018
-#define DAVINCI_AINTC_IRQ_ENT_REG1 0x001C
-#define DAVINCI_AINTC_IRQ_INCTL_REG 0x0020
-#define DAVINCI_AINTC_IRQ_EABASE_REG 0x0024
-#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x0030
-#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x004C
+#define DAVINCI_AINTC_FIQ_REG0 0x00
+#define DAVINCI_AINTC_FIQ_REG1 0x04
+#define DAVINCI_AINTC_IRQ_REG0 0x08
+#define DAVINCI_AINTC_IRQ_REG1 0x0c
+#define DAVINCI_AINTC_IRQ_IRQENTRY 0x14
+#define DAVINCI_AINTC_IRQ_ENT_REG0 0x18
+#define DAVINCI_AINTC_IRQ_ENT_REG1 0x1c
+#define DAVINCI_AINTC_IRQ_INCTL_REG 0x20
+#define DAVINCI_AINTC_IRQ_EABASE_REG 0x24
+#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x30
+#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x4c
static void __iomem *davinci_aintc_base;
static struct irq_domain *davinci_aintc_irq_domain;
