ARM: at91: fix PM initialization for newer SoCs
Newer SoCs: at91sam9x5, at91sam9n12, sama5d3 and sama5d4 embed a DDR controller
and have a different PMC status register layout than the at91sam9g45. Create
another at91_sam9x5_pm_init() function to match this compatibility.
Signed-off-by: Nicolas Ferre <[email protected]>
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 81f2f12..87c1fd8 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -306,3 +306,10 @@
at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
return at91_pm_init();
}
+
+void __init at91_sam9x5_pm_init(void)
+{
+ at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
+ at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
+ return at91_pm_init();
+}
