| commit | eb299e4d5708c1d95779997b3268aac1a1854bbf | [log] [tgz] |
|---|---|---|
| author | A.s. Dong <[email protected]> | Wed Nov 14 13:01:56 2018 +0000 |
| committer | Stephen Boyd <[email protected]> | Mon Dec 03 11:31:36 2018 -0800 |
| tree | aea0b21f81ffdce9897cfa2b5e4a62612e7b5f4d | |
| parent | 76a323c19a1626b64ac69dbe5e187304ec58a6ca [diff] |
dt-bindings: clock: add imx7ulp clock binding doc i.MX7ULP Clock functions are under joint control of the System Clock Generation (SCG) modules, Peripheral Clock Control (PCC) modules, and Core Mode Controller (CMC)1 blocks Note IMX7ULP has two clock domains: M4 and A7. This binding doc is only for A7 clock domain. Cc: Rob Herring <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Stephen Boyd <[email protected]> Cc: Michael Turquette <[email protected]> Cc: Shawn Guo <[email protected]> Cc: Anson Huang <[email protected]> Cc: Bai Ping <[email protected]> Signed-off-by: Dong Aisheng <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>