commit 16d17fdb8ee6b25c501b1d32a74cf187455fe3d7
author bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Mon Jan 05 00:05:50 2004 +0000
committer bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Mon Jan 05 00:05:50 2004 +0000
tree df67ac06968fdf673e635f328c2f3119cc478abf
parent 4487d0ac49322ddbbd4ede838c0e13a128380606

debug fixes


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@542 c046a42c-6fe2-441c-8c8c-71466251a162

hw/dma.c

diff --git a/hw/dma.c b/hw/dma.c
index ac85efb..a1e77f5 100644
--- a/hw/dma.c
+++ b/hw/dma.c
@@ -25,8 +25,8 @@
 #include <stdlib.h>
 #include <inttypes.h>
 
-#include "vl.h"
 #include "cpu.h"
+#include "vl.h"
 
 #define log(...) fprintf (stderr, "dma: " __VA_ARGS__)
 #ifdef DEBUG_DMA
@@ -79,7 +79,7 @@
 
 };
 
-static void write_page (struct CPUX86State *env, uint32_t nport, uint32_t data)
+static void write_page (CPUState *env, uint32_t nport, uint32_t data)
 {
     int ichan;
     int ncont;
@@ -114,7 +114,7 @@
     return ff;
 }
 
-static uint32_t read_chan (struct CPUX86State *env, uint32_t nport)
+static uint32_t read_chan (CPUState *env, uint32_t nport)
 {
     int ff;
     int ncont, ichan, nreg;
@@ -160,17 +160,17 @@
         }
     }
 }
-static void write_chanb (struct CPUX86State *env, uint32_t nport, uint32_t data)
+static void write_chanb (CPUState *env, uint32_t nport, uint32_t data)
 {
     write_chan (nport, 1, data);
 }
 
-static void write_chanw (struct CPUX86State *env, uint32_t nport, uint32_t data)
+static void write_chanw (CPUState *env, uint32_t nport, uint32_t data)
 {
     write_chan (nport, 2, data);
 }
 
-static void write_cont (struct CPUX86State *env, uint32_t nport, uint32_t data)
+static void write_cont (CPUState *env, uint32_t nport, uint32_t data)
 {
     int iport, ichan, ncont;
     struct dma_cont *d;
@@ -215,17 +215,17 @@
 
     case 0xb:                   /* mode */
         {
-#ifdef DMA_DEBUG
+            ichan = data & 3;
+#ifdef DEBUG_DMA
             int op;
             int ai;
             int dir;
             int opmode;
 
-            ichan = val & 3;
-            op = (val >> 2) & 3;
-            ai = (val >> 4) & 1;
-            dir = (val >> 5) & 1;
-            opmode = (val >> 6) & 3;
+            op = (data >> 2) & 3;
+            ai = (data >> 4) & 1;
+            dir = (data >> 5) & 1;
+            opmode = (data >> 6) & 3;
 
             linfo ("ichan %d, op %d, ai %d, dir %d, opmode %d\n",
                    ichan, op, ai, dir, opmode);
@@ -259,7 +259,7 @@
         goto error;
     }
 
-#ifdef DMA_DEBUG
+#ifdef DEBUG_DMA
     if (0xc != iport) {
         linfo ("nport %#06x, ncont %d, ichan % 2d, val %#06x\n",
                nport, d != dma_controllers, ichan, data);