commit b6a71ef7e01bcac7aeb47d8de4082704fbc6479c
author Jia Liu <proljc@gmail.com> Fri Jul 20 15:50:41 2012 +0800
committer Blue Swirl <blauwirbel@gmail.com> Fri Jul 27 21:12:57 2012 +0000
tree 3ae466a65ec1083a2575b5d3cbb92139e9b98742
parent 726fe04572093504e7bf4ea56e0b2de559063787

target-or32: Add interrupt support

Add OpenRISC interrupt support.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

cpu-exec.c

diff --git a/cpu-exec.c b/cpu-exec.c
index bc47114..543460c 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -388,6 +388,23 @@
                         do_interrupt(env);
                         next_tb = 0;
                     }
+#elif defined(TARGET_OPENRISC)
+                    {
+                        int idx = -1;
+                        if ((interrupt_request & CPU_INTERRUPT_HARD)
+                            && (env->sr & SR_IEE)) {
+                            idx = EXCP_INT;
+                        }
+                        if ((interrupt_request & CPU_INTERRUPT_TIMER)
+                            && (env->sr & SR_TEE)) {
+                            idx = EXCP_TICK;
+                        }
+                        if (idx >= 0) {
+                            env->exception_index = idx;
+                            do_interrupt(env);
+                            next_tb = 0;
+                        }
+                    }
 #elif defined(TARGET_SPARC)
                     if (interrupt_request & CPU_INTERRUPT_HARD) {
                         if (cpu_interrupts_enabled(env) &&