// Copyright 2015, VIXL authors
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
//   * Redistributions of source code must retain the above copyright notice,
//     this list of conditions and the following disclaimer.
//   * Redistributions in binary form must reproduce the above copyright notice,
//     this list of conditions and the following disclaimer in the documentation
//     and/or other materials provided with the distribution.
//   * Neither the name of ARM Limited nor the names of its contributors may be
//     used to endorse or promote products derived from this software without
//     specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


// ---------------------------------------------------------------------
// This file is auto generated using tools/generate_simulator_traces.py.
//
// PLEASE DO NOT EDIT.
// ---------------------------------------------------------------------

#ifndef VIXL_ASSEMBLER_COND_DT_DRT_DRD_DRN_DRM_FLOAT_F32_ONLY_VCGE_T32_H_
#define VIXL_ASSEMBLER_COND_DT_DRT_DRD_DRN_DRM_FLOAT_F32_ONLY_VCGE_T32_H_

const byte kInstruction_vcge_F32_d1_d2_d30[] = {
  0x02, 0xff, 0x2e, 0x1e // vcge F32 d1 d2 d30
};
const byte kInstruction_vcge_F32_d12_d5_d13[] = {
  0x05, 0xff, 0x0d, 0xce // vcge F32 d12 d5 d13
};
const byte kInstruction_vcge_F32_d3_d16_d2[] = {
  0x00, 0xff, 0x82, 0x3e // vcge F32 d3 d16 d2
};
const byte kInstruction_vcge_F32_d21_d26_d7[] = {
  0x4a, 0xff, 0x87, 0x5e // vcge F32 d21 d26 d7
};
const byte kInstruction_vcge_F32_d30_d1_d16[] = {
  0x41, 0xff, 0x20, 0xee // vcge F32 d30 d1 d16
};
const byte kInstruction_vcge_F32_d17_d8_d6[] = {
  0x48, 0xff, 0x06, 0x1e // vcge F32 d17 d8 d6
};
const byte kInstruction_vcge_F32_d26_d1_d7[] = {
  0x41, 0xff, 0x07, 0xae // vcge F32 d26 d1 d7
};
const byte kInstruction_vcge_F32_d17_d6_d28[] = {
  0x46, 0xff, 0x2c, 0x1e // vcge F32 d17 d6 d28
};
const byte kInstruction_vcge_F32_d30_d6_d27[] = {
  0x46, 0xff, 0x2b, 0xee // vcge F32 d30 d6 d27
};
const byte kInstruction_vcge_F32_d6_d13_d11[] = {
  0x0d, 0xff, 0x0b, 0x6e // vcge F32 d6 d13 d11
};
const byte kInstruction_vcge_F32_d30_d17_d15[] = {
  0x41, 0xff, 0x8f, 0xee // vcge F32 d30 d17 d15
};
const byte kInstruction_vcge_F32_d10_d8_d14[] = {
  0x08, 0xff, 0x0e, 0xae // vcge F32 d10 d8 d14
};
const byte kInstruction_vcge_F32_d17_d4_d0[] = {
  0x44, 0xff, 0x00, 0x1e // vcge F32 d17 d4 d0
};
const byte kInstruction_vcge_F32_d25_d5_d14[] = {
  0x45, 0xff, 0x0e, 0x9e // vcge F32 d25 d5 d14
};
const byte kInstruction_vcge_F32_d30_d16_d0[] = {
  0x40, 0xff, 0x80, 0xee // vcge F32 d30 d16 d0
};
const byte kInstruction_vcge_F32_d22_d21_d2[] = {
  0x45, 0xff, 0x82, 0x6e // vcge F32 d22 d21 d2
};
const byte kInstruction_vcge_F32_d15_d10_d12[] = {
  0x0a, 0xff, 0x0c, 0xfe // vcge F32 d15 d10 d12
};
const byte kInstruction_vcge_F32_d6_d26_d20[] = {
  0x0a, 0xff, 0xa4, 0x6e // vcge F32 d6 d26 d20
};
const byte kInstruction_vcge_F32_d2_d7_d6[] = {
  0x07, 0xff, 0x06, 0x2e // vcge F32 d2 d7 d6
};
const byte kInstruction_vcge_F32_d27_d13_d30[] = {
  0x4d, 0xff, 0x2e, 0xbe // vcge F32 d27 d13 d30
};
const byte kInstruction_vcge_F32_d6_d12_d13[] = {
  0x0c, 0xff, 0x0d, 0x6e // vcge F32 d6 d12 d13
};
const byte kInstruction_vcge_F32_d6_d17_d17[] = {
  0x01, 0xff, 0xa1, 0x6e // vcge F32 d6 d17 d17
};
const byte kInstruction_vcge_F32_d18_d7_d6[] = {
  0x47, 0xff, 0x06, 0x2e // vcge F32 d18 d7 d6
};
const byte kInstruction_vcge_F32_d24_d18_d8[] = {
  0x42, 0xff, 0x88, 0x8e // vcge F32 d24 d18 d8
};
const byte kInstruction_vcge_F32_d27_d3_d3[] = {
  0x43, 0xff, 0x03, 0xbe // vcge F32 d27 d3 d3
};
const byte kInstruction_vcge_F32_d20_d12_d4[] = {
  0x4c, 0xff, 0x04, 0x4e // vcge F32 d20 d12 d4
};
const byte kInstruction_vcge_F32_d16_d23_d26[] = {
  0x47, 0xff, 0xaa, 0x0e // vcge F32 d16 d23 d26
};
const byte kInstruction_vcge_F32_d14_d24_d11[] = {
  0x08, 0xff, 0x8b, 0xee // vcge F32 d14 d24 d11
};
const byte kInstruction_vcge_F32_d14_d29_d28[] = {
  0x0d, 0xff, 0xac, 0xee // vcge F32 d14 d29 d28
};
const byte kInstruction_vcge_F32_d20_d16_d11[] = {
  0x40, 0xff, 0x8b, 0x4e // vcge F32 d20 d16 d11
};
const byte kInstruction_vcge_F32_d28_d21_d9[] = {
  0x45, 0xff, 0x89, 0xce // vcge F32 d28 d21 d9
};
const byte kInstruction_vcge_F32_d0_d11_d1[] = {
  0x0b, 0xff, 0x01, 0x0e // vcge F32 d0 d11 d1
};
const byte kInstruction_vcge_F32_d19_d10_d4[] = {
  0x4a, 0xff, 0x04, 0x3e // vcge F32 d19 d10 d4
};
const byte kInstruction_vcge_F32_d19_d28_d20[] = {
  0x4c, 0xff, 0xa4, 0x3e // vcge F32 d19 d28 d20
};
const byte kInstruction_vcge_F32_d16_d15_d6[] = {
  0x4f, 0xff, 0x06, 0x0e // vcge F32 d16 d15 d6
};
const byte kInstruction_vcge_F32_d12_d15_d2[] = {
  0x0f, 0xff, 0x02, 0xce // vcge F32 d12 d15 d2
};
const byte kInstruction_vcge_F32_d0_d31_d2[] = {
  0x0f, 0xff, 0x82, 0x0e // vcge F32 d0 d31 d2
};
const byte kInstruction_vcge_F32_d6_d22_d19[] = {
  0x06, 0xff, 0xa3, 0x6e // vcge F32 d6 d22 d19
};
const byte kInstruction_vcge_F32_d26_d30_d0[] = {
  0x4e, 0xff, 0x80, 0xae // vcge F32 d26 d30 d0
};
const byte kInstruction_vcge_F32_d5_d19_d18[] = {
  0x03, 0xff, 0xa2, 0x5e // vcge F32 d5 d19 d18
};
const byte kInstruction_vcge_F32_d7_d3_d3[] = {
  0x03, 0xff, 0x03, 0x7e // vcge F32 d7 d3 d3
};
const byte kInstruction_vcge_F32_d17_d7_d20[] = {
  0x47, 0xff, 0x24, 0x1e // vcge F32 d17 d7 d20
};
const byte kInstruction_vcge_F32_d29_d30_d24[] = {
  0x4e, 0xff, 0xa8, 0xde // vcge F32 d29 d30 d24
};
const byte kInstruction_vcge_F32_d26_d4_d30[] = {
  0x44, 0xff, 0x2e, 0xae // vcge F32 d26 d4 d30
};
const byte kInstruction_vcge_F32_d30_d27_d9[] = {
  0x4b, 0xff, 0x89, 0xee // vcge F32 d30 d27 d9
};
const byte kInstruction_vcge_F32_d6_d24_d17[] = {
  0x08, 0xff, 0xa1, 0x6e // vcge F32 d6 d24 d17
};
const byte kInstruction_vcge_F32_d16_d21_d20[] = {
  0x45, 0xff, 0xa4, 0x0e // vcge F32 d16 d21 d20
};
const byte kInstruction_vcge_F32_d6_d1_d12[] = {
  0x01, 0xff, 0x0c, 0x6e // vcge F32 d6 d1 d12
};
const byte kInstruction_vcge_F32_d2_d26_d18[] = {
  0x0a, 0xff, 0xa2, 0x2e // vcge F32 d2 d26 d18
};
const byte kInstruction_vcge_F32_d21_d31_d7[] = {
  0x4f, 0xff, 0x87, 0x5e // vcge F32 d21 d31 d7
};
const byte kInstruction_vcge_F32_d8_d18_d17[] = {
  0x02, 0xff, 0xa1, 0x8e // vcge F32 d8 d18 d17
};
const byte kInstruction_vcge_F32_d18_d11_d8[] = {
  0x4b, 0xff, 0x08, 0x2e // vcge F32 d18 d11 d8
};
const byte kInstruction_vcge_F32_d25_d14_d5[] = {
  0x4e, 0xff, 0x05, 0x9e // vcge F32 d25 d14 d5
};
const byte kInstruction_vcge_F32_d0_d9_d5[] = {
  0x09, 0xff, 0x05, 0x0e // vcge F32 d0 d9 d5
};
const byte kInstruction_vcge_F32_d14_d12_d7[] = {
  0x0c, 0xff, 0x07, 0xee // vcge F32 d14 d12 d7
};
const byte kInstruction_vcge_F32_d23_d0_d22[] = {
  0x40, 0xff, 0x26, 0x7e // vcge F32 d23 d0 d22
};
const byte kInstruction_vcge_F32_d23_d31_d10[] = {
  0x4f, 0xff, 0x8a, 0x7e // vcge F32 d23 d31 d10
};
const byte kInstruction_vcge_F32_d3_d19_d28[] = {
  0x03, 0xff, 0xac, 0x3e // vcge F32 d3 d19 d28
};
const byte kInstruction_vcge_F32_d9_d26_d15[] = {
  0x0a, 0xff, 0x8f, 0x9e // vcge F32 d9 d26 d15
};
const byte kInstruction_vcge_F32_d17_d13_d26[] = {
  0x4d, 0xff, 0x2a, 0x1e // vcge F32 d17 d13 d26
};
const byte kInstruction_vcge_F32_d2_d26_d5[] = {
  0x0a, 0xff, 0x85, 0x2e // vcge F32 d2 d26 d5
};
const byte kInstruction_vcge_F32_d18_d28_d11[] = {
  0x4c, 0xff, 0x8b, 0x2e // vcge F32 d18 d28 d11
};
const byte kInstruction_vcge_F32_d20_d10_d2[] = {
  0x4a, 0xff, 0x02, 0x4e // vcge F32 d20 d10 d2
};
const byte kInstruction_vcge_F32_d19_d3_d9[] = {
  0x43, 0xff, 0x09, 0x3e // vcge F32 d19 d3 d9
};
const byte kInstruction_vcge_F32_d4_d29_d17[] = {
  0x0d, 0xff, 0xa1, 0x4e // vcge F32 d4 d29 d17
};
const byte kInstruction_vcge_F32_d22_d1_d31[] = {
  0x41, 0xff, 0x2f, 0x6e // vcge F32 d22 d1 d31
};
const byte kInstruction_vcge_F32_d29_d2_d17[] = {
  0x42, 0xff, 0x21, 0xde // vcge F32 d29 d2 d17
};
const byte kInstruction_vcge_F32_d18_d8_d10[] = {
  0x48, 0xff, 0x0a, 0x2e // vcge F32 d18 d8 d10
};
const byte kInstruction_vcge_F32_d16_d8_d22[] = {
  0x48, 0xff, 0x26, 0x0e // vcge F32 d16 d8 d22
};
const byte kInstruction_vcge_F32_d0_d27_d19[] = {
  0x0b, 0xff, 0xa3, 0x0e // vcge F32 d0 d27 d19
};
const byte kInstruction_vcge_F32_d26_d23_d0[] = {
  0x47, 0xff, 0x80, 0xae // vcge F32 d26 d23 d0
};
const byte kInstruction_vcge_F32_d30_d21_d22[] = {
  0x45, 0xff, 0xa6, 0xee // vcge F32 d30 d21 d22
};
const byte kInstruction_vcge_F32_d31_d31_d8[] = {
  0x4f, 0xff, 0x88, 0xfe // vcge F32 d31 d31 d8
};
const byte kInstruction_vcge_F32_d4_d7_d2[] = {
  0x07, 0xff, 0x02, 0x4e // vcge F32 d4 d7 d2
};
const byte kInstruction_vcge_F32_d8_d22_d31[] = {
  0x06, 0xff, 0xaf, 0x8e // vcge F32 d8 d22 d31
};
const byte kInstruction_vcge_F32_d27_d3_d14[] = {
  0x43, 0xff, 0x0e, 0xbe // vcge F32 d27 d3 d14
};
const byte kInstruction_vcge_F32_d11_d26_d6[] = {
  0x0a, 0xff, 0x86, 0xbe // vcge F32 d11 d26 d6
};
const byte kInstruction_vcge_F32_d20_d24_d4[] = {
  0x48, 0xff, 0x84, 0x4e // vcge F32 d20 d24 d4
};
const byte kInstruction_vcge_F32_d1_d8_d3[] = {
  0x08, 0xff, 0x03, 0x1e // vcge F32 d1 d8 d3
};
const byte kInstruction_vcge_F32_d27_d17_d17[] = {
  0x41, 0xff, 0xa1, 0xbe // vcge F32 d27 d17 d17
};
const byte kInstruction_vcge_F32_d25_d21_d8[] = {
  0x45, 0xff, 0x88, 0x9e // vcge F32 d25 d21 d8
};
const byte kInstruction_vcge_F32_d6_d0_d15[] = {
  0x00, 0xff, 0x0f, 0x6e // vcge F32 d6 d0 d15
};
const byte kInstruction_vcge_F32_d4_d10_d9[] = {
  0x0a, 0xff, 0x09, 0x4e // vcge F32 d4 d10 d9
};
const byte kInstruction_vcge_F32_d13_d26_d11[] = {
  0x0a, 0xff, 0x8b, 0xde // vcge F32 d13 d26 d11
};
const byte kInstruction_vcge_F32_d7_d6_d18[] = {
  0x06, 0xff, 0x22, 0x7e // vcge F32 d7 d6 d18
};
const byte kInstruction_vcge_F32_d11_d7_d10[] = {
  0x07, 0xff, 0x0a, 0xbe // vcge F32 d11 d7 d10
};
const byte kInstruction_vcge_F32_d17_d3_d10[] = {
  0x43, 0xff, 0x0a, 0x1e // vcge F32 d17 d3 d10
};
const byte kInstruction_vcge_F32_d9_d19_d11[] = {
  0x03, 0xff, 0x8b, 0x9e // vcge F32 d9 d19 d11
};
const byte kInstruction_vcge_F32_d9_d22_d10[] = {
  0x06, 0xff, 0x8a, 0x9e // vcge F32 d9 d22 d10
};
const byte kInstruction_vcge_F32_d30_d0_d21[] = {
  0x40, 0xff, 0x25, 0xee // vcge F32 d30 d0 d21
};
const byte kInstruction_vcge_F32_d13_d1_d15[] = {
  0x01, 0xff, 0x0f, 0xde // vcge F32 d13 d1 d15
};
const byte kInstruction_vcge_F32_d27_d11_d10[] = {
  0x4b, 0xff, 0x0a, 0xbe // vcge F32 d27 d11 d10
};
const byte kInstruction_vcge_F32_d7_d26_d9[] = {
  0x0a, 0xff, 0x89, 0x7e // vcge F32 d7 d26 d9
};
const byte kInstruction_vcge_F32_d1_d12_d21[] = {
  0x0c, 0xff, 0x25, 0x1e // vcge F32 d1 d12 d21
};
const byte kInstruction_vcge_F32_d26_d28_d30[] = {
  0x4c, 0xff, 0xae, 0xae // vcge F32 d26 d28 d30
};
const byte kInstruction_vcge_F32_d31_d14_d5[] = {
  0x4e, 0xff, 0x05, 0xfe // vcge F32 d31 d14 d5
};
const byte kInstruction_vcge_F32_d29_d12_d7[] = {
  0x4c, 0xff, 0x07, 0xde // vcge F32 d29 d12 d7
};
const byte kInstruction_vcge_F32_d19_d30_d1[] = {
  0x4e, 0xff, 0x81, 0x3e // vcge F32 d19 d30 d1
};
const byte kInstruction_vcge_F32_d4_d1_d26[] = {
  0x01, 0xff, 0x2a, 0x4e // vcge F32 d4 d1 d26
};
const byte kInstruction_vcge_F32_d2_d13_d10[] = {
  0x0d, 0xff, 0x0a, 0x2e // vcge F32 d2 d13 d10
};
const TestResult kReferencevcge[] = {
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d1_d2_d30),
    kInstruction_vcge_F32_d1_d2_d30,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d12_d5_d13),
    kInstruction_vcge_F32_d12_d5_d13,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d3_d16_d2),
    kInstruction_vcge_F32_d3_d16_d2,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d21_d26_d7),
    kInstruction_vcge_F32_d21_d26_d7,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d30_d1_d16),
    kInstruction_vcge_F32_d30_d1_d16,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d17_d8_d6),
    kInstruction_vcge_F32_d17_d8_d6,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d26_d1_d7),
    kInstruction_vcge_F32_d26_d1_d7,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d17_d6_d28),
    kInstruction_vcge_F32_d17_d6_d28,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d30_d6_d27),
    kInstruction_vcge_F32_d30_d6_d27,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d6_d13_d11),
    kInstruction_vcge_F32_d6_d13_d11,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d30_d17_d15),
    kInstruction_vcge_F32_d30_d17_d15,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d10_d8_d14),
    kInstruction_vcge_F32_d10_d8_d14,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d17_d4_d0),
    kInstruction_vcge_F32_d17_d4_d0,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d25_d5_d14),
    kInstruction_vcge_F32_d25_d5_d14,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d30_d16_d0),
    kInstruction_vcge_F32_d30_d16_d0,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d22_d21_d2),
    kInstruction_vcge_F32_d22_d21_d2,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d15_d10_d12),
    kInstruction_vcge_F32_d15_d10_d12,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d6_d26_d20),
    kInstruction_vcge_F32_d6_d26_d20,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d2_d7_d6),
    kInstruction_vcge_F32_d2_d7_d6,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d27_d13_d30),
    kInstruction_vcge_F32_d27_d13_d30,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d6_d12_d13),
    kInstruction_vcge_F32_d6_d12_d13,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d6_d17_d17),
    kInstruction_vcge_F32_d6_d17_d17,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d18_d7_d6),
    kInstruction_vcge_F32_d18_d7_d6,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d24_d18_d8),
    kInstruction_vcge_F32_d24_d18_d8,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d27_d3_d3),
    kInstruction_vcge_F32_d27_d3_d3,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d20_d12_d4),
    kInstruction_vcge_F32_d20_d12_d4,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d16_d23_d26),
    kInstruction_vcge_F32_d16_d23_d26,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d14_d24_d11),
    kInstruction_vcge_F32_d14_d24_d11,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d14_d29_d28),
    kInstruction_vcge_F32_d14_d29_d28,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d20_d16_d11),
    kInstruction_vcge_F32_d20_d16_d11,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d28_d21_d9),
    kInstruction_vcge_F32_d28_d21_d9,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d0_d11_d1),
    kInstruction_vcge_F32_d0_d11_d1,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d19_d10_d4),
    kInstruction_vcge_F32_d19_d10_d4,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d19_d28_d20),
    kInstruction_vcge_F32_d19_d28_d20,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d16_d15_d6),
    kInstruction_vcge_F32_d16_d15_d6,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d12_d15_d2),
    kInstruction_vcge_F32_d12_d15_d2,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d0_d31_d2),
    kInstruction_vcge_F32_d0_d31_d2,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d6_d22_d19),
    kInstruction_vcge_F32_d6_d22_d19,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d26_d30_d0),
    kInstruction_vcge_F32_d26_d30_d0,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d5_d19_d18),
    kInstruction_vcge_F32_d5_d19_d18,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d7_d3_d3),
    kInstruction_vcge_F32_d7_d3_d3,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d17_d7_d20),
    kInstruction_vcge_F32_d17_d7_d20,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d29_d30_d24),
    kInstruction_vcge_F32_d29_d30_d24,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d26_d4_d30),
    kInstruction_vcge_F32_d26_d4_d30,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d30_d27_d9),
    kInstruction_vcge_F32_d30_d27_d9,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d6_d24_d17),
    kInstruction_vcge_F32_d6_d24_d17,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d16_d21_d20),
    kInstruction_vcge_F32_d16_d21_d20,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d6_d1_d12),
    kInstruction_vcge_F32_d6_d1_d12,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d2_d26_d18),
    kInstruction_vcge_F32_d2_d26_d18,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d21_d31_d7),
    kInstruction_vcge_F32_d21_d31_d7,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d8_d18_d17),
    kInstruction_vcge_F32_d8_d18_d17,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d18_d11_d8),
    kInstruction_vcge_F32_d18_d11_d8,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d25_d14_d5),
    kInstruction_vcge_F32_d25_d14_d5,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d0_d9_d5),
    kInstruction_vcge_F32_d0_d9_d5,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d14_d12_d7),
    kInstruction_vcge_F32_d14_d12_d7,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d23_d0_d22),
    kInstruction_vcge_F32_d23_d0_d22,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d23_d31_d10),
    kInstruction_vcge_F32_d23_d31_d10,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d3_d19_d28),
    kInstruction_vcge_F32_d3_d19_d28,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d9_d26_d15),
    kInstruction_vcge_F32_d9_d26_d15,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d17_d13_d26),
    kInstruction_vcge_F32_d17_d13_d26,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d2_d26_d5),
    kInstruction_vcge_F32_d2_d26_d5,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d18_d28_d11),
    kInstruction_vcge_F32_d18_d28_d11,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d20_d10_d2),
    kInstruction_vcge_F32_d20_d10_d2,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d19_d3_d9),
    kInstruction_vcge_F32_d19_d3_d9,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d4_d29_d17),
    kInstruction_vcge_F32_d4_d29_d17,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d22_d1_d31),
    kInstruction_vcge_F32_d22_d1_d31,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d29_d2_d17),
    kInstruction_vcge_F32_d29_d2_d17,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d18_d8_d10),
    kInstruction_vcge_F32_d18_d8_d10,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d16_d8_d22),
    kInstruction_vcge_F32_d16_d8_d22,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d0_d27_d19),
    kInstruction_vcge_F32_d0_d27_d19,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d26_d23_d0),
    kInstruction_vcge_F32_d26_d23_d0,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d30_d21_d22),
    kInstruction_vcge_F32_d30_d21_d22,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d31_d31_d8),
    kInstruction_vcge_F32_d31_d31_d8,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d4_d7_d2),
    kInstruction_vcge_F32_d4_d7_d2,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d8_d22_d31),
    kInstruction_vcge_F32_d8_d22_d31,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d27_d3_d14),
    kInstruction_vcge_F32_d27_d3_d14,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d11_d26_d6),
    kInstruction_vcge_F32_d11_d26_d6,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d20_d24_d4),
    kInstruction_vcge_F32_d20_d24_d4,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d1_d8_d3),
    kInstruction_vcge_F32_d1_d8_d3,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d27_d17_d17),
    kInstruction_vcge_F32_d27_d17_d17,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d25_d21_d8),
    kInstruction_vcge_F32_d25_d21_d8,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d6_d0_d15),
    kInstruction_vcge_F32_d6_d0_d15,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d4_d10_d9),
    kInstruction_vcge_F32_d4_d10_d9,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d13_d26_d11),
    kInstruction_vcge_F32_d13_d26_d11,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d7_d6_d18),
    kInstruction_vcge_F32_d7_d6_d18,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d11_d7_d10),
    kInstruction_vcge_F32_d11_d7_d10,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d17_d3_d10),
    kInstruction_vcge_F32_d17_d3_d10,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d9_d19_d11),
    kInstruction_vcge_F32_d9_d19_d11,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d9_d22_d10),
    kInstruction_vcge_F32_d9_d22_d10,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d30_d0_d21),
    kInstruction_vcge_F32_d30_d0_d21,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d13_d1_d15),
    kInstruction_vcge_F32_d13_d1_d15,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d27_d11_d10),
    kInstruction_vcge_F32_d27_d11_d10,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d7_d26_d9),
    kInstruction_vcge_F32_d7_d26_d9,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d1_d12_d21),
    kInstruction_vcge_F32_d1_d12_d21,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d26_d28_d30),
    kInstruction_vcge_F32_d26_d28_d30,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d31_d14_d5),
    kInstruction_vcge_F32_d31_d14_d5,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d29_d12_d7),
    kInstruction_vcge_F32_d29_d12_d7,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d19_d30_d1),
    kInstruction_vcge_F32_d19_d30_d1,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d4_d1_d26),
    kInstruction_vcge_F32_d4_d1_d26,
  },
  {
    ARRAY_SIZE(kInstruction_vcge_F32_d2_d13_d10),
    kInstruction_vcge_F32_d2_d13_d10,
  },
};

#endif  // VIXL_ASSEMBLER_COND_DT_DRT_DRD_DRN_DRM_FLOAT_F32_ONLY_VCGE_T32_H_