commit 4c56e4505d7b0f66515667edd56ba49c84b63172
author Leonard Mai <leonard.mai@intel.com> Thu Oct 06 12:27:46 2011 -0700
committer Patrick Tjin <pattjin@google.com> Mon Jul 21 20:22:40 2014 -0700
tree 98c66a9a5face9656d72b579ccd24fecc0a75fbf
parent f2932284ab7ac1a0a6ff84025d2b5480eea9a796

bootstub: add cloverview support

Add cloverview support. Also bump up the version to 1.1.

Signed-off-by: Leonard D Mai <leonard.mai@intel.com>

spi-uart.c

diff --git a/spi-uart.c b/spi-uart.c
index 21448b9..7ff8323 100644
--- a/spi-uart.c
+++ b/spi-uart.c
@@ -31,13 +31,22 @@
 
 	switch (*(int *)SPI_TYPE) {
 	case 0:
-		pspi = (struct mrst_spi_reg *)MRST_REGBASE_SPI0;
+		if (mrst_identify_cpu() == MRST_CPU_CHIP_CLOVERVIEW)
+			pspi = (struct mrst_spi_reg *)CTP_REGBASE_SPI0;
+		else
+			pspi = (struct mrst_spi_reg *)MRST_REGBASE_SPI0;
 		break;
 	case 1:
-		pspi = (struct mrst_spi_reg *)MRST_REGBASE_SPI1;
+		if (mrst_identify_cpu() == MRST_CPU_CHIP_CLOVERVIEW)
+			pspi = (struct mrst_spi_reg *)CTP_REGBASE_SPI1;
+		else
+			pspi = (struct mrst_spi_reg *)MRST_REGBASE_SPI1;
 		break;
 	default:
-		pspi = (struct mrst_spi_reg *)MRST_REGBASE_SPI0;
+		if (mrst_identify_cpu() == MRST_CPU_CHIP_CLOVERVIEW)
+			pspi = (struct mrst_spi_reg *)CTP_REGBASE_SPI0;
+		else
+			pspi = (struct mrst_spi_reg *)MRST_REGBASE_SPI0;
 	}
 	/* disable SPI controller first */
 	pspi->ssienr = 0x0;