[WebAssembly] Change half-precision feature name to fp16. (#105434)
This better aligns with how the feature is being referred to and what
runtimes (V8) are calling it.
diff --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index df304a7..034d32c 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -135,10 +135,10 @@
TARGET_BUILTIN(__builtin_wasm_max_f64x2, "V2dV2dV2d", "nc", "simd128")
TARGET_BUILTIN(__builtin_wasm_pmin_f64x2, "V2dV2dV2d", "nc", "simd128")
TARGET_BUILTIN(__builtin_wasm_pmax_f64x2, "V2dV2dV2d", "nc", "simd128")
-TARGET_BUILTIN(__builtin_wasm_min_f16x8, "V8hV8hV8h", "nc", "half-precision")
-TARGET_BUILTIN(__builtin_wasm_max_f16x8, "V8hV8hV8h", "nc", "half-precision")
-TARGET_BUILTIN(__builtin_wasm_pmin_f16x8, "V8hV8hV8h", "nc", "half-precision")
-TARGET_BUILTIN(__builtin_wasm_pmax_f16x8, "V8hV8hV8h", "nc", "half-precision")
+TARGET_BUILTIN(__builtin_wasm_min_f16x8, "V8hV8hV8h", "nc", "fp16")
+TARGET_BUILTIN(__builtin_wasm_max_f16x8, "V8hV8hV8h", "nc", "fp16")
+TARGET_BUILTIN(__builtin_wasm_pmin_f16x8, "V8hV8hV8h", "nc", "fp16")
+TARGET_BUILTIN(__builtin_wasm_pmax_f16x8, "V8hV8hV8h", "nc", "fp16")
TARGET_BUILTIN(__builtin_wasm_ceil_f32x4, "V4fV4f", "nc", "simd128")
TARGET_BUILTIN(__builtin_wasm_floor_f32x4, "V4fV4f", "nc", "simd128")
@@ -170,8 +170,8 @@
TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f32x4, "V4fV4fV4fV4f", "nc", "relaxed-simd")
TARGET_BUILTIN(__builtin_wasm_relaxed_madd_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
-TARGET_BUILTIN(__builtin_wasm_relaxed_madd_f16x8, "V8hV8hV8hV8h", "nc", "half-precision")
-TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f16x8, "V8hV8hV8hV8h", "nc", "half-precision")
+TARGET_BUILTIN(__builtin_wasm_relaxed_madd_f16x8, "V8hV8hV8hV8h", "nc", "fp16")
+TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f16x8, "V8hV8hV8hV8h", "nc", "fp16")
TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i8x16, "V16ScV16ScV16ScV16Sc", "nc", "relaxed-simd")
TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i16x8, "V8sV8sV8sV8s", "nc", "relaxed-simd")
@@ -197,11 +197,11 @@
TARGET_BUILTIN(__builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4, "V4fV8UsV8UsV4f", "nc", "relaxed-simd")
// Half-Precision (fp16)
-TARGET_BUILTIN(__builtin_wasm_loadf16_f32, "fh*", "nU", "half-precision")
-TARGET_BUILTIN(__builtin_wasm_storef16_f32, "vfh*", "n", "half-precision")
-TARGET_BUILTIN(__builtin_wasm_splat_f16x8, "V8hf", "nc", "half-precision")
-TARGET_BUILTIN(__builtin_wasm_extract_lane_f16x8, "fV8hi", "nc", "half-precision")
-TARGET_BUILTIN(__builtin_wasm_replace_lane_f16x8, "V8hV8hif", "nc", "half-precision")
+TARGET_BUILTIN(__builtin_wasm_loadf16_f32, "fh*", "nU", "fp16")
+TARGET_BUILTIN(__builtin_wasm_storef16_f32, "vfh*", "n", "fp16")
+TARGET_BUILTIN(__builtin_wasm_splat_f16x8, "V8hf", "nc", "fp16")
+TARGET_BUILTIN(__builtin_wasm_extract_lane_f16x8, "fV8hi", "nc", "fp16")
+TARGET_BUILTIN(__builtin_wasm_replace_lane_f16x8, "V8hV8hif", "nc", "fp16")
// Reference Types builtins
// Some builtins are custom type-checked - see 't' as part of the third argument,
diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td
index 7a3c699..111608d 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -5033,8 +5033,8 @@
def mno_exception_handing : Flag<["-"], "mno-exception-handling">, Group<m_wasm_Features_Group>;
def mextended_const : Flag<["-"], "mextended-const">, Group<m_wasm_Features_Group>;
def mno_extended_const : Flag<["-"], "mno-extended-const">, Group<m_wasm_Features_Group>;
-def mhalf_precision : Flag<["-"], "mhalf-precision">, Group<m_wasm_Features_Group>;
-def mno_half_precision : Flag<["-"], "mno-half-precision">, Group<m_wasm_Features_Group>;
+def mfp16 : Flag<["-"], "mfp16">, Group<m_wasm_Features_Group>;
+def mno_fp16 : Flag<["-"], "mno-fp16">, Group<m_wasm_Features_Group>;
def mmultimemory : Flag<["-"], "mmultimemory">, Group<m_wasm_Features_Group>;
def mno_multimemory : Flag<["-"], "mno-multimemory">, Group<m_wasm_Features_Group>;
def mmultivalue : Flag<["-"], "mmultivalue">, Group<m_wasm_Features_Group>;
diff --git a/clang/lib/Basic/Targets/WebAssembly.cpp b/clang/lib/Basic/Targets/WebAssembly.cpp
index 1e565f0..5ac9421 100644
--- a/clang/lib/Basic/Targets/WebAssembly.cpp
+++ b/clang/lib/Basic/Targets/WebAssembly.cpp
@@ -49,7 +49,7 @@
.Case("bulk-memory", HasBulkMemory)
.Case("exception-handling", HasExceptionHandling)
.Case("extended-const", HasExtendedConst)
- .Case("half-precision", HasHalfPrecision)
+ .Case("fp16", HasFP16)
.Case("multimemory", HasMultiMemory)
.Case("multivalue", HasMultivalue)
.Case("mutable-globals", HasMutableGlobals)
@@ -84,8 +84,8 @@
Builder.defineMacro("__wasm_extended_const__");
if (HasMultiMemory)
Builder.defineMacro("__wasm_multimemory__");
- if (HasHalfPrecision)
- Builder.defineMacro("__wasm_half_precision__");
+ if (HasFP16)
+ Builder.defineMacro("__wasm_fp16__");
if (HasMultivalue)
Builder.defineMacro("__wasm_multivalue__");
if (HasMutableGlobals)
@@ -162,7 +162,7 @@
Features["bulk-memory"] = true;
Features["exception-handling"] = true;
Features["extended-const"] = true;
- Features["half-precision"] = true;
+ Features["fp16"] = true;
Features["multimemory"] = true;
Features["nontrapping-fptoint"] = true;
Features["tail-call"] = true;
@@ -212,13 +212,13 @@
HasExtendedConst = false;
continue;
}
- if (Feature == "+half-precision") {
+ if (Feature == "+fp16") {
SIMDLevel = std::max(SIMDLevel, SIMD128);
- HasHalfPrecision = true;
+ HasFP16 = true;
continue;
}
- if (Feature == "-half-precision") {
- HasHalfPrecision = false;
+ if (Feature == "-fp16") {
+ HasFP16 = false;
continue;
}
if (Feature == "+multimemory") {
diff --git a/clang/lib/Basic/Targets/WebAssembly.h b/clang/lib/Basic/Targets/WebAssembly.h
index e4a449d..213ec42 100644
--- a/clang/lib/Basic/Targets/WebAssembly.h
+++ b/clang/lib/Basic/Targets/WebAssembly.h
@@ -57,7 +57,7 @@
bool HasBulkMemory = false;
bool HasExceptionHandling = false;
bool HasExtendedConst = false;
- bool HasHalfPrecision = false;
+ bool HasFP16 = false;
bool HasMultiMemory = false;
bool HasMultivalue = false;
bool HasMutableGlobals = false;
@@ -90,9 +90,7 @@
StringRef getABI() const override;
bool setABI(const std::string &Name) override;
- bool useFP16ConversionIntrinsics() const override {
- return !HasHalfPrecision;
- }
+ bool useFP16ConversionIntrinsics() const override { return !HasFP16; }
protected:
void getTargetDefines(const LangOptions &Opts,
diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c
index f494aea..3010b89 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -triple wasm32-unknown-unknown -target-feature +reference-types -target-feature +simd128 -target-feature +relaxed-simd -target-feature +nontrapping-fptoint -target-feature +exception-handling -target-feature +bulk-memory -target-feature +atomics -target-feature +half-precision -flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY32
-// RUN: %clang_cc1 -triple wasm64-unknown-unknown -target-feature +reference-types -target-feature +simd128 -target-feature +relaxed-simd -target-feature +nontrapping-fptoint -target-feature +exception-handling -target-feature +bulk-memory -target-feature +atomics -target-feature +half-precision -flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY64
+// RUN: %clang_cc1 -triple wasm32-unknown-unknown -target-feature +reference-types -target-feature +simd128 -target-feature +relaxed-simd -target-feature +nontrapping-fptoint -target-feature +exception-handling -target-feature +bulk-memory -target-feature +atomics -target-feature +fp16 -flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY32
+// RUN: %clang_cc1 -triple wasm64-unknown-unknown -target-feature +reference-types -target-feature +simd128 -target-feature +relaxed-simd -target-feature +nontrapping-fptoint -target-feature +exception-handling -target-feature +bulk-memory -target-feature +atomics -target-feature +fp16 -flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY64
// RUN: not %clang_cc1 -triple wasm64-unknown-unknown -target-feature +reference-types -target-feature +nontrapping-fptoint -target-feature +exception-handling -target-feature +bulk-memory -target-feature +atomics -flax-vector-conversions=none -O3 -emit-llvm -o - %s 2>&1 | FileCheck %s -check-prefixes MISSING-SIMD
// SIMD convenience types
diff --git a/clang/test/Driver/wasm-features.c b/clang/test/Driver/wasm-features.c
index b77cb5e..57f0fc4 100644
--- a/clang/test/Driver/wasm-features.c
+++ b/clang/test/Driver/wasm-features.c
@@ -35,11 +35,11 @@
// EXTENDED-CONST: "-target-feature" "+extended-const"
// NO-EXTENDED-CONST: "-target-feature" "-extended-const"
-// RUN: %clang --target=wasm32-unknown-unknown -### %s -mhalf-precision 2>&1 | FileCheck %s -check-prefix=HALF-PRECISION
-// RUN: %clang --target=wasm32-unknown-unknown -### %s -mno-half-precision 2>&1 | FileCheck %s -check-prefix=NO-HALF-PRECISION
+// RUN: %clang --target=wasm32-unknown-unknown -### %s -mfp16 2>&1 | FileCheck %s -check-prefix=HALF-PRECISION
+// RUN: %clang --target=wasm32-unknown-unknown -### %s -mno-fp16 2>&1 | FileCheck %s -check-prefix=NO-HALF-PRECISION
-// HALF-PRECISION: "-target-feature" "+half-precision"
-// NO-HALF-PRECISION: "-target-feature" "-half-precision"
+// HALF-PRECISION: "-target-feature" "+fp16"
+// NO-HALF-PRECISION: "-target-feature" "-fp16"
// RUN: %clang --target=wasm32-unknown-unknown -### %s -mmultimemory 2>&1 | FileCheck %s -check-prefix=MULTIMEMORY
// RUN: %clang --target=wasm32-unknown-unknown -### %s -mno-multimemory 2>&1 | FileCheck %s -check-prefix=NO-MULTIMEMORY
diff --git a/clang/test/Preprocessor/wasm-target-features.c b/clang/test/Preprocessor/wasm-target-features.c
index d553916..c64d3a0 100644
--- a/clang/test/Preprocessor/wasm-target-features.c
+++ b/clang/test/Preprocessor/wasm-target-features.c
@@ -44,13 +44,13 @@
// EXTENDED-CONST: #define __wasm_extended_const__ 1{{$}}
// RUN: %clang -E -dM %s -o - 2>&1 \
-// RUN: -target wasm32-unknown-unknown -mhalf-precision \
-// RUN: | FileCheck %s -check-prefix=HALF-PRECISION
+// RUN: -target wasm32-unknown-unknown -mfp16 \
+// RUN: | FileCheck %s -check-prefix=FP16
// RUN: %clang -E -dM %s -o - 2>&1 \
-// RUN: -target wasm64-unknown-unknown -mhalf-precision \
-// RUN: | FileCheck %s -check-prefix=HALF-PRECISION
+// RUN: -target wasm64-unknown-unknown -mfp16 \
+// RUN: | FileCheck %s -check-prefix=FP16
//
-// HALF-PRECISION: #define __wasm_half_precision__ 1{{$}}
+// FP16: #define __wasm_fp16__ 1{{$}}
// RUN: %clang -E -dM %s -o - 2>&1 \
// RUN: -target wasm32-unknown-unknown -mmultimemory \
@@ -144,7 +144,7 @@
// MVP-NOT: #define __wasm_bulk_memory__ 1{{$}}
// MVP-NOT: #define __wasm_exception_handling__ 1{{$}}
// MVP-NOT: #define __wasm_extended_const__ 1{{$}}
-// MVP-NOT: #define __wasm_half_precision__ 1{{$}}
+// MVP-NOT: #define __wasm_fp16__ 1{{$}}
// MVP-NOT: #define __wasm_multimemory__ 1{{$}}
// MVP-NOT: #define __wasm_multivalue__ 1{{$}}
// MVP-NOT: #define __wasm_mutable_globals__ 1{{$}}
@@ -178,7 +178,7 @@
// GENERIC-NOT: #define __wasm_bulk_memory__ 1{{$}}
// GENERIC-NOT: #define __wasm_exception_handling__ 1{{$}}
// GENERIC-NOT: #define __wasm_extended_const__ 1{{$}}
-// GENERIC-NOT: #define __wasm_half_precision__ 1{{$}}
+// GENERIC-NOT: #define __wasm__fp16__ 1{{$}}
// GENERIC-NOT: #define __wasm_multimemory__ 1{{$}}
// GENERIC-NOT: #define __wasm_nontrapping_fptoint__ 1{{$}}
// GENERIC-NOT: #define __wasm_relaxed_simd__ 1{{$}}
@@ -196,7 +196,7 @@
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_bulk_memory__ 1{{$}}
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_exception_handling__ 1{{$}}
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_extended_const__ 1{{$}}
-// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_half_precision__ 1{{$}}
+// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_fp16__ 1{{$}}
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_multimemory__ 1{{$}}
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_multivalue__ 1{{$}}
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_mutable_globals__ 1{{$}}
diff --git a/llvm/lib/Target/WebAssembly/WebAssembly.td b/llvm/lib/Target/WebAssembly/WebAssembly.td
index 9761861..c632d4a 100644
--- a/llvm/lib/Target/WebAssembly/WebAssembly.td
+++ b/llvm/lib/Target/WebAssembly/WebAssembly.td
@@ -37,9 +37,9 @@
SubtargetFeature<"extended-const", "HasExtendedConst", "true",
"Enable extended const expressions">;
-def FeatureHalfPrecision :
- SubtargetFeature<"half-precision", "HasHalfPrecision", "true",
- "Enable half precision instructions">;
+def FeatureFP16 :
+ SubtargetFeature<"fp16", "HasFP16", "true",
+ "Enable FP16 instructions">;
def FeatureMultiMemory :
SubtargetFeature<"multimemory", "HasMultiMemory", "true",
@@ -117,7 +117,7 @@
def : ProcessorModel<"bleeding-edge", NoSchedModel,
[FeatureAtomics, FeatureBulkMemory,
FeatureExceptionHandling, FeatureExtendedConst,
- FeatureHalfPrecision, FeatureMultiMemory,
+ FeatureFP16, FeatureMultiMemory,
FeatureMultivalue, FeatureMutableGlobals,
FeatureNontrappingFPToInt, FeatureRelaxedSIMD,
FeatureReferenceTypes, FeatureSIMD128, FeatureSignExt,
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 563601b..13d3e3e 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -70,7 +70,7 @@
addRegisterClass(MVT::v2i64, &WebAssembly::V128RegClass);
addRegisterClass(MVT::v2f64, &WebAssembly::V128RegClass);
}
- if (Subtarget->hasHalfPrecision()) {
+ if (Subtarget->hasFP16()) {
addRegisterClass(MVT::v8f16, &WebAssembly::V128RegClass);
}
if (Subtarget->hasReferenceTypes()) {
@@ -146,7 +146,7 @@
setTruncStoreAction(T, MVT::f16, Expand);
}
- if (Subtarget->hasHalfPrecision()) {
+ if (Subtarget->hasFP16()) {
setOperationAction(ISD::FMINIMUM, MVT::v8f16, Legal);
setOperationAction(ISD::FMAXIMUM, MVT::v8f16, Legal);
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
index bb36ce7..767ac86 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
@@ -38,9 +38,9 @@
Predicate<"Subtarget->hasExtendedConst()">,
AssemblerPredicate<(all_of FeatureExtendedConst), "extended-const">;
-def HasHalfPrecision :
- Predicate<"Subtarget->hasHalfPrecision()">,
- AssemblerPredicate<(all_of FeatureHalfPrecision), "half-precision">;
+def HasFP16 :
+ Predicate<"Subtarget->hasFP16()">,
+ AssemblerPredicate<(all_of FeatureFP16), "fp16">;
def HasMultiMemory :
Predicate<"Subtarget->hasMultiMemory()">,
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
index 9d45287..0cbe9d0 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
@@ -74,7 +74,7 @@
// Half-precision load.
defm LOAD_F16_F32 :
- WebAssemblyLoad<F32, "f32.load_f16", 0xfc30, [HasHalfPrecision]>;
+ WebAssemblyLoad<F32, "f32.load_f16", 0xfc30, [HasFP16]>;
// Pattern matching
@@ -174,7 +174,7 @@
// Half-precision store.
defm STORE_F16_F32 :
- WebAssemblyStore<F32, "f32.store_f16", 0xfc31, [HasHalfPrecision]>;
+ WebAssemblyStore<F32, "f32.store_f16", 0xfc31, [HasFP16]>;
defm : StorePat<i32, truncstorei8, "STORE8_I32">;
defm : StorePat<i32, truncstorei16, "STORE16_I32">;
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index a169729..887278e 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -43,7 +43,7 @@
list<dag> pattern_r, string asmstr_r = "",
string asmstr_s = "", bits<32> simdop = -1> {
defm "" : ABSTRACT_SIMD_I<oops_r, iops_r, oops_s, iops_s, pattern_r, asmstr_r,
- asmstr_s, simdop, [HasHalfPrecision]>;
+ asmstr_s, simdop, [HasFP16]>;
}
@@ -750,7 +750,7 @@
multiclass HalfPrecisionCondition<Vec vec, string name, CondCode cond,
bits<32> simdop> {
- defm "" : SIMDCondition<vec, name, cond, simdop, [HasHalfPrecision]>;
+ defm "" : SIMDCondition<vec, name, cond, simdop, [HasFP16]>;
}
multiclass SIMDConditionInt<string name, CondCode cond, bits<32> baseInst> {
@@ -832,7 +832,7 @@
multiclass HalfPrecisionBinary<Vec vec, SDPatternOperator node, string name,
bits<32> simdop> {
- defm "" : SIMDBinary<vec, node, name, simdop, [HasHalfPrecision]>;
+ defm "" : SIMDBinary<vec, node, name, simdop, [HasFP16]>;
}
multiclass SIMDBitwise<SDPatternOperator node, string name, bits<32> simdop,
@@ -857,7 +857,7 @@
multiclass HalfPrecisionUnary<Vec vec, SDPatternOperator node, string name,
bits<32> simdop> {
- defm "" : SIMDUnary<vec, node, name, simdop, [HasHalfPrecision]>;
+ defm "" : SIMDUnary<vec, node, name, simdop, [HasFP16]>;
}
// Bitwise logic: v128.not
@@ -1355,7 +1355,7 @@
multiclass HalfPrecisionConvert<Vec vec, Vec arg, SDPatternOperator op,
string name, bits<32> simdop> {
- defm "" : SIMDConvert<vec, arg, op, name, simdop, [HasHalfPrecision]>;
+ defm "" : SIMDConvert<vec, arg, op, name, simdop, [HasFP16]>;
}
// Floating point to integer with saturation: trunc_sat
@@ -1532,7 +1532,7 @@
defm "" : SIMDMADD<F32x4, 0x105, 0x106, [HasRelaxedSIMD]>;
defm "" : SIMDMADD<F64x2, 0x107, 0x108, [HasRelaxedSIMD]>;
-defm "" : SIMDMADD<F16x8, 0x146, 0x147, [HasHalfPrecision]>;
+defm "" : SIMDMADD<F16x8, 0x146, 0x147, [HasFP16]>;
//===----------------------------------------------------------------------===//
// Laneselect
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h b/llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
index 540da4b..f990120 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
@@ -43,7 +43,7 @@
bool HasBulkMemory = false;
bool HasExceptionHandling = false;
bool HasExtendedConst = false;
- bool HasHalfPrecision = false;
+ bool HasFP16 = false;
bool HasMultiMemory = false;
bool HasMultivalue = false;
bool HasMutableGlobals = false;
@@ -96,7 +96,7 @@
bool hasBulkMemory() const { return HasBulkMemory; }
bool hasExceptionHandling() const { return HasExceptionHandling; }
bool hasExtendedConst() const { return HasExtendedConst; }
- bool hasHalfPrecision() const { return HasHalfPrecision; }
+ bool hasFP16() const { return HasFP16; }
bool hasMultiMemory() const { return HasMultiMemory; }
bool hasMultivalue() const { return HasMultivalue; }
bool hasMutableGlobals() const { return HasMutableGlobals; }
diff --git a/llvm/test/CodeGen/WebAssembly/half-precision.ll b/llvm/test/CodeGen/WebAssembly/half-precision.ll
index dba4138..adba502 100644
--- a/llvm/test/CodeGen/WebAssembly/half-precision.ll
+++ b/llvm/test/CodeGen/WebAssembly/half-precision.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+half-precision,+simd128 | FileCheck %s
-; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+half-precision,+simd128 | FileCheck %s
+; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+fp16,+simd128 | FileCheck %s
+; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+fp16,+simd128 | FileCheck %s
declare float @llvm.wasm.loadf32.f16(ptr)
declare void @llvm.wasm.storef16.f32(float, ptr)
diff --git a/llvm/test/CodeGen/WebAssembly/offset.ll b/llvm/test/CodeGen/WebAssembly/offset.ll
index 763c60c..1305084 100644
--- a/llvm/test/CodeGen/WebAssembly/offset.ll
+++ b/llvm/test/CodeGen/WebAssembly/offset.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -disable-wasm-fallthrough-return-opt -mattr=+half-precision | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -disable-wasm-fallthrough-return-opt -mattr=+fp16 | FileCheck %s
; Test constant load and store address offsets.
diff --git a/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll b/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
index d931475..77d1564 100644
--- a/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
+++ b/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
@@ -28,7 +28,7 @@
; GENERIC-NEXT: .ascii "sign-ext"
; bleeding-edge: +atomics, +bulk-memory, +exception-handling, +extended-const,
-; +half-precision, +multimemory, +multivalue, +mutable-globals,
+; +fp16, +multimemory, +multivalue, +mutable-globals,
; +nontrapping-fptoint, +relaxed-simd, +reference-types,
; +simd128, +sign-ext, +tail-call
; BLEEDING-EDGE-LABEL: .section .custom_section.target_features,"",@
@@ -46,8 +46,8 @@
; BLEEDING-EDGE-NEXT: .int8 14
; BLEEDING-EDGE-NEXT: .ascii "extended-const"
; BLEEDING-EDGE-NEXT: .int8 43
-; BLEEDING-EDGE-NEXT: .int8 14
-; BLEEDING-EDGE-NEXT: .ascii "half-precision"
+; BLEEDING-EDGE-NEXT: .int8 4
+; BLEEDING-EDGE-NEXT: .ascii "fp16"
; BLEEDING-EDGE-NEXT: .int8 43
; BLEEDING-EDGE-NEXT: .int8 11
; BLEEDING-EDGE-NEXT: .ascii "multimemory"
diff --git a/llvm/test/MC/WebAssembly/simd-encodings.s b/llvm/test/MC/WebAssembly/simd-encodings.s
index 7ae4d47..45335b3 100644
--- a/llvm/test/MC/WebAssembly/simd-encodings.s
+++ b/llvm/test/MC/WebAssembly/simd-encodings.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -no-type-check -show-encoding -triple=wasm32-unknown-unknown -mattr=+simd128,+relaxed-simd,+half-precision < %s | FileCheck %s
+# RUN: llvm-mc -no-type-check -show-encoding -triple=wasm32-unknown-unknown -mattr=+simd128,+relaxed-simd,+fp16 < %s | FileCheck %s
main:
.functype main () -> ()
