commit 80b6fdc3a67eb83f40ab3950b256dd3a62e3f1e1
author Krzysztof Parzyszek <kparzysz@codeaurora.org> Thu Jul 20 19:15:56 2017 +0000
committer Krzysztof Parzyszek <kparzysz@codeaurora.org> Thu Jul 20 19:15:56 2017 +0000
tree 580060ab6c4fdfce6601858786a15eb51c9e90c9
parent 9dbc448fd96d2bb0c845102acbd4edf9a6ff86c8

Use LaneBitmask::getLane in a few more places


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308655 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AMDGPU/GCNRegPressure.cpp

diff --git a/lib/Target/AMDGPU/GCNRegPressure.cpp b/lib/Target/AMDGPU/GCNRegPressure.cpp
index 1d02c7f..09cac8c 100644
--- a/lib/Target/AMDGPU/GCNRegPressure.cpp
+++ b/lib/Target/AMDGPU/GCNRegPressure.cpp
@@ -201,7 +201,7 @@
     return MRI.getTargetRegisterInfo()->getSubRegIndexLaneMask(SubReg);
 
   auto MaxMask = MRI.getMaxLaneMaskForVReg(MO.getReg());
-  if (MaxMask.getAsInteger() == 1) // cannot have subregs
+  if (MaxMask == LaneBitmask::getLane(0)) // cannot have subregs
     return MaxMask;
 
   // For a tentative schedule LIS isn't updated yet but livemask should remain