commit 2805eef6921176b3ba92a12d4ab81b6462584a1c
author Chris Wailes <chriswailes@google.com> Thu Apr 07 11:22:56 2022 -0700
committer Chris Wailes <chriswailes@google.com> Thu Apr 07 15:47:14 2022 -0700
tree 3996c7169c9a9028ec453f39e7610dec4a36d3ad
parent 7878d54bdc65740bb5a90f6bcf29e9a90071299e

Importing rustc-1.60.0

Test: ./build.py --lto=thin
Bug: 218368713
Change-Id: Id769ad47aab28ec7b551d06785fb811cdf441aec

src/llvm-project/llvm/lib/IR/InlineAsm.cpp

diff --git a/src/llvm-project/llvm/lib/IR/InlineAsm.cpp b/src/llvm-project/llvm/lib/IR/InlineAsm.cpp
index 56932b4..203ad6d 100644
--- a/src/llvm-project/llvm/lib/IR/InlineAsm.cpp
+++ b/src/llvm-project/llvm/lib/IR/InlineAsm.cpp
@@ -22,7 +22,6 @@
 #include <algorithm>
 #include <cassert>
 #include <cctype>
-#include <cstddef>
 #include <cstdlib>
 
 using namespace llvm;
@@ -262,12 +261,12 @@
   unsigned NumOutputs = 0, NumInputs = 0, NumClobbers = 0;
   unsigned NumIndirect = 0;
 
-  for (unsigned i = 0, e = Constraints.size(); i != e; ++i) {
-    switch (Constraints[i].Type) {
+  for (const ConstraintInfo &Constraint : Constraints) {
+    switch (Constraint.Type) {
     case InlineAsm::isOutput:
       if ((NumInputs-NumIndirect) != 0 || NumClobbers != 0)
         return false;  // outputs before inputs and clobbers.
-      if (!Constraints[i].isIndirect) {
+      if (!Constraint.isIndirect) {
         ++NumOutputs;
         break;
       }