Init imx6ul platform codes
Add basic platform codes to init memory space
and UART.
Change-Id: Ie1e08912a6dd4eae78643acf417ef722d133c597
Signed-off-by: Wang Haoran <[email protected]>
diff --git a/platform/imx/debug.c b/platform/imx/debug.c
new file mode 100644
index 0000000..33927e7
--- /dev/null
+++ b/platform/imx/debug.c
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2015 Google Inc. All rights reserved
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <kernel/thread.h>
+#include <platform/debug.h>
+#include <dev/uart.h>
+
+
+void platform_dputc(char c)
+{
+ uart_putc(0, c);
+}
+
+int platform_dgetc(char *c, bool wait)
+{
+ return uart_getc(0, wait);
+}
diff --git a/platform/imx/drivers/imx_uart.c b/platform/imx/drivers/imx_uart.c
new file mode 100644
index 0000000..d3e72fb
--- /dev/null
+++ b/platform/imx/drivers/imx_uart.c
@@ -0,0 +1,118 @@
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <reg.h>
+#include <dev/uart.h>
+
+#define READ32(addr) (*REG32(addr))
+#define WRITE32(val, addr) (READ32(addr) = val)
+
+/* Register definitions */
+#define URXD 0x0 /* Receiver Register */
+#define UTXD 0x40 /* Transmitter Register */
+#define UCR1 0x80 /* Control Register 1 */
+#define UCR2 0x84 /* Control Register 2 */
+#define UCR3 0x88 /* Control Register 3 */
+#define UCR4 0x8c /* Control Register 4 */
+#define UFCR 0x90 /* FIFO Control Register */
+#define USR1 0x94 /* Status Register 1 */
+#define USR2 0x98 /* Status Register 2 */
+#define UESC 0x9c /* Escape Character Register */
+#define UTIM 0xa0 /* Escape Timer Register */
+#define UBIR 0xa4 /* BRM Incremental Register */
+#define UBMR 0xa8 /* BRM Modulator Register */
+#define UBRC 0xac /* Baud Rate Count Register */
+#define UTS 0xb4 /* UART Test Register (mx31) */
+
+/* UART Control Register Bit Fields.*/
+#define URXD_CHARRDY (1<<15)
+#define URXD_ERR (1<<14)
+#define URXD_OVRRUN (1<<13)
+#define URXD_FRMERR (1<<12)
+#define URXD_BRK (1<<11)
+#define URXD_PRERR (1<<10)
+#define URXD_RX_DATA (0xFF)
+#define UCR1_ADEN (1<<15) /* Auto dectect interrupt */
+#define UCR1_ADBR (1<<14) /* Auto detect baud rate */
+#define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */
+#define UCR1_IDEN (1<<12) /* Idle condition interrupt */
+#define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */
+#define UCR1_RDMAEN (1<<8) /* Recv ready DMA enable */
+#define UCR1_IREN (1<<7) /* Infrared interface enable */
+#define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */
+#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */
+#define UCR1_SNDBRK (1<<4) /* Send break */
+#define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */
+#define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */
+#define UCR1_DOZE (1<<1) /* Doze */
+#define UCR1_UARTEN (1<<0) /* UART enabled */
+
+#define UTS_FRCPERR (1<<13) /* Force parity error */
+#define UTS_LOOP (1<<12) /* Loop tx and rx */
+#define UTS_TXEMPTY (1<<6) /* TxFIFO empty */
+#define UTS_RXEMPTY (1<<5) /* RxFIFO empty */
+#define UTS_TXFULL (1<<4) /* TxFIFO full */
+#define UTS_RXFULL (1<<3) /* RxFIFO full */
+#define UTS_SOFTRST (1<<0) /* Software reset */
+#define UART_BASE CONFIG_CONSOLE_TTY_BASE
+
+void uart_init(void)
+{
+ /*
+ * Do nothing, debug uart share with normal world,
+ * everything for uart intialization were done in bootloader.
+ */
+}
+
+void uart_flush_tx(int port)
+{
+ while (!(READ32(UART_BASE + UTS) & UTS_TXEMPTY))
+ ;
+}
+
+int uart_getc(int port, bool wait)
+{
+ if (wait)
+ while (READ32(UART_BASE + UTS) & UTS_RXEMPTY);
+ else if (!(READ32(UART_BASE + UTS) & UTS_RXEMPTY))
+ return -1;
+
+ return (READ32(UART_BASE + URXD) & URXD_RX_DATA);
+}
+
+int uart_putc(int port, char c )
+{
+ if (c == '\n')
+ uart_putc(0, '\r');
+
+ WRITE32(c, UART_BASE + UTXD);
+
+ /* wait until sent */
+ while (!(READ32(UART_BASE + UTS) & UTS_TXEMPTY))
+ ;
+}
diff --git a/platform/imx/include/platform/gic.h b/platform/imx/include/platform/gic.h
new file mode 100644
index 0000000..60e68df
--- /dev/null
+++ b/platform/imx/include/platform/gic.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2015 Google Inc. All rights reserved
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef __PLATFORM_GIC_H
+#define __PLATFORM_GIC_H
+#include <imx-regs.h>
+
+#define MAX_INT 160
+#define GICBASE(b) (GIC_BASE_VIRT)
+
+#define GICC_SIZE (0x1000)
+#define GICD_SIZE (0x100)
+
+#define GICC_OFFSET (0x1000)
+#define GICD_OFFSET (0x0000)
+
+#define GICC_BASE_VIRT (GIC_BASE_VIRT + GICC_OFFSET)
+#define GICD_BASE_VIRT (GIC_BASE_VIRT + GICD_OFFSET)
+
+#define GIC_REG_SIZE 0x2000
+
+#endif
diff --git a/platform/imx/platform.c b/platform/imx/platform.c
new file mode 100644
index 0000000..50615f7
--- /dev/null
+++ b/platform/imx/platform.c
@@ -0,0 +1,125 @@
+/*
+ * Copyright (c) 2015 Google Inc. All rights reserved
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <imx-regs.h>
+#include <debug.h>
+#include <dev/interrupt/arm_gic.h>
+#include <dev/timer/arm_generic.h>
+#include <kernel/vm.h>
+#include <lk/init.h>
+#include <platform/gic.h>
+#include <string.h>
+
+
+#define ARM_GENERIC_TIMER_INT_CNTV 27
+#define ARM_GENERIC_TIMER_INT_CNTPS 29
+#define ARM_GENERIC_TIMER_INT_CNTP 30
+
+#define ARM_GENERIC_TIMER_INT_SELECTED(timer) ARM_GENERIC_TIMER_INT_ ## timer
+#define XARM_GENERIC_TIMER_INT_SELECTED(timer) ARM_GENERIC_TIMER_INT_SELECTED(timer)
+#define ARM_GENERIC_TIMER_INT XARM_GENERIC_TIMER_INT_SELECTED(TIMER_ARM_GENERIC_SELECTED)
+
+/* initial memory mappings. parsed by start.S */
+struct mmu_initial_mapping mmu_initial_mappings[] = {
+ /* Mark next entry as dynamic as it might be updated
+ by platform_reset code to specify actual size and
+ location of RAM to use */
+ {
+ .phys = MEMBASE + KERNEL_LOAD_OFFSET,
+ .virt = KERNEL_BASE + KERNEL_LOAD_OFFSET,
+ .size = MEMSIZE,
+ .flags = MMU_INITIAL_MAPPING_FLAG_DYNAMIC,
+ .name = "ram" },
+ {
+ .phys = CONFIG_CONSOLE_TTY_BASE,
+ .virt = CONFIG_CONSOLE_TTY_BASE,
+ .size = 0x4000,
+ .flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
+ .name = "uart"
+ },
+ /* null entry to terminate the list */
+ { 0 }
+};
+
+static pmm_arena_t ram_arena = {
+ .name = "ram",
+ .base = MEMBASE + KERNEL_LOAD_OFFSET,
+ .size = MEMSIZE,
+ .flags = PMM_ARENA_FLAG_KMAP
+};
+
+
+void platform_init_mmu_mappings(void)
+{
+ /* go through mmu_initial_mapping to find dynamic entry
+ * matching ram_arena (by name) and adjust it.
+ */
+ struct mmu_initial_mapping *m = mmu_initial_mappings;
+ for (uint i = 0; i < countof(mmu_initial_mappings); i++, m++) {
+ if (!(m->flags & MMU_INITIAL_MAPPING_FLAG_DYNAMIC))
+ continue;
+
+ if (strcmp(m->name, ram_arena.name) == 0) {
+ /* update ram_arena */
+ ram_arena.base = m->phys;
+ ram_arena.size = m->size;
+ ram_arena.flags = PMM_ARENA_FLAG_KMAP;
+
+ break;
+ }
+ }
+ pmm_add_arena(&ram_arena);
+}
+
+static void generic_arm64_map_regs(const char *name, vaddr_t vaddr,
+ paddr_t paddr, size_t size)
+{
+ status_t ret;
+ void *vaddrp = (void *)vaddr;
+
+ ret = vmm_alloc_physical(vmm_get_kernel_aspace(), name,
+ size, &vaddrp, 0, paddr,
+ VMM_FLAG_VALLOC_SPECIFIC,
+ ARCH_MMU_FLAG_UNCACHED_DEVICE);
+ if (ret) {
+ dprintf(CRITICAL, "%s: failed %d name=%s\n", __func__, ret, name);
+ }
+}
+
+static void platform_after_vm_init(uint level)
+{
+ generic_arm64_map_regs("gic", GIC_BASE_VIRT, GIC_BASE_PHY, GIC_REG_SIZE);
+
+
+ /* Initialize the interrupt controller. */
+ arm_gic_init();
+
+ /* Initialize the timer block. */
+ arm_generic_timer_init(ARM_GENERIC_TIMER_INT, 0);
+
+ /* Map for all SoC IPs. */
+ generic_arm64_map_regs("soc", SOC_REGS_VIRT, SOC_REGS_PHY, SOC_REGS_SIZE);
+
+}
+
+LK_INIT_HOOK(platform_after_vm, platform_after_vm_init, LK_INIT_LEVEL_VM + 1);
diff --git a/platform/imx/rules.mk b/platform/imx/rules.mk
new file mode 100644
index 0000000..25b7b34
--- /dev/null
+++ b/platform/imx/rules.mk
@@ -0,0 +1,57 @@
+#
+# Copyright (c) 2015, Google, Inc. All rights reserved
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files
+# (the "Software"), to deal in the Software without restriction,
+# including without limitation the rights to use, copy, modify, merge,
+# publish, distribute, sublicense, and/or sell copies of the Software,
+# and to permit persons to whom the Software is furnished to do so,
+# subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+#
+
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+MODULE := $(LOCAL_DIR)
+
+ARCH := arm
+ARM_CPU := cortex-a7
+WITH_LIB_SM := 1
+WITH_LIB_SM_MONITOR := 1
+WITH_LIB_VERSION := 1
+
+MEMBASE ?= $(KERNEL_BASE)
+
+GLOBAL_INCLUDES += \
+ $(LOCAL_DIR)/include \
+ $(LOCAL_DIR)/soc/$(PLATFORM_SOC)/include
+
+MODULE_SRCS += \
+ $(LOCAL_DIR)/debug.c \
+ $(LOCAL_DIR)/platform.c \
+ $(LOCAL_DIR)/drivers/imx_uart.c \
+
+MODULE_DEPS += \
+ dev/interrupt/arm_gic \
+ dev/timer/arm_generic
+
+GLOBAL_DEFINES += \
+ MEMBASE=$(MEMBASE) \
+ MEMSIZE=$(MEMSIZE) \
+ MMU_WITH_TRAMPOLINE=1
+
+LINKER_SCRIPT += \
+ $(BUILDDIR)/system-onesegment.ld
+
+include make/module.mk
diff --git a/platform/imx/soc/imx6ul/include/imx-regs.h b/platform/imx/soc/imx6ul/include/imx-regs.h
new file mode 100644
index 0000000..1278c8e
--- /dev/null
+++ b/platform/imx/soc/imx6ul/include/imx-regs.h
@@ -0,0 +1,12 @@
+
+#ifndef _IMX_REGS_H_
+#define _IMX_REGS_H_
+
+#define GIC_BASE_PHY 0xa01000
+#define GIC_BASE_VIRT 0x70a01000
+
+#define SOC_REGS_PHY 0x02000000
+#define SOC_REGS_VIRT 0x72000000
+#define SOC_REGS_SIZE 0x00100000
+
+#endif
diff --git a/target/imx/rules.mk b/target/imx/rules.mk
new file mode 100644
index 0000000..5b7f7cc
--- /dev/null
+++ b/target/imx/rules.mk
@@ -0,0 +1,31 @@
+#
+# Copyright (c) 2015, Google, Inc. All rights reserved
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files
+# (the "Software"), to deal in the Software without restriction,
+# including without limitation the rights to use, copy, modify, merge,
+# publish, distribute, sublicense, and/or sell copies of the Software,
+# and to permit persons to whom the Software is furnished to do so,
+# subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+#
+
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+GLOBAL_INCLUDES += \
+ $(LOCAL_DIR)/include
+
+PLATFORM := imx
+
+#include make/module.mk
