| /******************************************************************************** | |
| Copyright (C) 2016 Marvell International Ltd. | |
| Marvell BSD License Option | |
| If you received this File from Marvell, you may opt to use, redistribute and/or | |
| modify this File under the following licensing terms. | |
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| are permitted provided that the following conditions are met: | |
| * Redistributions of source code must retain the above copyright notice, | |
| this list of conditions and the following disclaimer. | |
| * Redistributions in binary form must reproduce the above copyright | |
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| used to endorse or promote products derived from this software without | |
| specific prior written permission. | |
| THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND | |
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| *******************************************************************************/ | |
| #ifndef __MDIO_DXE_H__ | |
| #define __MDIO_DXE_H__ | |
| #include <Uefi.h> | |
| #define MVEBU_SMI_TIMEOUT 10000 | |
| /* SMI register fields */ | |
| #define MVEBU_SMI_DATA_OFFS 0 /* Data */ | |
| #define MVEBU_SMI_DATA_MASK (0xffff << MVEBU_SMI_DATA_OFFS) | |
| #define MVEBU_SMI_DEV_ADDR_OFFS 16 /* PHY device address */ | |
| #define MVEBU_SMI_REG_ADDR_OFFS 21 /* PHY device reg addr*/ | |
| #define MVEBU_SMI_OPCODE_OFFS 26 /* Write/Read opcode */ | |
| #define MVEBU_SMI_OPCODE_READ (1 << MVEBU_SMI_OPCODE_OFFS) | |
| #define MVEBU_SMI_READ_VALID (1 << 27) /* Read Valid */ | |
| #define MVEBU_SMI_BUSY (1 << 28) /* Busy */ | |
| #define MVEBU_PHY_REG_MASK 0x1f | |
| #define MVEBU_PHY_ADDR_MASK 0x1f | |
| #define MdioRegWrite32(x, y) MmioWrite32((y), (x)) | |
| #endif // __MDIO_DXE_H__ |