| ## @file UefiCpuPkg.dec | |
| # This Package provides UEFI compatible CPU modules and libraries. | |
| # | |
| # Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR> | |
| # | |
| # This program and the accompanying materials are licensed and made available under | |
| # the terms and conditions of the BSD License which accompanies this distribution. | |
| # The full text of the license may be found at | |
| # http://opensource.org/licenses/bsd-license.php | |
| # | |
| # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
| # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
| # | |
| ## | |
| [Defines] | |
| DEC_SPECIFICATION = 0x00010005 | |
| PACKAGE_NAME = UefiCpuPkg | |
| PACKAGE_UNI_FILE = UefiCpuPkg.uni | |
| PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23 | |
| PACKAGE_VERSION = 0.3 | |
| [Includes] | |
| Include | |
| [LibraryClasses] | |
| ## @libraryclass Defines some routines that are generic for IA32 family CPU | |
| ## to be UEFI specification compliant. | |
| ## | |
| UefiCpuLib|Include/Library/UefiCpuLib.h | |
| [LibraryClasses.IA32, LibraryClasses.X64] | |
| ## @libraryclass Provides functions to manage MTRR settings on IA32 and X64 CPUs. | |
| ## | |
| MtrrLib|Include/Library/MtrrLib.h | |
| ## @libraryclass Provides functions to manage the Local APIC on IA32 and X64 CPUs. | |
| ## | |
| LocalApicLib|Include/Library/LocalApicLib.h | |
| ## @libraryclass Provides platform specific initialization functions in the SEC phase. | |
| ## | |
| PlatformSecLib|Include/Library/PlatformSecLib.h | |
| ## @libraryclass Public include file for the SMM CPU Platform Hook Library. | |
| ## | |
| SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h | |
| ## @libraryclass Provides the CPU specific programming for PiSmmCpuDxeSmm module. | |
| ## | |
| SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h | |
| ## @libraryclass Provides functions to support MP services on CpuMpPei and CpuDxe module. | |
| ## | |
| MpInitLib|Include/Library/MpInitLib.h | |
| ## @libraryclass Provides services to access Microcode region on flash device. | |
| # | |
| MicrocodeFlashAccessLib|Include/Library/MicrocodeFlashAccessLib.h | |
| [Guids] | |
| gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }} | |
| gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }} | |
| ## Include/Guid/MicrocodeFmp.h | |
| gMicrocodeFmpImageTypeIdGuid = { 0x96d4fdcd, 0x1502, 0x424d, { 0x9d, 0x4c, 0x9b, 0x12, 0xd2, 0xdc, 0xae, 0x5c } } | |
| [Protocols] | |
| ## Include/Protocol/SmmCpuService.h | |
| gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }} | |
| ## Include/Protocol/SmMonitorInit.h | |
| gEfiSmMonitorInitProtocolGuid = { 0x228f344d, 0xb3de, 0x43bb, { 0xa4, 0xd7, 0xea, 0x20, 0xb, 0x1b, 0x14, 0x82 }} | |
| # | |
| # [Error.gUefiCpuPkgTokenSpaceGuid] | |
| # 0x80000001 | Invalid value provided. | |
| # | |
| [PcdsFeatureFlag] | |
| ## Indicates if SMM Profile will be enabled. | |
| # If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged. | |
| # This PCD is only for validation purpose. It should be set to false in production.<BR><BR> | |
| # TRUE - SMM Profile will be enabled.<BR> | |
| # FALSE - SMM Profile will be disabled.<BR> | |
| # @Prompt Enable SMM Profile. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE|BOOLEAN|0x32132109 | |
| ## Indicates if the SMM profile log buffer is a ring buffer. | |
| # If disabled, no additional log can be done when the buffer is full.<BR><BR> | |
| # TRUE - the SMM profile log buffer is a ring buffer.<BR> | |
| # FALSE - the SMM profile log buffer is a normal buffer.<BR> | |
| # @Prompt The SMM profile log buffer is a ring buffer. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer|FALSE|BOOLEAN|0x3213210a | |
| ## Indicates if SMM Startup AP in a blocking fashion. | |
| # TRUE - SMM Startup AP in a blocking fashion.<BR> | |
| # FALSE - SMM Startup AP in a non-blocking fashion.<BR> | |
| # @Prompt SMM Startup AP in a blocking fashion. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp|FALSE|BOOLEAN|0x32132108 | |
| ## Indicates if SMM Stack Guard will be enabled. | |
| # If enabled, stack overflow in SMM can be caught, preventing chaotic consequences.<BR><BR> | |
| # TRUE - SMM Stack Guard will be enabled.<BR> | |
| # FALSE - SMM Stack Guard will be disabled.<BR> | |
| # @Prompt Enable SMM Stack Guard. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|TRUE|BOOLEAN|0x1000001C | |
| ## Indicates if BSP election in SMM will be enabled. | |
| # If enabled, a BSP will be dynamically elected among all processors in each SMI. | |
| # Otherwise, processor 0 is always as BSP in each SMI.<BR><BR> | |
| # TRUE - BSP election in SMM will be enabled.<BR> | |
| # FALSE - BSP election in SMM will be disabled.<BR> | |
| # @Prompt Enable BSP election in SMM. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE|BOOLEAN|0x32132106 | |
| ## Indicates if CPU SMM hot-plug will be enabled.<BR><BR> | |
| # TRUE - SMM CPU hot-plug will be enabled.<BR> | |
| # FALSE - SMM CPU hot-plug will be disabled.<BR> | |
| # @Prompt SMM CPU hot-plug. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE|BOOLEAN|0x3213210C | |
| ## Indicates if SMM Debug will be enabled. | |
| # If enabled, hardware breakpoints in SMRAM can be set outside of SMM mode and take effect in SMM.<BR><BR> | |
| # TRUE - SMM Debug will be enabled.<BR> | |
| # FALSE - SMM Debug will be disabled.<BR> | |
| # @Prompt Enable SMM Debug. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|FALSE|BOOLEAN|0x1000001B | |
| ## Indicates if lock SMM Feature Control MSR.<BR><BR> | |
| # TRUE - SMM Feature Control MSR will be locked.<BR> | |
| # FALSE - SMM Feature Control MSR will not be locked.<BR> | |
| # @Prompt Lock SMM Feature Control MSR. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B | |
| [PcdsFixedAtBuild, PcdsPatchableInModule] | |
| ## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary. | |
| # @Prompt Configure base address of CPU Local APIC | |
| # @Expression 0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0 | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001 | |
| ## Specifies delay value in microseconds after sending out an INIT IPI. | |
| # @Prompt Configure delay value after send an INIT IPI | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002 | |
| ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must | |
| ## aligns the address on a 4-KByte boundary. | |
| # @Prompt Configure stack size for Application Processor (AP) | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003 | |
| ## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize. | |
| # @Prompt Stack size in the temporary RAM. | |
| gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003 | |
| ## Specifies buffer size in bytes to save SMM profile data. The value should be a multiple of 4KB. | |
| # @Prompt SMM profile data buffer size. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize|0x200000|UINT32|0x32132107 | |
| ## Specifies stack size in bytes for each processor in SMM. | |
| # @Prompt Processor stack size in SMM. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105 | |
| ## Indicates if SMM Code Access Check is enabled. | |
| # If enabled, the SMM handler cannot execute the code outside SMM regions. | |
| # This PCD is suggested to TRUE in production image.<BR><BR> | |
| # TRUE - SMM Code Access Check will be enabled.<BR> | |
| # FALSE - SMM Code Access Check will be disabled.<BR> | |
| # @Prompt SMM Code Access Check. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013 | |
| ## Specifies the number of variable MTRRs reserved for OS use. The default number of | |
| # MTRRs reserved for OS use is 2. | |
| # @Prompt Number of reserved variable MTRRs. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0x2|UINT32|0x00000015 | |
| ## Specifies buffer size in bytes for STM exception stack. The value should be a multiple of 4KB. | |
| # @Prompt STM exception stack size. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize|0x1000|UINT32|0x32132111 | |
| ## Specifies buffer size in bytes of MSEG. The value should be a multiple of 4KB. | |
| # @Prompt MSEG size. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuMsegSize|0x200000|UINT32|0x32132112 | |
| [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] | |
| ## Specifies max supported number of Logical Processors. | |
| # @Prompt Configure max supported number of Logical Processors | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002 | |
| ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time. | |
| # @Prompt Timeout for the BSP to detect all APs for the first time. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004 | |
| ## Specifies the base address of the first microcode Patch in the microcode Region. | |
| # @Prompt Microcode Region base address. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005 | |
| ## Specifies the size of the microcode Region. | |
| # @Prompt Microcode Region size. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006 | |
| ## Specifies the AP wait loop state during POST phase. | |
| # The value is defined as below.<BR><BR> | |
| # 1: Place AP in the Hlt-Loop state.<BR> | |
| # 2: Place AP in the Mwait-Loop state.<BR> | |
| # 3: Place AP in the Run-Loop state.<BR> | |
| # @Prompt The AP wait loop state. | |
| # @ValidRange 0x80000001 | 1 - 3 | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|1|UINT8|0x60008006 | |
| ## Specifies the AP target C-state for Mwait during POST phase. | |
| # The default value 0 means C1 state. | |
| # The value is defined as below.<BR><BR> | |
| # @Prompt The specified AP target C-state for Mwait. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007 | |
| ## Indicates if SMM uses static page table. | |
| # If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory.<BR><BR> | |
| # This flag only impacts X64 build, because SMM alway builds static page table for IA32. | |
| # TRUE - SMM uses static page table for all memory.<BR> | |
| # FALSE - SMM uses static page table for below 4G memory and use on-demand paging for above 4G memory.<BR> | |
| # @Prompt Use static page table for all memory in SMM. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStaticPageTable|TRUE|BOOLEAN|0x3213210D | |
| ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM. | |
| # @Prompt AP synchronization timeout value in SMM. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104 | |
| ## Indicates the CPU synchronization method used when processing an SMI. | |
| # 0x00 - Traditional CPU synchronization method.<BR> | |
| # 0x01 - Relaxed CPU synchronization method.<BR> | |
| # @Prompt SMM CPU Synchronization Method. | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014 | |
| [PcdsDynamic, PcdsDynamicEx] | |
| ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA. | |
| # @Prompt The pointer to a CPU S3 data buffer. | |
| # @ValidList 0x80000001 | 0 | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010 | |
| ## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported. | |
| # @Prompt The pointer to CPU Hot Plug Data. | |
| # @ValidList 0x80000001 | 0 | |
| gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011 | |
| [UserExtensions.TianoCore."ExtraFiles"] | |
| UefiCpuPkgExtra.uni |