Documentation/devicetree/bindings/clock/qcom,sa8775p-videocc.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sa8775p-videocc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Video Clock & Reset Controller on SA8775P

maintainers:
  - Taniya Das <quic_tdas@quicinc.com>

description: |
  Qualcomm video clock control module provides the clocks, resets and power
  domains on SA8775P.

  See also: include/dt-bindings/clock/qcom,sa8775p-videocc.h

properties:
  compatible:
    enum:
      - qcom,sa8775p-videocc

  clocks:
    items:
      - description: Video AHB clock from GCC
      - description: Board XO source
      - description: Board active XO source
      - description: Sleep Clock source

  power-domains:
    maxItems: 1
    description: MMCX power domain

required:
  - compatible
  - clocks
  - power-domains
  - '#power-domain-cells'

allOf:
  - $ref: qcom,gcc.yaml#

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,rpmh.h>
    #include <dt-bindings/power/qcom-rpmpd.h>
    #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
    videocc: clock-controller@abf0000 {
      compatible = "qcom,sa8775p-videocc";
      reg = <0x0abf0000 0x10000>;
      clocks = <&gcc GCC_VIDEO_AHB_CLK>,
               <&rpmhcc RPMH_CXO_CLK>,
               <&rpmhcc RPMH_CXO_CLK_A>,
               <&sleep_clk>;
      power-domains = <&rpmhpd SA8775P_MMCX>;
      #clock-cells = <1>;
      #reset-cells = <1>;
      #power-domain-cells = <1>;
    };
...