| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/samsung,exynos990-clock.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Samsung Exynos990 SoC clock controller |
| |
| maintainers: |
| - Igor Belwon <[email protected]> |
| - Chanwoo Choi <[email protected]> |
| - Krzysztof Kozlowski <[email protected]> |
| |
| description: | |
| Exynos990 clock controller is comprised of several CMU units, generating |
| clocks for different domains. Those CMU units are modeled as separate device |
| tree nodes, and might depend on each other. The root clock in that root tree |
| is an external clock: OSCCLK (26 MHz). This external clock must be defined |
| as a fixed-rate clock in dts. |
| |
| CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and |
| dividers; all other clocks of function blocks (other CMUs) are usually |
| derived from CMU_TOP. |
| |
| Each clock is assigned an identifier and client nodes can use this identifier |
| to specify the clock which they consume. All clocks available for usage |
| in clock consumer nodes are defined as preprocessor macros in |
| 'include/dt-bindings/clock/samsung,exynos990.h' header. |
| |
| properties: |
| compatible: |
| enum: |
| - samsung,exynos990-cmu-hsi0 |
| - samsung,exynos990-cmu-top |
| |
| clocks: |
| minItems: 1 |
| maxItems: 5 |
| |
| clock-names: |
| minItems: 1 |
| maxItems: 5 |
| |
| "#clock-cells": |
| const: 1 |
| |
| reg: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - clocks |
| - clock-names |
| - "#clock-cells" |
| - reg |
| |
| allOf: |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynos990-cmu-hsi0 |
| |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| - description: CMU_HSI0 BUS clock (from CMU_TOP) |
| - description: CMU_HSI0 USB31DRD clock (from CMU_TOP) |
| - description: CMU_HSI0 USBDP_DEBUG clock (from CMU_TOP) |
| - description: CMU_HSI0 DPGTC clock (from CMU_TOP) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| - const: bus |
| - const: usb31drd |
| - const: usbdp_debug |
| - const: dpgtc |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| const: samsung,exynos990-cmu-top |
| |
| then: |
| properties: |
| clocks: |
| items: |
| - description: External reference clock (26 MHz) |
| |
| clock-names: |
| items: |
| - const: oscclk |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/samsung,exynos990.h> |
| |
| cmu_hsi0: clock-controller@10a00000 { |
| compatible = "samsung,exynos990-cmu-hsi0"; |
| reg = <0x10a00000 0x8000>; |
| #clock-cells = <1>; |
| |
| clocks = <&oscclk>, |
| <&cmu_top CLK_DOUT_CMU_HSI0_BUS>, |
| <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>, |
| <&cmu_top CLK_DOUT_CMU_HSI0_USBDP_DEBUG>, |
| <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>; |
| clock-names = "oscclk", |
| "bus", |
| "usb31drd", |
| "usbdp_debug", |
| "dpgtc"; |
| }; |
| |
| ... |