| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/usb/ti,tusb73x0-pci.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: TUSB73x0 USB 3.0 xHCI Host Controller (PCIe) |
| |
| maintainers: |
| - Francesco Dolcini <[email protected]> |
| |
| description: |
| TUSB73x0 USB 3.0 xHCI Host Controller via PCIe x1 Gen2 interface. |
| The TUSB7320 supports up to two downstream ports, the TUSB7340 supports up |
| to four downstream ports, both variants share the same PCI device ID. |
| |
| properties: |
| compatible: |
| const: pci104c,8241 |
| |
| reg: |
| maxItems: 1 |
| |
| ti,pwron-active-high: |
| $ref: /schemas/types.yaml#/definitions/flag |
| description: |
| Configure the polarity of the PWRONx# signals. When this is present, the |
| PWRONx# pins are active high and their internal pull-down resistors are |
| disabled. When this is absent, the PWRONx# pins are active low (default) |
| and their internal pull-down resistors are enabled. |
| |
| required: |
| - compatible |
| - reg |
| |
| allOf: |
| - $ref: usb-xhci.yaml |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| pcie@0 { |
| reg = <0x0 0x1000>; |
| ranges = <0x02000000 0x0 0x100000 0x10000000 0x0 0x0>; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| device_type = "pci"; |
| |
| usb@0 { |
| compatible = "pci104c,8241"; |
| reg = <0x0 0x0 0x0 0x0 0x0>; |
| ti,pwron-active-high; |
| }; |
| }; |
