| menu "Vendor extensions" |
| |
| config RISCV_ISA_VENDOR_EXT |
| bool |
| |
| menu "Andes" |
| config RISCV_ISA_VENDOR_EXT_ANDES |
| bool "Andes vendor extension support" |
| select RISCV_ISA_VENDOR_EXT |
| default y |
| help |
| Say N here if you want to disable all Andes vendor extension |
| support. This will cause any Andes vendor extensions that are |
| requested by hardware probing to be ignored. |
| |
| If you don't know what to do here, say Y. |
| endmenu |
| |
| menu "T-Head" |
| config RISCV_ISA_VENDOR_EXT_THEAD |
| bool "T-Head vendor extension support" |
| select RISCV_ISA_VENDOR_EXT |
| default y |
| help |
| Say N here to disable detection of and support for all T-Head vendor |
| extensions. Without this option enabled, T-Head vendor extensions will |
| not be detected at boot and their presence not reported to userspace. |
| |
| If you don't know what to do here, say Y. |
| |
| config RISCV_ISA_XTHEADVECTOR |
| bool "xtheadvector extension support" |
| depends on RISCV_ISA_VENDOR_EXT_THEAD |
| depends on RISCV_ISA_V |
| depends on FPU |
| default y |
| help |
| Say N here if you want to disable all xtheadvector related procedures |
| in the kernel. This will disable vector for any T-Head board that |
| contains xtheadvector rather than the standard vector. |
| |
| If you don't know what to do here, say Y. |
| endmenu |
| |
| endmenu |
