| /* SPDX-License-Identifier: GPL-2.0-only */ |
| /* |
| * rt721-sdca-sdw.h -- RT721 SDCA ALSA SoC audio driver header |
| * |
| * Copyright(c) 2024 Realtek Semiconductor Corp. |
| */ |
| |
| #ifndef __RT721_SDW_H__ |
| #define __RT721_SDW_H__ |
| |
| #include <linux/regmap.h> |
| #include <linux/soundwire/sdw_registers.h> |
| |
| static const struct reg_default rt721_sdca_reg_defaults[] = { |
| { 0x202d, 0x00 }, |
| { 0x2f01, 0x00 }, |
| { 0x2f02, 0x09 }, |
| { 0x2f03, 0x08 }, |
| { 0x2f04, 0x00 }, |
| { 0x2f05, 0x0e }, |
| { 0x2f06, 0x01 }, |
| { 0x2f09, 0x00 }, |
| { 0x2f0a, 0x00 }, |
| { 0x2f35, 0x00 }, |
| { 0x2f50, 0xf0 }, |
| { 0x2f58, 0x07 }, |
| { 0x2f59, 0x07 }, |
| { 0x2f5a, 0x00 }, |
| { 0x2f5b, 0x07 }, |
| { 0x2f5c, 0x27 }, |
| { 0x2f5d, 0x07 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS01, |
| RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS11, |
| RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12, |
| RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40, |
| RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, |
| RT721_SDCA_CTL_FU_MUTE, CH_L), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, |
| RT721_SDCA_CTL_FU_MUTE, CH_R), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, |
| RT721_SDCA_CTL_FU_MUTE, CH_L), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, |
| RT721_SDCA_CTL_FU_MUTE, CH_R), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, |
| RT721_SDCA_CTL_FU_MUTE, CH_01), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, |
| RT721_SDCA_CTL_FU_MUTE, CH_02), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, |
| RT721_SDCA_CTL_FU_MUTE, CH_03), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, |
| RT721_SDCA_CTL_FU_MUTE, CH_04), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_CS1F, |
| RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_IT26, |
| RT721_SDCA_CTL_VENDOR_DEF, 0), 0x00 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A, |
| RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 }, |
| { SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_CS31, |
| RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 }, |
| { SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, |
| RT721_SDCA_CTL_FU_MUTE, CH_L), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, |
| RT721_SDCA_CTL_FU_MUTE, CH_R), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, |
| RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 }, |
| { SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_OT23, |
| RT721_SDCA_CTL_VENDOR_DEF, 0), 0x00 }, |
| { SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, |
| RT721_SDCA_CTL_FU_MUTE, CH_01), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23, |
| RT721_SDCA_CTL_FU_MUTE, CH_02), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55, |
| RT721_SDCA_CTL_FU_MUTE, CH_01), 0x01 }, |
| { SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55, |
| RT721_SDCA_CTL_FU_MUTE, CH_02), 0x01 }, |
| }; |
| |
| static const struct reg_default rt721_sdca_mbq_defaults[] = { |
| { 0x0900007, 0xc004 }, |
| { 0x2000001, 0x0000 }, |
| { 0x2000002, 0x0000 }, |
| { 0x2000003, 0x0000 }, |
| { 0x2000013, 0x8001 }, |
| { 0x200003c, 0x0000 }, |
| { 0x2000046, 0x3400 }, |
| { 0x5f00044, 0x6040 }, |
| { 0x5f00045, 0x3333 }, |
| { 0x5f00048, 0x0000 }, |
| { 0x6100005, 0x0005 }, |
| { 0x6100006, 0x0000 }, |
| { 0x610000d, 0x0051 }, |
| { 0x6100010, 0x0180 }, |
| { 0x6100011, 0x0000 }, |
| { 0x6100013, 0x0000 }, |
| { 0x6100015, 0x0000 }, |
| { 0x6100017, 0x8049 }, |
| { 0x6100025, 0x1000 }, |
| { 0x6100029, 0x0809 }, |
| { 0x610002c, 0x2828 }, |
| { 0x610002d, 0x2929 }, |
| { 0x610002e, 0x3529 }, |
| { 0x610002f, 0x2901 }, |
| { 0x6100053, 0x2630 }, |
| { 0x6100054, 0x2a2a }, |
| { 0x6100055, 0x152f }, |
| { 0x6100057, 0x2200 }, |
| { 0x610005a, 0x2a4b }, |
| { 0x610005b, 0x2a00 }, |
| { 0x610006a, 0x0102 }, |
| { 0x610006d, 0x0102 }, |
| { 0x6100092, 0x4f61 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, RT721_SDCA_CTL_FU_VOLUME, |
| CH_L), 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, RT721_SDCA_CTL_FU_VOLUME, |
| CH_R), 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, RT721_SDCA_CTL_FU_VOLUME, |
| CH_L), 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, RT721_SDCA_CTL_FU_VOLUME, |
| CH_R), 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, RT721_SDCA_CTL_FU_CH_GAIN, |
| CH_L), 0xfe00 }, |
| { SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, RT721_SDCA_CTL_FU_CH_GAIN, |
| CH_R), 0xfe00 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, RT721_SDCA_CTL_FU_CH_GAIN, CH_01), |
| 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, RT721_SDCA_CTL_FU_CH_GAIN, CH_02), |
| 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, RT721_SDCA_CTL_FU_CH_GAIN, CH_03), |
| 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, RT721_SDCA_CTL_FU_CH_GAIN, CH_04), |
| 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME, |
| CH_01), 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME, |
| CH_02), 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME, |
| CH_03), 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME, |
| CH_04), 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, RT721_SDCA_CTL_FU_VOLUME, CH_L), |
| 0x0000 }, |
| { SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, RT721_SDCA_CTL_FU_VOLUME, CH_R), |
| 0x0000 }, |
| }; |
| |
| #endif /* __RT721_SDW_H__ */ |