| Roman Kiryanov | 9557701 | 2018-08-27 11:22:59 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| Roman Kiryanov | 9557701 | 2018-08-27 11:22:59 -0700 | [diff] [blame] | 3 | * IMPORTANT: The following constants must match the ones used and defined in |
| 4 | * external/qemu/include/hw/misc/goldfish_pipe.h |
| 5 | */ |
| 6 | |
| 7 | #ifndef GOLDFISH_PIPE_QEMU_H |
| 8 | #define GOLDFISH_PIPE_QEMU_H |
| 9 | |
| 10 | /* List of bitflags returned in status of CMD_POLL command */ |
| 11 | enum PipePollFlags { |
| 12 | PIPE_POLL_IN = 1 << 0, |
| 13 | PIPE_POLL_OUT = 1 << 1, |
| 14 | PIPE_POLL_HUP = 1 << 2 |
| 15 | }; |
| 16 | |
| 17 | /* Possible status values used to signal errors */ |
| 18 | enum PipeErrors { |
| 19 | PIPE_ERROR_INVAL = -1, |
| 20 | PIPE_ERROR_AGAIN = -2, |
| 21 | PIPE_ERROR_NOMEM = -3, |
| 22 | PIPE_ERROR_IO = -4 |
| 23 | }; |
| 24 | |
| 25 | /* Bit-flags used to signal events from the emulator */ |
| 26 | enum PipeWakeFlags { |
| 27 | /* emulator closed pipe */ |
| 28 | PIPE_WAKE_CLOSED = 1 << 0, |
| 29 | |
| 30 | /* pipe can now be read from */ |
| 31 | PIPE_WAKE_READ = 1 << 1, |
| 32 | |
| 33 | /* pipe can now be written to */ |
| 34 | PIPE_WAKE_WRITE = 1 << 2, |
| 35 | |
| 36 | /* unlock this pipe's DMA buffer */ |
| 37 | PIPE_WAKE_UNLOCK_DMA = 1 << 3, |
| 38 | |
| 39 | /* unlock DMA buffer of the pipe shared to this pipe */ |
| 40 | PIPE_WAKE_UNLOCK_DMA_SHARED = 1 << 4, |
| 41 | }; |
| 42 | |
| 43 | /* Possible pipe closing reasons */ |
| 44 | enum PipeCloseReason { |
| 45 | /* guest sent a close command */ |
| 46 | PIPE_CLOSE_GRACEFUL = 0, |
| 47 | |
| 48 | /* guest rebooted, we're closing the pipes */ |
| 49 | PIPE_CLOSE_REBOOT = 1, |
| 50 | |
| 51 | /* close old pipes on snapshot load */ |
| 52 | PIPE_CLOSE_LOAD_SNAPSHOT = 2, |
| 53 | |
| 54 | /* some unrecoverable error on the pipe */ |
| 55 | PIPE_CLOSE_ERROR = 3, |
| 56 | }; |
| 57 | |
| 58 | /* Bit flags for the 'flags' field */ |
| 59 | enum PipeFlagsBits { |
| 60 | BIT_CLOSED_ON_HOST = 0, /* pipe closed by host */ |
| 61 | BIT_WAKE_ON_WRITE = 1, /* want to be woken on writes */ |
| 62 | BIT_WAKE_ON_READ = 2, /* want to be woken on reads */ |
| 63 | }; |
| 64 | |
| 65 | enum PipeRegs { |
| 66 | PIPE_REG_CMD = 0, |
| 67 | |
| 68 | PIPE_REG_SIGNAL_BUFFER_HIGH = 4, |
| 69 | PIPE_REG_SIGNAL_BUFFER = 8, |
| 70 | PIPE_REG_SIGNAL_BUFFER_COUNT = 12, |
| 71 | |
| 72 | PIPE_REG_OPEN_BUFFER_HIGH = 20, |
| 73 | PIPE_REG_OPEN_BUFFER = 24, |
| 74 | |
| 75 | PIPE_REG_VERSION = 36, |
| 76 | |
| 77 | PIPE_REG_GET_SIGNALLED = 48, |
| 78 | }; |
| 79 | |
| 80 | enum PipeCmdCode { |
| 81 | /* to be used by the pipe device itself */ |
| 82 | PIPE_CMD_OPEN = 1, |
| 83 | |
| 84 | PIPE_CMD_CLOSE, |
| 85 | PIPE_CMD_POLL, |
| 86 | PIPE_CMD_WRITE, |
| 87 | PIPE_CMD_WAKE_ON_WRITE, |
| 88 | PIPE_CMD_READ, |
| 89 | PIPE_CMD_WAKE_ON_READ, |
| 90 | |
| 91 | /* |
| 92 | * TODO(zyy): implement a deferred read/write execution to allow |
| 93 | * parallel processing of pipe operations on the host. |
| 94 | */ |
| 95 | PIPE_CMD_WAKE_ON_DONE_IO, |
| 96 | }; |
| 97 | |
| 98 | #endif /* GOLDFISH_PIPE_QEMU_H */ |
