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Koen Kooi91f62782018-07-17 08:51:49 +02001/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "am33xx.dtsi"
11#include "am335x-bone-common.dtsi"
12#include "am335x-boneblack-common.dtsi"
13#include <dt-bindings/interrupt-controller/irq.h>
14
15/ {
16 model = "SanCloud BeagleBone Enhanced";
17 compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
18};
19
20&am33xx_pinmux {
21 pinctrl-names = "default";
22
23 cpsw_default: cpsw_default {
24 pinctrl-single,pins = <
25 /* Slave 1 */
Christina Quastc5ebf242019-04-12 18:26:23 +020026 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */
27 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
28 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
29 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
30 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
31 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
32 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
33 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
34 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
35 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
36 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
37 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
Koen Kooi91f62782018-07-17 08:51:49 +020038 >;
39 };
40
41 cpsw_sleep: cpsw_sleep {
42 pinctrl-single,pins = <
43 /* Slave 1 reset value */
Christina Quastc5ebf242019-04-12 18:26:23 +020044 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
45 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
46 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
47 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
48 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
49 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
50 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
51 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
52 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
53 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
54 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
55 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
Koen Kooi91f62782018-07-17 08:51:49 +020056 >;
57 };
58
59 davinci_mdio_default: davinci_mdio_default {
60 pinctrl-single,pins = <
61 /* MDIO */
Christina Quastc5ebf242019-04-12 18:26:23 +020062 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
63 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
Koen Kooi91f62782018-07-17 08:51:49 +020064 >;
65 };
66
67 davinci_mdio_sleep: davinci_mdio_sleep {
68 pinctrl-single,pins = <
69 /* MDIO reset value */
Christina Quastc5ebf242019-04-12 18:26:23 +020070 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
71 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
Koen Kooi91f62782018-07-17 08:51:49 +020072 >;
73 };
74
75 usb_hub_ctrl: usb_hub_ctrl {
76 pinctrl-single,pins = <
Christina Quastc5ebf242019-04-12 18:26:23 +020077 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */
Koen Kooi91f62782018-07-17 08:51:49 +020078 >;
79 };
80
81 mpu6050_pins: pinmux_mpu6050_pins {
82 pinctrl-single,pins = <
Christina Quastc5ebf242019-04-12 18:26:23 +020083 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE7) /* uart0_ctsn.gpio1_8 */
Koen Kooi91f62782018-07-17 08:51:49 +020084 >;
85 };
86
87 lps3331ap_pins: pinmux_lps3331ap_pins {
88 pinctrl-single,pins = <
Christina Quastc5ebf242019-04-12 18:26:23 +020089 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7) /* gpmc_a10.gpio1_26 */
Koen Kooi91f62782018-07-17 08:51:49 +020090 >;
91 };
92};
93
94&mac {
95 pinctrl-names = "default", "sleep";
96 pinctrl-0 = <&cpsw_default>;
97 pinctrl-1 = <&cpsw_sleep>;
98 status = "okay";
99};
100
101&davinci_mdio {
102 pinctrl-names = "default", "sleep";
103 pinctrl-0 = <&davinci_mdio_default>;
104 pinctrl-1 = <&davinci_mdio_sleep>;
105 status = "okay";
Tony Lindgren5f681f42018-09-28 13:32:01 -0700106
107 ethphy0: ethernet-phy@0 {
108 reg = <0>;
109 };
Koen Kooi91f62782018-07-17 08:51:49 +0200110};
111
112&cpsw_emac0 {
Tony Lindgren5f681f42018-09-28 13:32:01 -0700113 phy-handle = <&ethphy0>;
Koen Kooi91f62782018-07-17 08:51:49 +0200114 phy-mode = "rgmii-txid";
115};
116
117&i2c0 {
118 lps331ap: barometer@5c {
119 compatible = "st,lps331ap-press";
120 st,drdy-int-pin = <1>;
121 reg = <0x5c>;
122 interrupt-parent = <&gpio1>;
123 interrupts = <26 IRQ_TYPE_EDGE_RISING>;
124 };
125
126 mpu6050: accelerometer@68 {
127 compatible = "invensense,mpu6050";
128 reg = <0x68>;
129 interrupt-parent = <&gpio0>;
130 interrupts = <2 IRQ_TYPE_EDGE_RISING>;
131 orientation = <0xff 0 0 0 1 0 0 0 0xff>;
132 };
133
134 usb2512b: usb-hub@2c {
135 compatible = "microchip,usb2512b";
136 reg = <0x2c>;
137 reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
138 /* wifi on port 4 */
139 };
140};