blob: 268fad5f51cf453d780394883bfef053fd6723bb [file] [log] [blame]
Thomas Gleixnerec8f24b2019-05-19 13:07:45 +01001# SPDX-License-Identifier: GPL-2.0-only
Guo Renc32e64e2018-09-05 14:25:06 +08002config CSKY
3 def_bool y
Yury Norov942fa982018-05-16 11:18:49 +03004 select ARCH_32BIT_OFF_T
Christoph Hellwig13bf5ce2019-03-25 15:44:06 +01005 select ARCH_HAS_DMA_PREP_COHERENT
Ma Junde863672020-03-10 23:32:56 +08006 select ARCH_HAS_GCOV_PROFILE_ALL
Guo Renc32e64e2018-09-05 14:25:06 +08007 select ARCH_HAS_SYNC_DMA_FOR_CPU
8 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
9 select ARCH_USE_BUILTIN_BSWAP
10 select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
Guo Ren18c07d22020-05-13 15:15:25 +080011 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610
Guo Ren953131e2020-07-30 12:44:12 +000012 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
Guo Renc32e64e2018-09-05 14:25:06 +080013 select COMMON_CLK
14 select CLKSRC_MMIO
Guo Ren1994cc42019-05-10 12:57:27 +080015 select CSKY_MPINTC if CPU_CK860
16 select CSKY_MP_TIMER if CPU_CK860
17 select CSKY_APB_INTC
Christoph Hellwigf04b9512018-11-04 17:47:44 +010018 select DMA_DIRECT_REMAP
Guo Renc32e64e2018-09-05 14:25:06 +080019 select IRQ_DOMAIN
20 select HANDLE_DOMAIN_IRQ
21 select DW_APB_TIMER_OF
Christoph Hellwig0055f672019-08-13 11:41:57 +020022 select GENERIC_IOREMAP
Guo Renc32e64e2018-09-05 14:25:06 +080023 select GENERIC_LIB_ASHLDI3
24 select GENERIC_LIB_ASHRDI3
25 select GENERIC_LIB_LSHRDI3
26 select GENERIC_LIB_MULDI3
27 select GENERIC_LIB_CMPDI2
28 select GENERIC_LIB_UCMPDI2
29 select GENERIC_ALLOCATOR
30 select GENERIC_ATOMIC64
31 select GENERIC_CLOCKEVENTS
32 select GENERIC_CPU_DEVICES
33 select GENERIC_IRQ_CHIP
34 select GENERIC_IRQ_PROBE
35 select GENERIC_IRQ_SHOW
36 select GENERIC_IRQ_MULTI_HANDLER
37 select GENERIC_SCHED_CLOCK
38 select GENERIC_SMP_IDLE_THREAD
Guo Ren1994cc42019-05-10 12:57:27 +080039 select GX6605S_TIMER if CPU_CK610
Guo Renc32e64e2018-09-05 14:25:06 +080040 select HAVE_ARCH_TRACEHOOK
Guo Ren2f7932b2019-03-20 18:27:27 +080041 select HAVE_ARCH_AUDITSYSCALL
Guo Ren953131e2020-07-30 12:44:12 +000042 select HAVE_ARCH_MMAP_RND_BITS
Guo Rene95a4f82020-05-26 08:11:52 +000043 select HAVE_ARCH_SECCOMP_FILTER
Guo Renbdcd93e2020-07-31 09:13:51 +000044 select HAVE_CONTEXT_TRACKING
45 select HAVE_VIRT_CPU_ACCOUNTING_GEN
Guo Ren18c07d22020-05-13 15:15:25 +080046 select HAVE_DEBUG_BUGVERBOSE
Guo Ren28bb0302019-03-01 08:50:36 +080047 select HAVE_DYNAMIC_FTRACE
Guo Ren89a39272020-02-18 20:27:39 +080048 select HAVE_DYNAMIC_FTRACE_WITH_REGS
Guo Ren230c77a2018-12-09 14:29:59 +080049 select HAVE_FUNCTION_TRACER
Guo Rend7950be12018-12-15 21:04:27 +080050 select HAVE_FUNCTION_GRAPH_TRACER
Guo Ren71e193d2020-07-28 16:30:46 +000051 select HAVE_FUNCTION_ERROR_INJECTION
Guo Ren28bb0302019-03-01 08:50:36 +080052 select HAVE_FTRACE_MCOUNT_RECORD
Guo Renc32e64e2018-09-05 14:25:06 +080053 select HAVE_KERNEL_GZIP
54 select HAVE_KERNEL_LZO
55 select HAVE_KERNEL_LZMA
Guo Ren33e53ae2020-04-01 09:17:02 +080056 select HAVE_KPROBES if !CPU_CK610
57 select HAVE_KPROBES_ON_FTRACE if !CPU_CK610
58 select HAVE_KRETPROBES if !CPU_CK610
Guo Renf50fd2d2019-01-02 22:09:25 +080059 select HAVE_PERF_EVENTS
Mao Handaac95e2019-04-15 17:17:29 +080060 select HAVE_PERF_REGS
61 select HAVE_PERF_USER_STACK_DUMP
Guo Renc32e64e2018-09-05 14:25:06 +080062 select HAVE_DMA_CONTIGUOUS
Guo Renbfe47f32019-12-17 14:57:22 +080063 select HAVE_REGS_AND_STACK_ACCESS_API
Guo Ren9866d142019-11-05 09:58:33 +080064 select HAVE_RSEQ
Mao Han2f78c732019-10-11 10:56:55 +080065 select HAVE_STACKPROTECTOR
Guo Ren2f7932b2019-03-20 18:27:27 +080066 select HAVE_SYSCALL_TRACEPOINTS
Guo Renc32e64e2018-09-05 14:25:06 +080067 select MAY_HAVE_SPARSE_IRQ
68 select MODULES_USE_ELF_RELA if MODULES
Guo Renc32e64e2018-09-05 14:25:06 +080069 select OF
70 select OF_EARLY_FLATTREE
Guo Renf50fd2d2019-01-02 22:09:25 +080071 select PERF_USE_VMALLOC if CPU_CK610
Guo Renc32e64e2018-09-05 14:25:06 +080072 select RTC_LIB
73 select TIMER_OF
74 select USB_ARCH_HAS_EHCI
75 select USB_ARCH_HAS_OHCI
MaJun5b49c822020-01-27 10:56:21 +080076 select GENERIC_PCI_IOMAP
77 select HAVE_PCI
78 select PCI_DOMAINS_GENERIC if PCI
79 select PCI_SYSCALL if PCI
80 select PCI_MSI if PCI
Christoph Hellwig5e6e9852020-09-03 16:22:35 +020081 select SET_FS
Guo Renc32e64e2018-09-05 14:25:06 +080082
Guo Ren000591f12020-04-02 19:39:42 +080083config LOCKDEP_SUPPORT
84 def_bool y
85
Guo Ren8f6bb792020-04-02 19:52:27 +080086config ARCH_SUPPORTS_UPROBES
87 def_bool y if !CPU_CK610
88
Guo Renc32e64e2018-09-05 14:25:06 +080089config CPU_HAS_CACHEV2
90 bool
91
92config CPU_HAS_FPUV2
93 bool
94
95config CPU_HAS_HILO
96 bool
97
98config CPU_HAS_TLBI
99 bool
100
101config CPU_HAS_LDSTEX
102 bool
103 help
Randy Dunlapbebd26a2020-01-31 17:52:30 -0800104 For SMP, CPU needs "ldex&stex" instructions for atomic operations.
Guo Renc32e64e2018-09-05 14:25:06 +0800105
106config CPU_NEED_TLBSYNC
107 bool
108
109config CPU_NEED_SOFTALIGN
110 bool
111
112config CPU_NO_USER_BKPT
113 bool
114 help
115 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
116 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
117 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
118 instruction exception.
119 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
120
121config GENERIC_CALIBRATE_DELAY
122 def_bool y
123
124config GENERIC_CSUM
125 def_bool y
126
127config GENERIC_HWEIGHT
128 def_bool y
129
130config MMU
131 def_bool y
132
Guo Ren0ea2dc72018-12-09 14:18:05 +0800133config STACKTRACE_SUPPORT
134 def_bool y
135
Guo Renc32e64e2018-09-05 14:25:06 +0800136config TIME_LOW_RES
137 def_bool y
138
139config TRACE_IRQFLAGS_SUPPORT
140 def_bool y
141
142config CPU_TLB_SIZE
143 int
144 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
145 default "1024" if (CPU_CK860)
146
147config CPU_ASID_BITS
148 int
149 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
150 default "12" if (CPU_CK860)
151
152config L1_CACHE_SHIFT
153 int
154 default "4" if (CPU_CK610)
155 default "5" if (CPU_CK807 || CPU_CK810)
156 default "6" if (CPU_CK860)
157
Guo Ren953131e2020-07-30 12:44:12 +0000158config ARCH_MMAP_RND_BITS_MIN
159 default 8
160
161# max bits determined by the following formula:
162# VA_BITS - PAGE_SHIFT - 3
163config ARCH_MMAP_RND_BITS_MAX
164 default 17
165
Guo Renc32e64e2018-09-05 14:25:06 +0800166menu "Processor type and features"
167
168choice
169 prompt "CPU MODEL"
170 default CPU_CK807
171
172config CPU_CK610
173 bool "CSKY CPU ck610"
174 select CPU_NEED_TLBSYNC
175 select CPU_NEED_SOFTALIGN
176 select CPU_NO_USER_BKPT
177
178config CPU_CK810
179 bool "CSKY CPU ck810"
180 select CPU_HAS_HILO
181 select CPU_NEED_TLBSYNC
182
183config CPU_CK807
184 bool "CSKY CPU ck807"
185 select CPU_HAS_HILO
186
187config CPU_CK860
188 bool "CSKY CPU ck860"
189 select CPU_HAS_TLBI
190 select CPU_HAS_CACHEV2
191 select CPU_HAS_LDSTEX
192 select CPU_HAS_FPUV2
193endchoice
194
195choice
Guo Renf50fd2d2019-01-02 22:09:25 +0800196 prompt "C-SKY PMU type"
197 depends on PERF_EVENTS
198 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
199
200config CPU_PMU_NONE
201 bool "None"
202
203config CSKY_PMU_V1
204 bool "Performance Monitoring Unit Ver.1"
205
206endchoice
207
208choice
Guo Renc32e64e2018-09-05 14:25:06 +0800209 prompt "Power Manager Instruction (wait/doze/stop)"
210 default CPU_PM_NONE
211
212config CPU_PM_NONE
213 bool "None"
214
215config CPU_PM_WAIT
216 bool "wait"
217
218config CPU_PM_DOZE
219 bool "doze"
220
221config CPU_PM_STOP
222 bool "stop"
223endchoice
224
Guo Renf525bb22019-11-27 08:44:33 +0800225menuconfig HAVE_TCM
226 bool "Tightly-Coupled/Sram Memory"
Guo Renf525bb22019-11-27 08:44:33 +0800227 select GENERIC_ALLOCATOR
228 help
229 The implementation are not only used by TCM (Tightly-Coupled Meory)
230 but also used by sram on SOC bus. It follow existed linux tcm
231 software interface, so that old tcm application codes could be
232 re-used directly.
233
234if HAVE_TCM
235config ITCM_RAM_BASE
236 hex "ITCM ram base"
237 default 0xffffffff
238
239config ITCM_NR_PAGES
240 int "Page count of ITCM size: NR*4KB"
241 range 1 256
242 default 32
243
244config HAVE_DTCM
245 bool "DTCM Support"
246
247config DTCM_RAM_BASE
248 hex "DTCM ram base"
249 depends on HAVE_DTCM
250 default 0xffffffff
251
252config DTCM_NR_PAGES
253 int "Page count of DTCM size: NR*4KB"
254 depends on HAVE_DTCM
255 range 1 256
256 default 32
257endif
258
Guo Renc32e64e2018-09-05 14:25:06 +0800259config CPU_HAS_VDSP
260 bool "CPU has VDSP coprocessor"
261 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
262
263config CPU_HAS_FPU
264 bool "CPU has FPU coprocessor"
265 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
266
Guo Ren761b4f62020-01-22 11:15:14 +0800267config CPU_HAS_ICACHE_INS
268 bool "CPU has Icache invalidate instructions"
269 depends on CPU_HAS_CACHEV2
270
Guo Renc32e64e2018-09-05 14:25:06 +0800271config CPU_HAS_TEE
272 bool "CPU has Trusted Execution Environment"
273 depends on CPU_CK810
274
275config SMP
276 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
277 depends on CPU_CK860
278 default n
279
280config NR_CPUS
281 int "Maximum number of CPUs (2-32)"
282 range 2 32
283 depends on SMP
Guo Ren50d23a12020-07-30 13:12:00 +0000284 default "4"
Guo Renc32e64e2018-09-05 14:25:06 +0800285
286config HIGHMEM
287 bool "High Memory Support"
288 depends on !CPU_CK610
289 default y
290
291config FORCE_MAX_ZONEORDER
292 int "Maximum zone order"
293 default "11"
294
295config RAM_BASE
296 hex "DRAM start addr (the same with memory-section in dts)"
297 default 0x0
298
Guo Ren859e5f42018-12-19 19:56:14 +0800299config HOTPLUG_CPU
300 bool "Support for hot-pluggable CPUs"
301 select GENERIC_IRQ_MIGRATION
302 depends on SMP
303 help
304 Say Y here to allow turning CPUs off and on. CPUs can be
305 controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
306
307 Say N if you want to disable CPU hotplug.
Guo Renc32e64e2018-09-05 14:25:06 +0800308endmenu
309
Guo Rena736fa12020-01-11 13:44:32 +0800310source "arch/csky/Kconfig.platforms"
311
Guo Renc32e64e2018-09-05 14:25:06 +0800312source "kernel/Kconfig.hz"