AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * machine generated DO NOT MODIFY |
| 4 | * source Sequoia_RegMap_customer_060.xml |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5 | * 2023-02-14 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef SEQUOIA_REGMAP_CUSTOMER_060_REG_H_ |
| 9 | #define SEQUOIA_REGMAP_CUSTOMER_060_REG_H_ |
| 10 | |
| 11 | /* needs linux/bits.h */ |
| 12 | |
| 13 | #define MAX77779_BFF(name, h, l) \ |
| 14 | static inline uint8_t _ ## name ## _set(uint8_t r, uint8_t v) \ |
| 15 | { \ |
| 16 | return ((r & ~GENMASK(h, l)) | v << l); \ |
| 17 | } \ |
| 18 | \ |
| 19 | static inline uint8_t _ ## name ## _get(uint8_t r) \ |
| 20 | { \ |
| 21 | return ((r & GENMASK(h, l)) >> l); \ |
| 22 | } |
| 23 | |
| 24 | |
| 25 | #define FIELD2VALUE(field,value) \ |
| 26 | (((value) & field##_MASK) >> field##_SHIFT) |
| 27 | #define VALUE2FIELD(field, value) \ |
| 28 | (((value) << field##_SHIFT) & field##_MASK) |
| 29 | |
| 30 | |
| 31 | /* |
| 32 | * Section: PMIC_FUNC 0x00 8 |
| 33 | */ |
| 34 | |
| 35 | |
| 36 | /* |
| 37 | * PMIC_ID,0x00,0b01111001,0x79,Reset_Type:O |
| 38 | */ |
| 39 | #define MAX77779_PMIC_ID 0x00 |
| 40 | |
| 41 | /* |
| 42 | * PMIC_REVISION,0x01,0b00000001,0x1,Reset_Type:O |
| 43 | * REV[0:3],VER[3:5] |
| 44 | */ |
| 45 | #define MAX77779_PMIC_REVISION 0x01 |
| 46 | #define MAX77779_PMIC_REVISION_REV_SHIFT 0 |
| 47 | #define MAX77779_PMIC_REVISION_REV_MASK (0x7 << 0) |
| 48 | #define MAX77779_PMIC_REVISION_REV_CLEAR (~(0x7 << 0)) |
| 49 | #define MAX77779_PMIC_REVISION_VER_SHIFT 3 |
| 50 | #define MAX77779_PMIC_REVISION_VER_MASK (0x1f << 3) |
| 51 | #define MAX77779_PMIC_REVISION_VER_CLEAR (~(0x1f << 3)) |
| 52 | static inline const char * |
| 53 | max77779_pmic_revision_cstr(char *buff, size_t len, int val) |
| 54 | { |
| 55 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 56 | int i = 0; |
| 57 | |
| 58 | i += scnprintf(&buff[i], len - i, " REV=%x", |
| 59 | FIELD2VALUE(MAX77779_REV, val)); |
| 60 | i += scnprintf(&buff[i], len - i, " VER=%x", |
| 61 | FIELD2VALUE(MAX77779_VER, val)); |
| 62 | #else |
| 63 | buff[0] = 0; |
| 64 | #endif |
| 65 | return buff; |
| 66 | } |
| 67 | |
| 68 | MAX77779_BFF(max77779_pmic_revision_rev,2,0) |
| 69 | MAX77779_BFF(max77779_pmic_revision_ver,7,3) |
| 70 | |
| 71 | /* |
| 72 | * OTP_REVISION,0x02,0b00000000,0x0,OTP:SHADOW, Reset_Type:O |
| 73 | */ |
| 74 | #define MAX77779_OTP_REVISION 0x02 |
| 75 | |
| 76 | /* |
| 77 | * INTSRC_STS,0x22,0b00000000,0x0,Reset_Type:S |
| 78 | * TCPC_INT,FG_INT,CHGR_INT,I2CM_INT,BATTVIMON_INT,GPIO_INT,VDROOP_INT,PMICTOP_INT |
| 79 | */ |
| 80 | #define MAX77779_INTSRC_STS 0x22 |
| 81 | #define MAX77779_INTSRC_STS_TCPC_INT_SHIFT 0 |
| 82 | #define MAX77779_INTSRC_STS_TCPC_INT_MASK (0x1 << 0) |
| 83 | #define MAX77779_INTSRC_STS_TCPC_INT_CLEAR (~(0x1 << 0)) |
| 84 | #define MAX77779_INTSRC_STS_FG_INT_SHIFT 1 |
| 85 | #define MAX77779_INTSRC_STS_FG_INT_MASK (0x1 << 1) |
| 86 | #define MAX77779_INTSRC_STS_FG_INT_CLEAR (~(0x1 << 1)) |
| 87 | #define MAX77779_INTSRC_STS_CHGR_INT_SHIFT 2 |
| 88 | #define MAX77779_INTSRC_STS_CHGR_INT_MASK (0x1 << 2) |
| 89 | #define MAX77779_INTSRC_STS_CHGR_INT_CLEAR (~(0x1 << 2)) |
| 90 | #define MAX77779_INTSRC_STS_I2CM_INT_SHIFT 3 |
| 91 | #define MAX77779_INTSRC_STS_I2CM_INT_MASK (0x1 << 3) |
| 92 | #define MAX77779_INTSRC_STS_I2CM_INT_CLEAR (~(0x1 << 3)) |
| 93 | #define MAX77779_INTSRC_STS_BATTVIMON_INT_SHIFT 4 |
| 94 | #define MAX77779_INTSRC_STS_BATTVIMON_INT_MASK (0x1 << 4) |
| 95 | #define MAX77779_INTSRC_STS_BATTVIMON_INT_CLEAR (~(0x1 << 4)) |
| 96 | #define MAX77779_INTSRC_STS_GPIO_INT_SHIFT 5 |
| 97 | #define MAX77779_INTSRC_STS_GPIO_INT_MASK (0x1 << 5) |
| 98 | #define MAX77779_INTSRC_STS_GPIO_INT_CLEAR (~(0x1 << 5)) |
| 99 | #define MAX77779_INTSRC_STS_VDROOP_INT_SHIFT 6 |
| 100 | #define MAX77779_INTSRC_STS_VDROOP_INT_MASK (0x1 << 6) |
| 101 | #define MAX77779_INTSRC_STS_VDROOP_INT_CLEAR (~(0x1 << 6)) |
| 102 | #define MAX77779_INTSRC_STS_PMICTOP_INT_SHIFT 7 |
| 103 | #define MAX77779_INTSRC_STS_PMICTOP_INT_MASK (0x1 << 7) |
| 104 | #define MAX77779_INTSRC_STS_PMICTOP_INT_CLEAR (~(0x1 << 7)) |
| 105 | static inline const char * |
| 106 | max77779_intsrc_sts_cstr(char *buff, size_t len, int val) |
| 107 | { |
| 108 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 109 | int i = 0; |
| 110 | |
| 111 | i += scnprintf(&buff[i], len - i, " TCPC_INT=%x", |
| 112 | FIELD2VALUE(MAX77779_TCPC_INT, val)); |
| 113 | i += scnprintf(&buff[i], len - i, " FG_INT=%x", |
| 114 | FIELD2VALUE(MAX77779_FG_INT, val)); |
| 115 | i += scnprintf(&buff[i], len - i, " CHGR_INT=%x", |
| 116 | FIELD2VALUE(MAX77779_CHGR_INT, val)); |
| 117 | i += scnprintf(&buff[i], len - i, " I2CM_INT=%x", |
| 118 | FIELD2VALUE(MAX77779_I2CM_INT, val)); |
| 119 | i += scnprintf(&buff[i], len - i, " BATTVIMON_INT=%x", |
| 120 | FIELD2VALUE(MAX77779_BATTVIMON_INT, val)); |
| 121 | i += scnprintf(&buff[i], len - i, " GPIO_INT=%x", |
| 122 | FIELD2VALUE(MAX77779_GPIO_INT, val)); |
| 123 | i += scnprintf(&buff[i], len - i, " VDROOP_INT=%x", |
| 124 | FIELD2VALUE(MAX77779_VDROOP_INT, val)); |
| 125 | i += scnprintf(&buff[i], len - i, " PMICTOP_INT=%x", |
| 126 | FIELD2VALUE(MAX77779_PMICTOP_INT, val)); |
| 127 | #else |
| 128 | buff[0] = 0; |
| 129 | #endif |
| 130 | return buff; |
| 131 | } |
| 132 | |
| 133 | MAX77779_BFF(max77779_intsrc_sts_tcpc_int,0,0) |
| 134 | MAX77779_BFF(max77779_intsrc_sts_fg_int,1,1) |
| 135 | MAX77779_BFF(max77779_intsrc_sts_chgr_int,2,2) |
| 136 | MAX77779_BFF(max77779_intsrc_sts_i2cm_int,3,3) |
| 137 | MAX77779_BFF(max77779_intsrc_sts_battvimon_int,4,4) |
| 138 | MAX77779_BFF(max77779_intsrc_sts_gpio_int,5,5) |
| 139 | MAX77779_BFF(max77779_intsrc_sts_vdroop_int,6,6) |
| 140 | MAX77779_BFF(max77779_intsrc_sts_pmictop_int,7,7) |
| 141 | |
| 142 | /* |
| 143 | * VDROOP_INT,0x23,0b00000000,0x0,Reset_Type:S |
| 144 | * OILO2_CNT_INT,OILO1_CNT_INT,UVLO2_CNT_INT,UVLO1_CNT_INT,BAT_OILO2_INT, |
| 145 | * BAT_OILO1_INT,SYS_UVLO2_INT,SYS_UVLO1_INT |
| 146 | */ |
| 147 | #define MAX77779_VDROOP_INT 0x23 |
| 148 | #define MAX77779_VDROOP_INT_OILO2_CNT_INT_SHIFT 0 |
| 149 | #define MAX77779_VDROOP_INT_OILO2_CNT_INT_MASK (0x1 << 0) |
| 150 | #define MAX77779_VDROOP_INT_OILO2_CNT_INT_CLEAR (~(0x1 << 0)) |
| 151 | #define MAX77779_VDROOP_INT_OILO1_CNT_INT_SHIFT 1 |
| 152 | #define MAX77779_VDROOP_INT_OILO1_CNT_INT_MASK (0x1 << 1) |
| 153 | #define MAX77779_VDROOP_INT_OILO1_CNT_INT_CLEAR (~(0x1 << 1)) |
| 154 | #define MAX77779_VDROOP_INT_UVLO2_CNT_INT_SHIFT 2 |
| 155 | #define MAX77779_VDROOP_INT_UVLO2_CNT_INT_MASK (0x1 << 2) |
| 156 | #define MAX77779_VDROOP_INT_UVLO2_CNT_INT_CLEAR (~(0x1 << 2)) |
| 157 | #define MAX77779_VDROOP_INT_UVLO1_CNT_INT_SHIFT 3 |
| 158 | #define MAX77779_VDROOP_INT_UVLO1_CNT_INT_MASK (0x1 << 3) |
| 159 | #define MAX77779_VDROOP_INT_UVLO1_CNT_INT_CLEAR (~(0x1 << 3)) |
| 160 | #define MAX77779_VDROOP_INT_BAT_OILO2_INT_SHIFT 4 |
| 161 | #define MAX77779_VDROOP_INT_BAT_OILO2_INT_MASK (0x1 << 4) |
| 162 | #define MAX77779_VDROOP_INT_BAT_OILO2_INT_CLEAR (~(0x1 << 4)) |
| 163 | #define MAX77779_VDROOP_INT_BAT_OILO1_INT_SHIFT 5 |
| 164 | #define MAX77779_VDROOP_INT_BAT_OILO1_INT_MASK (0x1 << 5) |
| 165 | #define MAX77779_VDROOP_INT_BAT_OILO1_INT_CLEAR (~(0x1 << 5)) |
| 166 | #define MAX77779_VDROOP_INT_SYS_UVLO2_INT_SHIFT 6 |
| 167 | #define MAX77779_VDROOP_INT_SYS_UVLO2_INT_MASK (0x1 << 6) |
| 168 | #define MAX77779_VDROOP_INT_SYS_UVLO2_INT_CLEAR (~(0x1 << 6)) |
| 169 | #define MAX77779_VDROOP_INT_SYS_UVLO1_INT_SHIFT 7 |
| 170 | #define MAX77779_VDROOP_INT_SYS_UVLO1_INT_MASK (0x1 << 7) |
| 171 | #define MAX77779_VDROOP_INT_SYS_UVLO1_INT_CLEAR (~(0x1 << 7)) |
| 172 | static inline const char * |
| 173 | max77779_vdroop_int_cstr(char *buff, size_t len, int val) |
| 174 | { |
| 175 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 176 | int i = 0; |
| 177 | |
| 178 | i += scnprintf(&buff[i], len - i, " OILO2_CNT_INT=%x", |
| 179 | FIELD2VALUE(MAX77779_OILO2_CNT_INT, val)); |
| 180 | i += scnprintf(&buff[i], len - i, " OILO1_CNT_INT=%x", |
| 181 | FIELD2VALUE(MAX77779_OILO1_CNT_INT, val)); |
| 182 | i += scnprintf(&buff[i], len - i, " UVLO2_CNT_INT=%x", |
| 183 | FIELD2VALUE(MAX77779_UVLO2_CNT_INT, val)); |
| 184 | i += scnprintf(&buff[i], len - i, " UVLO1_CNT_INT=%x", |
| 185 | FIELD2VALUE(MAX77779_UVLO1_CNT_INT, val)); |
| 186 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_INT=%x", |
| 187 | FIELD2VALUE(MAX77779_BAT_OILO2_INT, val)); |
| 188 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_INT=%x", |
| 189 | FIELD2VALUE(MAX77779_BAT_OILO1_INT, val)); |
| 190 | i += scnprintf(&buff[i], len - i, " SYS_UVLO2_INT=%x", |
| 191 | FIELD2VALUE(MAX77779_SYS_UVLO2_INT, val)); |
| 192 | i += scnprintf(&buff[i], len - i, " SYS_UVLO1_INT=%x", |
| 193 | FIELD2VALUE(MAX77779_SYS_UVLO1_INT, val)); |
| 194 | #else |
| 195 | buff[0] = 0; |
| 196 | #endif |
| 197 | return buff; |
| 198 | } |
| 199 | |
| 200 | MAX77779_BFF(max77779_vdroop_int_oilo2_cnt_int,0,0) |
| 201 | MAX77779_BFF(max77779_vdroop_int_oilo1_cnt_int,1,1) |
| 202 | MAX77779_BFF(max77779_vdroop_int_uvlo2_cnt_int,2,2) |
| 203 | MAX77779_BFF(max77779_vdroop_int_uvlo1_cnt_int,3,3) |
| 204 | MAX77779_BFF(max77779_vdroop_int_bat_oilo2_int,4,4) |
| 205 | MAX77779_BFF(max77779_vdroop_int_bat_oilo1_int,5,5) |
| 206 | MAX77779_BFF(max77779_vdroop_int_sys_uvlo2_int,6,6) |
| 207 | MAX77779_BFF(max77779_vdroop_int_sys_uvlo1_int,7,7) |
| 208 | |
| 209 | /* |
| 210 | * INTB_MASK,0x24,0b11111111,0xff,OTP:SHADOW, Reset_Type:S |
| 211 | * TCPC_INT_M,FG_INT_M,CHGR_INT_M,I2CM_INT_M,BATTVIMON_INT_M,GPIO_INT_M, |
| 212 | * VDROOP_INT_M__INT_MSK,PMICTOP_INT_M |
| 213 | */ |
| 214 | #define MAX77779_INTB_MASK 0x24 |
| 215 | #define MAX77779_INTB_MASK_TCPC_INT_M_SHIFT 0 |
| 216 | #define MAX77779_INTB_MASK_TCPC_INT_M_MASK (0x1 << 0) |
| 217 | #define MAX77779_INTB_MASK_TCPC_INT_M_CLEAR (~(0x1 << 0)) |
| 218 | #define MAX77779_INTB_MASK_FG_INT_M_SHIFT 1 |
| 219 | #define MAX77779_INTB_MASK_FG_INT_M_MASK (0x1 << 1) |
| 220 | #define MAX77779_INTB_MASK_FG_INT_M_CLEAR (~(0x1 << 1)) |
| 221 | #define MAX77779_INTB_MASK_CHGR_INT_M_SHIFT 2 |
| 222 | #define MAX77779_INTB_MASK_CHGR_INT_M_MASK (0x1 << 2) |
| 223 | #define MAX77779_INTB_MASK_CHGR_INT_M_CLEAR (~(0x1 << 2)) |
| 224 | #define MAX77779_INTB_MASK_I2CM_INT_M_SHIFT 3 |
| 225 | #define MAX77779_INTB_MASK_I2CM_INT_M_MASK (0x1 << 3) |
| 226 | #define MAX77779_INTB_MASK_I2CM_INT_M_CLEAR (~(0x1 << 3)) |
| 227 | #define MAX77779_INTB_MASK_BATTVIMON_INT_M_SHIFT 4 |
| 228 | #define MAX77779_INTB_MASK_BATTVIMON_INT_M_MASK (0x1 << 4) |
| 229 | #define MAX77779_INTB_MASK_BATTVIMON_INT_M_CLEAR (~(0x1 << 4)) |
| 230 | #define MAX77779_INTB_MASK_GPIO_INT_M_SHIFT 5 |
| 231 | #define MAX77779_INTB_MASK_GPIO_INT_M_MASK (0x1 << 5) |
| 232 | #define MAX77779_INTB_MASK_GPIO_INT_M_CLEAR (~(0x1 << 5)) |
| 233 | #define MAX77779_INTB_MASK_VDROOP_INT_M__INT_MSK_SHIFT 6 |
| 234 | #define MAX77779_INTB_MASK_VDROOP_INT_M__INT_MSK_MASK (0x1 << 6) |
| 235 | #define MAX77779_INTB_MASK_VDROOP_INT_M__INT_MSK_CLEAR (~(0x1 << 6)) |
| 236 | #define MAX77779_INTB_MASK_PMICTOP_INT_M_SHIFT 7 |
| 237 | #define MAX77779_INTB_MASK_PMICTOP_INT_M_MASK (0x1 << 7) |
| 238 | #define MAX77779_INTB_MASK_PMICTOP_INT_M_CLEAR (~(0x1 << 7)) |
| 239 | static inline const char * |
| 240 | max77779_intb_mask_cstr(char *buff, size_t len, int val) |
| 241 | { |
| 242 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 243 | int i = 0; |
| 244 | |
| 245 | i += scnprintf(&buff[i], len - i, " TCPC_INT_M=%x", |
| 246 | FIELD2VALUE(MAX77779_TCPC_INT_M, val)); |
| 247 | i += scnprintf(&buff[i], len - i, " FG_INT_M=%x", |
| 248 | FIELD2VALUE(MAX77779_FG_INT_M, val)); |
| 249 | i += scnprintf(&buff[i], len - i, " CHGR_INT_M=%x", |
| 250 | FIELD2VALUE(MAX77779_CHGR_INT_M, val)); |
| 251 | i += scnprintf(&buff[i], len - i, " I2CM_INT_M=%x", |
| 252 | FIELD2VALUE(MAX77779_I2CM_INT_M, val)); |
| 253 | i += scnprintf(&buff[i], len - i, " BATTVIMON_INT_M=%x", |
| 254 | FIELD2VALUE(MAX77779_BATTVIMON_INT_M, val)); |
| 255 | i += scnprintf(&buff[i], len - i, " GPIO_INT_M=%x", |
| 256 | FIELD2VALUE(MAX77779_GPIO_INT_M, val)); |
| 257 | i += scnprintf(&buff[i], len - i, " VDROOP_INT_M__INT_MSK=%x", |
| 258 | FIELD2VALUE(MAX77779_VDROOP_INT_M__INT_MSK, val)); |
| 259 | i += scnprintf(&buff[i], len - i, " PMICTOP_INT_M=%x", |
| 260 | FIELD2VALUE(MAX77779_PMICTOP_INT_M, val)); |
| 261 | #else |
| 262 | buff[0] = 0; |
| 263 | #endif |
| 264 | return buff; |
| 265 | } |
| 266 | |
| 267 | MAX77779_BFF(max77779_intb_mask_tcpc_int_m,0,0) |
| 268 | MAX77779_BFF(max77779_intb_mask_fg_int_m,1,1) |
| 269 | MAX77779_BFF(max77779_intb_mask_chgr_int_m,2,2) |
| 270 | MAX77779_BFF(max77779_intb_mask_i2cm_int_m,3,3) |
| 271 | MAX77779_BFF(max77779_intb_mask_battvimon_int_m,4,4) |
| 272 | MAX77779_BFF(max77779_intb_mask_gpio_int_m,5,5) |
| 273 | MAX77779_BFF(max77779_intb_mask_vdroop_int_m__int_msk,6,6) |
| 274 | MAX77779_BFF(max77779_intb_mask_pmictop_int_m,7,7) |
| 275 | |
| 276 | /* |
| 277 | * SPMI_INT_MASK,0x25,0b11111111,0xff,OTP:SHADOW, Reset_Type:S |
| 278 | * TCPC_INT_SM,FG_INT_SM,CHGR_INT_SM,I2CM_INT_SM,BATTVIMON_INT_SM,GPIO_INT_SM, |
| 279 | * VDROOP_INT_SM,PMICTOP_INT_SM |
| 280 | */ |
| 281 | #define MAX77779_SPMI_INT_MASK 0x25 |
| 282 | #define MAX77779_SPMI_INT_MASK_TCPC_INT_SM_SHIFT 0 |
| 283 | #define MAX77779_SPMI_INT_MASK_TCPC_INT_SM_MASK (0x1 << 0) |
| 284 | #define MAX77779_SPMI_INT_MASK_TCPC_INT_SM_CLEAR (~(0x1 << 0)) |
| 285 | #define MAX77779_SPMI_INT_MASK_FG_INT_SM_SHIFT 1 |
| 286 | #define MAX77779_SPMI_INT_MASK_FG_INT_SM_MASK (0x1 << 1) |
| 287 | #define MAX77779_SPMI_INT_MASK_FG_INT_SM_CLEAR (~(0x1 << 1)) |
| 288 | #define MAX77779_SPMI_INT_MASK_CHGR_INT_SM_SHIFT 2 |
| 289 | #define MAX77779_SPMI_INT_MASK_CHGR_INT_SM_MASK (0x1 << 2) |
| 290 | #define MAX77779_SPMI_INT_MASK_CHGR_INT_SM_CLEAR (~(0x1 << 2)) |
| 291 | #define MAX77779_SPMI_INT_MASK_I2CM_INT_SM_SHIFT 3 |
| 292 | #define MAX77779_SPMI_INT_MASK_I2CM_INT_SM_MASK (0x1 << 3) |
| 293 | #define MAX77779_SPMI_INT_MASK_I2CM_INT_SM_CLEAR (~(0x1 << 3)) |
| 294 | #define MAX77779_SPMI_INT_MASK_BATTVIMON_INT_SM_SHIFT 4 |
| 295 | #define MAX77779_SPMI_INT_MASK_BATTVIMON_INT_SM_MASK (0x1 << 4) |
| 296 | #define MAX77779_SPMI_INT_MASK_BATTVIMON_INT_SM_CLEAR (~(0x1 << 4)) |
| 297 | #define MAX77779_SPMI_INT_MASK_GPIO_INT_SM_SHIFT 5 |
| 298 | #define MAX77779_SPMI_INT_MASK_GPIO_INT_SM_MASK (0x1 << 5) |
| 299 | #define MAX77779_SPMI_INT_MASK_GPIO_INT_SM_CLEAR (~(0x1 << 5)) |
| 300 | #define MAX77779_SPMI_INT_MASK_VDROOP_INT_SM_SHIFT 6 |
| 301 | #define MAX77779_SPMI_INT_MASK_VDROOP_INT_SM_MASK (0x1 << 6) |
| 302 | #define MAX77779_SPMI_INT_MASK_VDROOP_INT_SM_CLEAR (~(0x1 << 6)) |
| 303 | #define MAX77779_SPMI_INT_MASK_PMICTOP_INT_SM_SHIFT 7 |
| 304 | #define MAX77779_SPMI_INT_MASK_PMICTOP_INT_SM_MASK (0x1 << 7) |
| 305 | #define MAX77779_SPMI_INT_MASK_PMICTOP_INT_SM_CLEAR (~(0x1 << 7)) |
| 306 | static inline const char * |
| 307 | max77779_spmi_int_mask_cstr(char *buff, size_t len, int val) |
| 308 | { |
| 309 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 310 | int i = 0; |
| 311 | |
| 312 | i += scnprintf(&buff[i], len - i, " TCPC_INT_SM=%x", |
| 313 | FIELD2VALUE(MAX77779_TCPC_INT_SM, val)); |
| 314 | i += scnprintf(&buff[i], len - i, " FG_INT_SM=%x", |
| 315 | FIELD2VALUE(MAX77779_FG_INT_SM, val)); |
| 316 | i += scnprintf(&buff[i], len - i, " CHGR_INT_SM=%x", |
| 317 | FIELD2VALUE(MAX77779_CHGR_INT_SM, val)); |
| 318 | i += scnprintf(&buff[i], len - i, " I2CM_INT_SM=%x", |
| 319 | FIELD2VALUE(MAX77779_I2CM_INT_SM, val)); |
| 320 | i += scnprintf(&buff[i], len - i, " BATTVIMON_INT_SM=%x", |
| 321 | FIELD2VALUE(MAX77779_BATTVIMON_INT_SM, val)); |
| 322 | i += scnprintf(&buff[i], len - i, " GPIO_INT_SM=%x", |
| 323 | FIELD2VALUE(MAX77779_GPIO_INT_SM, val)); |
| 324 | i += scnprintf(&buff[i], len - i, " VDROOP_INT_SM=%x", |
| 325 | FIELD2VALUE(MAX77779_VDROOP_INT_SM, val)); |
| 326 | i += scnprintf(&buff[i], len - i, " PMICTOP_INT_SM=%x", |
| 327 | FIELD2VALUE(MAX77779_PMICTOP_INT_SM, val)); |
| 328 | #else |
| 329 | buff[0] = 0; |
| 330 | #endif |
| 331 | return buff; |
| 332 | } |
| 333 | |
| 334 | MAX77779_BFF(max77779_spmi_int_mask_tcpc_int_sm,0,0) |
| 335 | MAX77779_BFF(max77779_spmi_int_mask_fg_int_sm,1,1) |
| 336 | MAX77779_BFF(max77779_spmi_int_mask_chgr_int_sm,2,2) |
| 337 | MAX77779_BFF(max77779_spmi_int_mask_i2cm_int_sm,3,3) |
| 338 | MAX77779_BFF(max77779_spmi_int_mask_battvimon_int_sm,4,4) |
| 339 | MAX77779_BFF(max77779_spmi_int_mask_gpio_int_sm,5,5) |
| 340 | MAX77779_BFF(max77779_spmi_int_mask_vdroop_int_sm,6,6) |
| 341 | MAX77779_BFF(max77779_spmi_int_mask_pmictop_int_sm,7,7) |
| 342 | |
| 343 | /* |
| 344 | * SPMI_INT_PRIORITY,0x26,0b11111111,0xff,Reset_Type:S |
| 345 | * TCPC_INT_PR,FG_INT_PR,CHGR_INT_PR,I2CM_INT_PR,BATTVIMON_PR,GPIO_INT_PR, |
| 346 | * VDROOP_INT_PR,PMICTOP_INTB_PR |
| 347 | */ |
| 348 | #define MAX77779_SPMI_INT_PRIORITY 0x26 |
| 349 | #define MAX77779_SPMI_INT_PRIORITY_TCPC_INT_PR_SHIFT 0 |
| 350 | #define MAX77779_SPMI_INT_PRIORITY_TCPC_INT_PR_MASK (0x1 << 0) |
| 351 | #define MAX77779_SPMI_INT_PRIORITY_TCPC_INT_PR_CLEAR (~(0x1 << 0)) |
| 352 | #define MAX77779_SPMI_INT_PRIORITY_FG_INT_PR_SHIFT 1 |
| 353 | #define MAX77779_SPMI_INT_PRIORITY_FG_INT_PR_MASK (0x1 << 1) |
| 354 | #define MAX77779_SPMI_INT_PRIORITY_FG_INT_PR_CLEAR (~(0x1 << 1)) |
| 355 | #define MAX77779_SPMI_INT_PRIORITY_CHGR_INT_PR_SHIFT 2 |
| 356 | #define MAX77779_SPMI_INT_PRIORITY_CHGR_INT_PR_MASK (0x1 << 2) |
| 357 | #define MAX77779_SPMI_INT_PRIORITY_CHGR_INT_PR_CLEAR (~(0x1 << 2)) |
| 358 | #define MAX77779_SPMI_INT_PRIORITY_I2CM_INT_PR_SHIFT 3 |
| 359 | #define MAX77779_SPMI_INT_PRIORITY_I2CM_INT_PR_MASK (0x1 << 3) |
| 360 | #define MAX77779_SPMI_INT_PRIORITY_I2CM_INT_PR_CLEAR (~(0x1 << 3)) |
| 361 | #define MAX77779_SPMI_INT_PRIORITY_BATTVIMON_PR_SHIFT 4 |
| 362 | #define MAX77779_SPMI_INT_PRIORITY_BATTVIMON_PR_MASK (0x1 << 4) |
| 363 | #define MAX77779_SPMI_INT_PRIORITY_BATTVIMON_PR_CLEAR (~(0x1 << 4)) |
| 364 | #define MAX77779_SPMI_INT_PRIORITY_GPIO_INT_PR_SHIFT 5 |
| 365 | #define MAX77779_SPMI_INT_PRIORITY_GPIO_INT_PR_MASK (0x1 << 5) |
| 366 | #define MAX77779_SPMI_INT_PRIORITY_GPIO_INT_PR_CLEAR (~(0x1 << 5)) |
| 367 | #define MAX77779_SPMI_INT_PRIORITY_VDROOP_INT_PR_SHIFT 6 |
| 368 | #define MAX77779_SPMI_INT_PRIORITY_VDROOP_INT_PR_MASK (0x1 << 6) |
| 369 | #define MAX77779_SPMI_INT_PRIORITY_VDROOP_INT_PR_CLEAR (~(0x1 << 6)) |
| 370 | #define MAX77779_SPMI_INT_PRIORITY_PMICTOP_INTB_PR_SHIFT 7 |
| 371 | #define MAX77779_SPMI_INT_PRIORITY_PMICTOP_INTB_PR_MASK (0x1 << 7) |
| 372 | #define MAX77779_SPMI_INT_PRIORITY_PMICTOP_INTB_PR_CLEAR (~(0x1 << 7)) |
| 373 | static inline const char * |
| 374 | max77779_spmi_int_priority_cstr(char *buff, size_t len, int val) |
| 375 | { |
| 376 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 377 | int i = 0; |
| 378 | |
| 379 | i += scnprintf(&buff[i], len - i, " TCPC_INT_PR=%x", |
| 380 | FIELD2VALUE(MAX77779_TCPC_INT_PR, val)); |
| 381 | i += scnprintf(&buff[i], len - i, " FG_INT_PR=%x", |
| 382 | FIELD2VALUE(MAX77779_FG_INT_PR, val)); |
| 383 | i += scnprintf(&buff[i], len - i, " CHGR_INT_PR=%x", |
| 384 | FIELD2VALUE(MAX77779_CHGR_INT_PR, val)); |
| 385 | i += scnprintf(&buff[i], len - i, " I2CM_INT_PR=%x", |
| 386 | FIELD2VALUE(MAX77779_I2CM_INT_PR, val)); |
| 387 | i += scnprintf(&buff[i], len - i, " BATTVIMON_PR=%x", |
| 388 | FIELD2VALUE(MAX77779_BATTVIMON_PR, val)); |
| 389 | i += scnprintf(&buff[i], len - i, " GPIO_INT_PR=%x", |
| 390 | FIELD2VALUE(MAX77779_GPIO_INT_PR, val)); |
| 391 | i += scnprintf(&buff[i], len - i, " VDROOP_INT_PR=%x", |
| 392 | FIELD2VALUE(MAX77779_VDROOP_INT_PR, val)); |
| 393 | i += scnprintf(&buff[i], len - i, " PMICTOP_INTB_PR=%x", |
| 394 | FIELD2VALUE(MAX77779_PMICTOP_INTB_PR, val)); |
| 395 | #else |
| 396 | buff[0] = 0; |
| 397 | #endif |
| 398 | return buff; |
| 399 | } |
| 400 | |
| 401 | MAX77779_BFF(max77779_spmi_int_priority_tcpc_int_pr,0,0) |
| 402 | MAX77779_BFF(max77779_spmi_int_priority_fg_int_pr,1,1) |
| 403 | MAX77779_BFF(max77779_spmi_int_priority_chgr_int_pr,2,2) |
| 404 | MAX77779_BFF(max77779_spmi_int_priority_i2cm_int_pr,3,3) |
| 405 | MAX77779_BFF(max77779_spmi_int_priority_battvimon_pr,4,4) |
| 406 | MAX77779_BFF(max77779_spmi_int_priority_gpio_int_pr,5,5) |
| 407 | MAX77779_BFF(max77779_spmi_int_priority_vdroop_int_pr,6,6) |
| 408 | MAX77779_BFF(max77779_spmi_int_priority_pmictop_intb_pr,7,7) |
| 409 | |
| 410 | /* |
| 411 | * VDROOP_INT_MASK,0x27,0b11111111,0xff,OTP:SHADOW, Reset_Type:O |
| 412 | * OILO2_CNT_M,OILO1_CNT_M,UVLO2_CNT_M,UVLO1_CNT_M,BAT_OILO2_M,BAT_OILO1_M, |
| 413 | * SYS_UVLO2_M,SYS_UVLO1_M |
| 414 | */ |
| 415 | #define MAX77779_VDROOP_INT_MASK 0x27 |
| 416 | #define MAX77779_VDROOP_INT_MASK_OILO2_CNT_M_SHIFT 0 |
| 417 | #define MAX77779_VDROOP_INT_MASK_OILO2_CNT_M_MASK (0x1 << 0) |
| 418 | #define MAX77779_VDROOP_INT_MASK_OILO2_CNT_M_CLEAR (~(0x1 << 0)) |
| 419 | #define MAX77779_VDROOP_INT_MASK_OILO1_CNT_M_SHIFT 1 |
| 420 | #define MAX77779_VDROOP_INT_MASK_OILO1_CNT_M_MASK (0x1 << 1) |
| 421 | #define MAX77779_VDROOP_INT_MASK_OILO1_CNT_M_CLEAR (~(0x1 << 1)) |
| 422 | #define MAX77779_VDROOP_INT_MASK_UVLO2_CNT_M_SHIFT 2 |
| 423 | #define MAX77779_VDROOP_INT_MASK_UVLO2_CNT_M_MASK (0x1 << 2) |
| 424 | #define MAX77779_VDROOP_INT_MASK_UVLO2_CNT_M_CLEAR (~(0x1 << 2)) |
| 425 | #define MAX77779_VDROOP_INT_MASK_UVLO1_CNT_M_SHIFT 3 |
| 426 | #define MAX77779_VDROOP_INT_MASK_UVLO1_CNT_M_MASK (0x1 << 3) |
| 427 | #define MAX77779_VDROOP_INT_MASK_UVLO1_CNT_M_CLEAR (~(0x1 << 3)) |
| 428 | #define MAX77779_VDROOP_INT_MASK_BAT_OILO2_M_SHIFT 4 |
| 429 | #define MAX77779_VDROOP_INT_MASK_BAT_OILO2_M_MASK (0x1 << 4) |
| 430 | #define MAX77779_VDROOP_INT_MASK_BAT_OILO2_M_CLEAR (~(0x1 << 4)) |
| 431 | #define MAX77779_VDROOP_INT_MASK_BAT_OILO1_M_SHIFT 5 |
| 432 | #define MAX77779_VDROOP_INT_MASK_BAT_OILO1_M_MASK (0x1 << 5) |
| 433 | #define MAX77779_VDROOP_INT_MASK_BAT_OILO1_M_CLEAR (~(0x1 << 5)) |
| 434 | #define MAX77779_VDROOP_INT_MASK_SYS_UVLO2_M_SHIFT 6 |
| 435 | #define MAX77779_VDROOP_INT_MASK_SYS_UVLO2_M_MASK (0x1 << 6) |
| 436 | #define MAX77779_VDROOP_INT_MASK_SYS_UVLO2_M_CLEAR (~(0x1 << 6)) |
| 437 | #define MAX77779_VDROOP_INT_MASK_SYS_UVLO1_M_SHIFT 7 |
| 438 | #define MAX77779_VDROOP_INT_MASK_SYS_UVLO1_M_MASK (0x1 << 7) |
| 439 | #define MAX77779_VDROOP_INT_MASK_SYS_UVLO1_M_CLEAR (~(0x1 << 7)) |
| 440 | static inline const char * |
| 441 | max77779_vdroop_int_mask_cstr(char *buff, size_t len, int val) |
| 442 | { |
| 443 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 444 | int i = 0; |
| 445 | |
| 446 | i += scnprintf(&buff[i], len - i, " OILO2_CNT_M=%x", |
| 447 | FIELD2VALUE(MAX77779_OILO2_CNT_M, val)); |
| 448 | i += scnprintf(&buff[i], len - i, " OILO1_CNT_M=%x", |
| 449 | FIELD2VALUE(MAX77779_OILO1_CNT_M, val)); |
| 450 | i += scnprintf(&buff[i], len - i, " UVLO2_CNT_M=%x", |
| 451 | FIELD2VALUE(MAX77779_UVLO2_CNT_M, val)); |
| 452 | i += scnprintf(&buff[i], len - i, " UVLO1_CNT_M=%x", |
| 453 | FIELD2VALUE(MAX77779_UVLO1_CNT_M, val)); |
| 454 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_M=%x", |
| 455 | FIELD2VALUE(MAX77779_BAT_OILO2_M, val)); |
| 456 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_M=%x", |
| 457 | FIELD2VALUE(MAX77779_BAT_OILO1_M, val)); |
| 458 | i += scnprintf(&buff[i], len - i, " SYS_UVLO2_M=%x", |
| 459 | FIELD2VALUE(MAX77779_SYS_UVLO2_M, val)); |
| 460 | i += scnprintf(&buff[i], len - i, " SYS_UVLO1_M=%x", |
| 461 | FIELD2VALUE(MAX77779_SYS_UVLO1_M, val)); |
| 462 | #else |
| 463 | buff[0] = 0; |
| 464 | #endif |
| 465 | return buff; |
| 466 | } |
| 467 | |
| 468 | MAX77779_BFF(max77779_vdroop_int_mask_oilo2_cnt_m,0,0) |
| 469 | MAX77779_BFF(max77779_vdroop_int_mask_oilo1_cnt_m,1,1) |
| 470 | MAX77779_BFF(max77779_vdroop_int_mask_uvlo2_cnt_m,2,2) |
| 471 | MAX77779_BFF(max77779_vdroop_int_mask_uvlo1_cnt_m,3,3) |
| 472 | MAX77779_BFF(max77779_vdroop_int_mask_bat_oilo2_m,4,4) |
| 473 | MAX77779_BFF(max77779_vdroop_int_mask_bat_oilo1_m,5,5) |
| 474 | MAX77779_BFF(max77779_vdroop_int_mask_sys_uvlo2_m,6,6) |
| 475 | MAX77779_BFF(max77779_vdroop_int_mask_sys_uvlo1_m,7,7) |
| 476 | |
| 477 | /* |
| 478 | * VDROOP_INT_SPMI_MASK,0x28,0b11111111,0xff,OTP:SHADOW, Reset_Type:O |
| 479 | * OILO2_CNT_SM,OILO1_CNT_SM,UVLO2_CNT_SM,UVLO1_CNT_SM,BAT_OILO2_SM,BAT_OILO1_SM, |
| 480 | * SYS_UVLO2_SM,SYS_UVLO1_SM |
| 481 | */ |
| 482 | #define MAX77779_VDROOP_INT_SPMI_MASK 0x28 |
| 483 | #define MAX77779_VDROOP_INT_SPMI_MASK_OILO2_CNT_SM_SHIFT 0 |
| 484 | #define MAX77779_VDROOP_INT_SPMI_MASK_OILO2_CNT_SM_MASK (0x1 << 0) |
| 485 | #define MAX77779_VDROOP_INT_SPMI_MASK_OILO2_CNT_SM_CLEAR (~(0x1 << 0)) |
| 486 | #define MAX77779_VDROOP_INT_SPMI_MASK_OILO1_CNT_SM_SHIFT 1 |
| 487 | #define MAX77779_VDROOP_INT_SPMI_MASK_OILO1_CNT_SM_MASK (0x1 << 1) |
| 488 | #define MAX77779_VDROOP_INT_SPMI_MASK_OILO1_CNT_SM_CLEAR (~(0x1 << 1)) |
| 489 | #define MAX77779_VDROOP_INT_SPMI_MASK_UVLO2_CNT_SM_SHIFT 2 |
| 490 | #define MAX77779_VDROOP_INT_SPMI_MASK_UVLO2_CNT_SM_MASK (0x1 << 2) |
| 491 | #define MAX77779_VDROOP_INT_SPMI_MASK_UVLO2_CNT_SM_CLEAR (~(0x1 << 2)) |
| 492 | #define MAX77779_VDROOP_INT_SPMI_MASK_UVLO1_CNT_SM_SHIFT 3 |
| 493 | #define MAX77779_VDROOP_INT_SPMI_MASK_UVLO1_CNT_SM_MASK (0x1 << 3) |
| 494 | #define MAX77779_VDROOP_INT_SPMI_MASK_UVLO1_CNT_SM_CLEAR (~(0x1 << 3)) |
| 495 | #define MAX77779_VDROOP_INT_SPMI_MASK_BAT_OILO2_SM_SHIFT 4 |
| 496 | #define MAX77779_VDROOP_INT_SPMI_MASK_BAT_OILO2_SM_MASK (0x1 << 4) |
| 497 | #define MAX77779_VDROOP_INT_SPMI_MASK_BAT_OILO2_SM_CLEAR (~(0x1 << 4)) |
| 498 | #define MAX77779_VDROOP_INT_SPMI_MASK_BAT_OILO1_SM_SHIFT 5 |
| 499 | #define MAX77779_VDROOP_INT_SPMI_MASK_BAT_OILO1_SM_MASK (0x1 << 5) |
| 500 | #define MAX77779_VDROOP_INT_SPMI_MASK_BAT_OILO1_SM_CLEAR (~(0x1 << 5)) |
| 501 | #define MAX77779_VDROOP_INT_SPMI_MASK_SYS_UVLO2_SM_SHIFT 6 |
| 502 | #define MAX77779_VDROOP_INT_SPMI_MASK_SYS_UVLO2_SM_MASK (0x1 << 6) |
| 503 | #define MAX77779_VDROOP_INT_SPMI_MASK_SYS_UVLO2_SM_CLEAR (~(0x1 << 6)) |
| 504 | #define MAX77779_VDROOP_INT_SPMI_MASK_SYS_UVLO1_SM_SHIFT 7 |
| 505 | #define MAX77779_VDROOP_INT_SPMI_MASK_SYS_UVLO1_SM_MASK (0x1 << 7) |
| 506 | #define MAX77779_VDROOP_INT_SPMI_MASK_SYS_UVLO1_SM_CLEAR (~(0x1 << 7)) |
| 507 | static inline const char * |
| 508 | max77779_vdroop_int_spmi_mask_cstr(char *buff, size_t len, int val) |
| 509 | { |
| 510 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 511 | int i = 0; |
| 512 | |
| 513 | i += scnprintf(&buff[i], len - i, " OILO2_CNT_SM=%x", |
| 514 | FIELD2VALUE(MAX77779_OILO2_CNT_SM, val)); |
| 515 | i += scnprintf(&buff[i], len - i, " OILO1_CNT_SM=%x", |
| 516 | FIELD2VALUE(MAX77779_OILO1_CNT_SM, val)); |
| 517 | i += scnprintf(&buff[i], len - i, " UVLO2_CNT_SM=%x", |
| 518 | FIELD2VALUE(MAX77779_UVLO2_CNT_SM, val)); |
| 519 | i += scnprintf(&buff[i], len - i, " UVLO1_CNT_SM=%x", |
| 520 | FIELD2VALUE(MAX77779_UVLO1_CNT_SM, val)); |
| 521 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_SM=%x", |
| 522 | FIELD2VALUE(MAX77779_BAT_OILO2_SM, val)); |
| 523 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_SM=%x", |
| 524 | FIELD2VALUE(MAX77779_BAT_OILO1_SM, val)); |
| 525 | i += scnprintf(&buff[i], len - i, " SYS_UVLO2_SM=%x", |
| 526 | FIELD2VALUE(MAX77779_SYS_UVLO2_SM, val)); |
| 527 | i += scnprintf(&buff[i], len - i, " SYS_UVLO1_SM=%x", |
| 528 | FIELD2VALUE(MAX77779_SYS_UVLO1_SM, val)); |
| 529 | #else |
| 530 | buff[0] = 0; |
| 531 | #endif |
| 532 | return buff; |
| 533 | } |
| 534 | |
| 535 | MAX77779_BFF(max77779_vdroop_int_spmi_mask_oilo2_cnt_sm,0,0) |
| 536 | MAX77779_BFF(max77779_vdroop_int_spmi_mask_oilo1_cnt_sm,1,1) |
| 537 | MAX77779_BFF(max77779_vdroop_int_spmi_mask_uvlo2_cnt_sm,2,2) |
| 538 | MAX77779_BFF(max77779_vdroop_int_spmi_mask_uvlo1_cnt_sm,3,3) |
| 539 | MAX77779_BFF(max77779_vdroop_int_spmi_mask_bat_oilo2_sm,4,4) |
| 540 | MAX77779_BFF(max77779_vdroop_int_spmi_mask_bat_oilo1_sm,5,5) |
| 541 | MAX77779_BFF(max77779_vdroop_int_spmi_mask_sys_uvlo2_sm,6,6) |
| 542 | MAX77779_BFF(max77779_vdroop_int_spmi_mask_sys_uvlo1_sm,7,7) |
| 543 | |
| 544 | /* |
| 545 | * VDROOP_INT_SPMI_PRIORITY,0x29,0b11111111,0xff,OTP:SHADOW, Reset_Type:O |
| 546 | * OILO2_CNT_PR,OILO1_CNT_PR,UVLO2_CNT_PR,UVLO1_CNT_PR,BAT_OILO2_PR,BAT_OILO1_PR, |
| 547 | * SYS_UVLO2_PR,SYS_UVLO1_PR |
| 548 | */ |
| 549 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY 0x29 |
| 550 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_OILO2_CNT_PR_SHIFT 0 |
| 551 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_OILO2_CNT_PR_MASK (0x1 << 0) |
| 552 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_OILO2_CNT_PR_CLEAR (~(0x1 << 0)) |
| 553 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_OILO1_CNT_PR_SHIFT 1 |
| 554 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_OILO1_CNT_PR_MASK (0x1 << 1) |
| 555 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_OILO1_CNT_PR_CLEAR (~(0x1 << 1)) |
| 556 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_UVLO2_CNT_PR_SHIFT 2 |
| 557 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_UVLO2_CNT_PR_MASK (0x1 << 2) |
| 558 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_UVLO2_CNT_PR_CLEAR (~(0x1 << 2)) |
| 559 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_UVLO1_CNT_PR_SHIFT 3 |
| 560 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_UVLO1_CNT_PR_MASK (0x1 << 3) |
| 561 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_UVLO1_CNT_PR_CLEAR (~(0x1 << 3)) |
| 562 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_BAT_OILO2_PR_SHIFT 4 |
| 563 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_BAT_OILO2_PR_MASK (0x1 << 4) |
| 564 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_BAT_OILO2_PR_CLEAR (~(0x1 << 4)) |
| 565 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_BAT_OILO1_PR_SHIFT 5 |
| 566 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_BAT_OILO1_PR_MASK (0x1 << 5) |
| 567 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_BAT_OILO1_PR_CLEAR (~(0x1 << 5)) |
| 568 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_SYS_UVLO2_PR_SHIFT 6 |
| 569 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_SYS_UVLO2_PR_MASK (0x1 << 6) |
| 570 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_SYS_UVLO2_PR_CLEAR (~(0x1 << 6)) |
| 571 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_SYS_UVLO1_PR_SHIFT 7 |
| 572 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_SYS_UVLO1_PR_MASK (0x1 << 7) |
| 573 | #define MAX77779_VDROOP_INT_SPMI_PRIORITY_SYS_UVLO1_PR_CLEAR (~(0x1 << 7)) |
| 574 | static inline const char * |
| 575 | max77779_vdroop_int_spmi_priority_cstr(char *buff, size_t len, int val) |
| 576 | { |
| 577 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 578 | int i = 0; |
| 579 | |
| 580 | i += scnprintf(&buff[i], len - i, " OILO2_CNT_PR=%x", |
| 581 | FIELD2VALUE(MAX77779_OILO2_CNT_PR, val)); |
| 582 | i += scnprintf(&buff[i], len - i, " OILO1_CNT_PR=%x", |
| 583 | FIELD2VALUE(MAX77779_OILO1_CNT_PR, val)); |
| 584 | i += scnprintf(&buff[i], len - i, " UVLO2_CNT_PR=%x", |
| 585 | FIELD2VALUE(MAX77779_UVLO2_CNT_PR, val)); |
| 586 | i += scnprintf(&buff[i], len - i, " UVLO1_CNT_PR=%x", |
| 587 | FIELD2VALUE(MAX77779_UVLO1_CNT_PR, val)); |
| 588 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_PR=%x", |
| 589 | FIELD2VALUE(MAX77779_BAT_OILO2_PR, val)); |
| 590 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_PR=%x", |
| 591 | FIELD2VALUE(MAX77779_BAT_OILO1_PR, val)); |
| 592 | i += scnprintf(&buff[i], len - i, " SYS_UVLO2_PR=%x", |
| 593 | FIELD2VALUE(MAX77779_SYS_UVLO2_PR, val)); |
| 594 | i += scnprintf(&buff[i], len - i, " SYS_UVLO1_PR=%x", |
| 595 | FIELD2VALUE(MAX77779_SYS_UVLO1_PR, val)); |
| 596 | #else |
| 597 | buff[0] = 0; |
| 598 | #endif |
| 599 | return buff; |
| 600 | } |
| 601 | |
| 602 | MAX77779_BFF(max77779_vdroop_int_spmi_priority_oilo2_cnt_pr,0,0) |
| 603 | MAX77779_BFF(max77779_vdroop_int_spmi_priority_oilo1_cnt_pr,1,1) |
| 604 | MAX77779_BFF(max77779_vdroop_int_spmi_priority_uvlo2_cnt_pr,2,2) |
| 605 | MAX77779_BFF(max77779_vdroop_int_spmi_priority_uvlo1_cnt_pr,3,3) |
| 606 | MAX77779_BFF(max77779_vdroop_int_spmi_priority_bat_oilo2_pr,4,4) |
| 607 | MAX77779_BFF(max77779_vdroop_int_spmi_priority_bat_oilo1_pr,5,5) |
| 608 | MAX77779_BFF(max77779_vdroop_int_spmi_priority_sys_uvlo2_pr,6,6) |
| 609 | MAX77779_BFF(max77779_vdroop_int_spmi_priority_sys_uvlo1_pr,7,7) |
| 610 | |
| 611 | /* |
| 612 | * PMICTOP_INT_STS,0x2A,0b00000000,0x0,Reset_Type:S |
| 613 | * SPR_2_0[0:2],VDDPOR_INT,SysMsgI_INT,SYSUVLO_INT,SYSOVLO_INT,TSHDN_INT, |
| 614 | * APCmdResI_INT |
| 615 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 616 | #define MAX77779_PMICTOP_INT_STS 0x2a |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 617 | #define MAX77779_PMICTOP_INT_STS_SPR_2_0_SHIFT 0 |
| 618 | #define MAX77779_PMICTOP_INT_STS_SPR_2_0_MASK (0x3 << 0) |
| 619 | #define MAX77779_PMICTOP_INT_STS_SPR_2_0_CLEAR (~(0x3 << 0)) |
| 620 | #define MAX77779_PMICTOP_INT_STS_VDDPOR_INT_SHIFT 2 |
| 621 | #define MAX77779_PMICTOP_INT_STS_VDDPOR_INT_MASK (0x1 << 2) |
| 622 | #define MAX77779_PMICTOP_INT_STS_VDDPOR_INT_CLEAR (~(0x1 << 2)) |
| 623 | #define MAX77779_PMICTOP_INT_STS_SysMsgI_INT_SHIFT 3 |
| 624 | #define MAX77779_PMICTOP_INT_STS_SysMsgI_INT_MASK (0x1 << 3) |
| 625 | #define MAX77779_PMICTOP_INT_STS_SysMsgI_INT_CLEAR (~(0x1 << 3)) |
| 626 | #define MAX77779_PMICTOP_INT_STS_SYSUVLO_INT_SHIFT 4 |
| 627 | #define MAX77779_PMICTOP_INT_STS_SYSUVLO_INT_MASK (0x1 << 4) |
| 628 | #define MAX77779_PMICTOP_INT_STS_SYSUVLO_INT_CLEAR (~(0x1 << 4)) |
| 629 | #define MAX77779_PMICTOP_INT_STS_SYSOVLO_INT_SHIFT 5 |
| 630 | #define MAX77779_PMICTOP_INT_STS_SYSOVLO_INT_MASK (0x1 << 5) |
| 631 | #define MAX77779_PMICTOP_INT_STS_SYSOVLO_INT_CLEAR (~(0x1 << 5)) |
| 632 | #define MAX77779_PMICTOP_INT_STS_TSHDN_INT_SHIFT 6 |
| 633 | #define MAX77779_PMICTOP_INT_STS_TSHDN_INT_MASK (0x1 << 6) |
| 634 | #define MAX77779_PMICTOP_INT_STS_TSHDN_INT_CLEAR (~(0x1 << 6)) |
| 635 | #define MAX77779_PMICTOP_INT_STS_APCmdResI_INT_SHIFT 7 |
| 636 | #define MAX77779_PMICTOP_INT_STS_APCmdResI_INT_MASK (0x1 << 7) |
| 637 | #define MAX77779_PMICTOP_INT_STS_APCmdResI_INT_CLEAR (~(0x1 << 7)) |
| 638 | static inline const char * |
| 639 | max77779_pmictop_int_sts_cstr(char *buff, size_t len, int val) |
| 640 | { |
| 641 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 642 | int i = 0; |
| 643 | |
| 644 | i += scnprintf(&buff[i], len - i, " SPR_2_0=%x", |
| 645 | FIELD2VALUE(MAX77779_SPR_2_0, val)); |
| 646 | i += scnprintf(&buff[i], len - i, " VDDPOR_INT=%x", |
| 647 | FIELD2VALUE(MAX77779_VDDPOR_INT, val)); |
| 648 | i += scnprintf(&buff[i], len - i, " SysMsgI_INT=%x", |
| 649 | FIELD2VALUE(MAX77779_SysMsgI_INT, val)); |
| 650 | i += scnprintf(&buff[i], len - i, " SYSUVLO_INT=%x", |
| 651 | FIELD2VALUE(MAX77779_SYSUVLO_INT, val)); |
| 652 | i += scnprintf(&buff[i], len - i, " SYSOVLO_INT=%x", |
| 653 | FIELD2VALUE(MAX77779_SYSOVLO_INT, val)); |
| 654 | i += scnprintf(&buff[i], len - i, " TSHDN_INT=%x", |
| 655 | FIELD2VALUE(MAX77779_TSHDN_INT, val)); |
| 656 | i += scnprintf(&buff[i], len - i, " APCmdResI_INT=%x", |
| 657 | FIELD2VALUE(MAX77779_APCmdResI_INT, val)); |
| 658 | #else |
| 659 | buff[0] = 0; |
| 660 | #endif |
| 661 | return buff; |
| 662 | } |
| 663 | |
| 664 | MAX77779_BFF(max77779_pmictop_int_sts_spr_2_0,1,0) |
| 665 | MAX77779_BFF(max77779_pmictop_int_sts_vddpor_int,2,2) |
| 666 | MAX77779_BFF(max77779_pmictop_int_sts_sysmsgi_int,3,3) |
| 667 | MAX77779_BFF(max77779_pmictop_int_sts_sysuvlo_int,4,4) |
| 668 | MAX77779_BFF(max77779_pmictop_int_sts_sysovlo_int,5,5) |
| 669 | MAX77779_BFF(max77779_pmictop_int_sts_tshdn_int,6,6) |
| 670 | MAX77779_BFF(max77779_pmictop_int_sts_apcmdresi_int,7,7) |
| 671 | |
| 672 | /* |
| 673 | * PMICTOP_INT_MASK,0x2B,0b11111111,0xff,Reset_Type:S |
| 674 | * FSHIP_NOT_RD,SPR_2_1,VDDPOR_M,SysMsg_M,SYSUVLO_INT_M,SYSOVLO_INT_M, |
| 675 | * TSHDN_INT_M,APCmdRes_M |
| 676 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 677 | #define MAX77779_PMICTOP_INT_MASK 0x2b |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 678 | #define MAX77779_PMICTOP_INT_MASK_FSHIP_NOT_RD_SHIFT 0 |
| 679 | #define MAX77779_PMICTOP_INT_MASK_FSHIP_NOT_RD_MASK (0x1 << 0) |
| 680 | #define MAX77779_PMICTOP_INT_MASK_FSHIP_NOT_RD_CLEAR (~(0x1 << 0)) |
| 681 | #define MAX77779_PMICTOP_INT_MASK_SPR_2_1_SHIFT 1 |
| 682 | #define MAX77779_PMICTOP_INT_MASK_SPR_2_1_MASK (0x1 << 1) |
| 683 | #define MAX77779_PMICTOP_INT_MASK_SPR_2_1_CLEAR (~(0x1 << 1)) |
| 684 | #define MAX77779_PMICTOP_INT_MASK_VDDPOR_M_SHIFT 2 |
| 685 | #define MAX77779_PMICTOP_INT_MASK_VDDPOR_M_MASK (0x1 << 2) |
| 686 | #define MAX77779_PMICTOP_INT_MASK_VDDPOR_M_CLEAR (~(0x1 << 2)) |
| 687 | #define MAX77779_PMICTOP_INT_MASK_SysMsg_M_SHIFT 3 |
| 688 | #define MAX77779_PMICTOP_INT_MASK_SysMsg_M_MASK (0x1 << 3) |
| 689 | #define MAX77779_PMICTOP_INT_MASK_SysMsg_M_CLEAR (~(0x1 << 3)) |
| 690 | #define MAX77779_PMICTOP_INT_MASK_SYSUVLO_INT_M_SHIFT 4 |
| 691 | #define MAX77779_PMICTOP_INT_MASK_SYSUVLO_INT_M_MASK (0x1 << 4) |
| 692 | #define MAX77779_PMICTOP_INT_MASK_SYSUVLO_INT_M_CLEAR (~(0x1 << 4)) |
| 693 | #define MAX77779_PMICTOP_INT_MASK_SYSOVLO_INT_M_SHIFT 5 |
| 694 | #define MAX77779_PMICTOP_INT_MASK_SYSOVLO_INT_M_MASK (0x1 << 5) |
| 695 | #define MAX77779_PMICTOP_INT_MASK_SYSOVLO_INT_M_CLEAR (~(0x1 << 5)) |
| 696 | #define MAX77779_PMICTOP_INT_MASK_TSHDN_INT_M_SHIFT 6 |
| 697 | #define MAX77779_PMICTOP_INT_MASK_TSHDN_INT_M_MASK (0x1 << 6) |
| 698 | #define MAX77779_PMICTOP_INT_MASK_TSHDN_INT_M_CLEAR (~(0x1 << 6)) |
| 699 | #define MAX77779_PMICTOP_INT_MASK_APCmdRes_M_SHIFT 7 |
| 700 | #define MAX77779_PMICTOP_INT_MASK_APCmdRes_M_MASK (0x1 << 7) |
| 701 | #define MAX77779_PMICTOP_INT_MASK_APCmdRes_M_CLEAR (~(0x1 << 7)) |
| 702 | static inline const char * |
| 703 | max77779_pmictop_int_mask_cstr(char *buff, size_t len, int val) |
| 704 | { |
| 705 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 706 | int i = 0; |
| 707 | |
| 708 | i += scnprintf(&buff[i], len - i, " FSHIP_NOT_RD=%x", |
| 709 | FIELD2VALUE(MAX77779_FSHIP_NOT_RD, val)); |
| 710 | i += scnprintf(&buff[i], len - i, " SPR_2_1=%x", |
| 711 | FIELD2VALUE(MAX77779_SPR_2_1, val)); |
| 712 | i += scnprintf(&buff[i], len - i, " VDDPOR_M=%x", |
| 713 | FIELD2VALUE(MAX77779_VDDPOR_M, val)); |
| 714 | i += scnprintf(&buff[i], len - i, " SysMsg_M=%x", |
| 715 | FIELD2VALUE(MAX77779_SysMsg_M, val)); |
| 716 | i += scnprintf(&buff[i], len - i, " SYSUVLO_INT_M=%x", |
| 717 | FIELD2VALUE(MAX77779_SYSUVLO_INT_M, val)); |
| 718 | i += scnprintf(&buff[i], len - i, " SYSOVLO_INT_M=%x", |
| 719 | FIELD2VALUE(MAX77779_SYSOVLO_INT_M, val)); |
| 720 | i += scnprintf(&buff[i], len - i, " TSHDN_INT_M=%x", |
| 721 | FIELD2VALUE(MAX77779_TSHDN_INT_M, val)); |
| 722 | i += scnprintf(&buff[i], len - i, " APCmdRes_M=%x", |
| 723 | FIELD2VALUE(MAX77779_APCmdRes_M, val)); |
| 724 | #else |
| 725 | buff[0] = 0; |
| 726 | #endif |
| 727 | return buff; |
| 728 | } |
| 729 | |
| 730 | MAX77779_BFF(max77779_pmictop_int_mask_fship_not_rd,0,0) |
| 731 | MAX77779_BFF(max77779_pmictop_int_mask_spr_2_1,1,1) |
| 732 | MAX77779_BFF(max77779_pmictop_int_mask_vddpor_m,2,2) |
| 733 | MAX77779_BFF(max77779_pmictop_int_mask_sysmsg_m,3,3) |
| 734 | MAX77779_BFF(max77779_pmictop_int_mask_sysuvlo_int_m,4,4) |
| 735 | MAX77779_BFF(max77779_pmictop_int_mask_sysovlo_int_m,5,5) |
| 736 | MAX77779_BFF(max77779_pmictop_int_mask_tshdn_int_m,6,6) |
| 737 | MAX77779_BFF(max77779_pmictop_int_mask_apcmdres_m,7,7) |
| 738 | |
| 739 | /* |
| 740 | * EVENT_CNT_CFG,0x30,0b00000000,0x0,Reset_Type:O |
| 741 | * ENABLE,SAMPLE_RATE[1:2],SPR_7_3[3:5] |
| 742 | */ |
| 743 | #define MAX77779_EVENT_CNT_CFG 0x30 |
| 744 | #define MAX77779_EVENT_CNT_CFG_ENABLE_SHIFT 0 |
| 745 | #define MAX77779_EVENT_CNT_CFG_ENABLE_MASK (0x1 << 0) |
| 746 | #define MAX77779_EVENT_CNT_CFG_ENABLE_CLEAR (~(0x1 << 0)) |
| 747 | #define MAX77779_EVENT_CNT_CFG_SAMPLE_RATE_SHIFT 1 |
| 748 | #define MAX77779_EVENT_CNT_CFG_SAMPLE_RATE_MASK (0x3 << 1) |
| 749 | #define MAX77779_EVENT_CNT_CFG_SAMPLE_RATE_CLEAR (~(0x3 << 1)) |
| 750 | #define MAX77779_EVENT_CNT_CFG_SPR_7_3_SHIFT 3 |
| 751 | #define MAX77779_EVENT_CNT_CFG_SPR_7_3_MASK (0x1f << 3) |
| 752 | #define MAX77779_EVENT_CNT_CFG_SPR_7_3_CLEAR (~(0x1f << 3)) |
| 753 | static inline const char * |
| 754 | max77779_event_cnt_cfg_cstr(char *buff, size_t len, int val) |
| 755 | { |
| 756 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 757 | int i = 0; |
| 758 | |
| 759 | i += scnprintf(&buff[i], len - i, " ENABLE=%x", |
| 760 | FIELD2VALUE(MAX77779_ENABLE, val)); |
| 761 | i += scnprintf(&buff[i], len - i, " SAMPLE_RATE=%x", |
| 762 | FIELD2VALUE(MAX77779_SAMPLE_RATE, val)); |
| 763 | i += scnprintf(&buff[i], len - i, " SPR_7_3=%x", |
| 764 | FIELD2VALUE(MAX77779_SPR_7_3, val)); |
| 765 | #else |
| 766 | buff[0] = 0; |
| 767 | #endif |
| 768 | return buff; |
| 769 | } |
| 770 | |
| 771 | MAX77779_BFF(max77779_event_cnt_cfg_enable,0,0) |
| 772 | MAX77779_BFF(max77779_event_cnt_cfg_sample_rate,2,1) |
| 773 | MAX77779_BFF(max77779_event_cnt_cfg_spr_7_3,7,3) |
| 774 | |
| 775 | /* |
| 776 | * EVENT_CNT_OILO0_THR,0x31,0b00000000,0x0,Reset_Type:S |
| 777 | */ |
| 778 | #define MAX77779_EVENT_CNT_OILO0_THR 0x31 |
| 779 | |
| 780 | /* |
| 781 | * EVENT_CNT_OILO1_THR,0x32,0b00000000,0x0,Reset_Type:S |
| 782 | */ |
| 783 | #define MAX77779_EVENT_CNT_OILO1_THR 0x32 |
| 784 | |
| 785 | /* |
| 786 | * EVENT_CNT_UVLO0_THR,0x33,0b00000000,0x0,Reset_Type:S |
| 787 | */ |
| 788 | #define MAX77779_EVENT_CNT_UVLO0_THR 0x33 |
| 789 | |
| 790 | /* |
| 791 | * EVENT_CNT_UVLO1_THR,0x34,0b00000000,0x0,Reset_Type:S |
| 792 | */ |
| 793 | #define MAX77779_EVENT_CNT_UVLO1_THR 0x34 |
| 794 | |
| 795 | /* |
| 796 | * EVENT_CNT_OILO0,0x35,0b00000000,0x0,Reset_Type:S |
| 797 | */ |
| 798 | #define MAX77779_EVENT_CNT_OILO0 0x35 |
| 799 | |
| 800 | /* |
| 801 | * EVENT_CNT_OILO1,0x36,0b00000000,0x0,Reset_Type:S |
| 802 | */ |
| 803 | #define MAX77779_EVENT_CNT_OILO1 0x36 |
| 804 | |
| 805 | /* |
| 806 | * EVENT_CNT_UVLO0,0x37,0b00000000,0x0,Reset_Type:S |
| 807 | */ |
| 808 | #define MAX77779_EVENT_CNT_UVLO0 0x37 |
| 809 | |
| 810 | /* |
| 811 | * EVENT_CNT_UVLO1,0x38,0b00000000,0x0,Reset_Type:S |
| 812 | */ |
| 813 | #define MAX77779_EVENT_CNT_UVLO1 0x38 |
| 814 | |
| 815 | /* |
| 816 | * I2C_CNFG,0x40,0b00000000,0x0,Reset_Type:O |
| 817 | * HS_EXT_EN,SPR_3_1[1:3],PAIR[4:3],SPR_7 |
| 818 | */ |
| 819 | #define MAX77779_I2C_CNFG 0x40 |
| 820 | #define MAX77779_I2C_CNFG_HS_EXT_EN_SHIFT 0 |
| 821 | #define MAX77779_I2C_CNFG_HS_EXT_EN_MASK (0x1 << 0) |
| 822 | #define MAX77779_I2C_CNFG_HS_EXT_EN_CLEAR (~(0x1 << 0)) |
| 823 | #define MAX77779_I2C_CNFG_SPR_3_1_SHIFT 1 |
| 824 | #define MAX77779_I2C_CNFG_SPR_3_1_MASK (0x7 << 1) |
| 825 | #define MAX77779_I2C_CNFG_SPR_3_1_CLEAR (~(0x7 << 1)) |
| 826 | #define MAX77779_I2C_CNFG_PAIR_SHIFT 4 |
| 827 | #define MAX77779_I2C_CNFG_PAIR_MASK (0x7 << 4) |
| 828 | #define MAX77779_I2C_CNFG_PAIR_CLEAR (~(0x7 << 4)) |
| 829 | #define MAX77779_I2C_CNFG_SPR_7_SHIFT 7 |
| 830 | #define MAX77779_I2C_CNFG_SPR_7_MASK (0x1 << 7) |
| 831 | #define MAX77779_I2C_CNFG_SPR_7_CLEAR (~(0x1 << 7)) |
| 832 | static inline const char * |
| 833 | max77779_i2c_cnfg_cstr(char *buff, size_t len, int val) |
| 834 | { |
| 835 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 836 | int i = 0; |
| 837 | |
| 838 | i += scnprintf(&buff[i], len - i, " HS_EXT_EN=%x", |
| 839 | FIELD2VALUE(MAX77779_HS_EXT_EN, val)); |
| 840 | i += scnprintf(&buff[i], len - i, " SPR_3_1=%x", |
| 841 | FIELD2VALUE(MAX77779_SPR_3_1, val)); |
| 842 | i += scnprintf(&buff[i], len - i, " PAIR=%x", |
| 843 | FIELD2VALUE(MAX77779_PAIR, val)); |
| 844 | i += scnprintf(&buff[i], len - i, " SPR_7=%x", |
| 845 | FIELD2VALUE(MAX77779_SPR_7, val)); |
| 846 | #else |
| 847 | buff[0] = 0; |
| 848 | #endif |
| 849 | return buff; |
| 850 | } |
| 851 | |
| 852 | MAX77779_BFF(max77779_i2c_cnfg_hs_ext_en,0,0) |
| 853 | MAX77779_BFF(max77779_i2c_cnfg_spr_3_1,3,1) |
| 854 | MAX77779_BFF(max77779_i2c_cnfg_pair,6,4) |
| 855 | MAX77779_BFF(max77779_i2c_cnfg_spr_7,7,7) |
| 856 | |
| 857 | /* |
| 858 | * SPMI_CNFG,0x41,0b00000010,0x2,OTP:SHADOW, Reset_Type:O |
| 859 | * CLOAD[0:2],SPR_3_2[2:2],VIO_HIGH,SPR_7_5[5:3] |
| 860 | */ |
| 861 | #define MAX77779_SPMI_CNFG 0x41 |
| 862 | #define MAX77779_SPMI_CNFG_CLOAD_SHIFT 0 |
| 863 | #define MAX77779_SPMI_CNFG_CLOAD_MASK (0x3 << 0) |
| 864 | #define MAX77779_SPMI_CNFG_CLOAD_CLEAR (~(0x3 << 0)) |
| 865 | #define MAX77779_SPMI_CNFG_SPR_3_2_SHIFT 2 |
| 866 | #define MAX77779_SPMI_CNFG_SPR_3_2_MASK (0x3 << 2) |
| 867 | #define MAX77779_SPMI_CNFG_SPR_3_2_CLEAR (~(0x3 << 2)) |
| 868 | #define MAX77779_SPMI_CNFG_VIO_HIGH_SHIFT 4 |
| 869 | #define MAX77779_SPMI_CNFG_VIO_HIGH_MASK (0x1 << 4) |
| 870 | #define MAX77779_SPMI_CNFG_VIO_HIGH_CLEAR (~(0x1 << 4)) |
| 871 | #define MAX77779_SPMI_CNFG_SPR_7_5_SHIFT 5 |
| 872 | #define MAX77779_SPMI_CNFG_SPR_7_5_MASK (0x7 << 5) |
| 873 | #define MAX77779_SPMI_CNFG_SPR_7_5_CLEAR (~(0x7 << 5)) |
| 874 | static inline const char * |
| 875 | max77779_spmi_cnfg_cstr(char *buff, size_t len, int val) |
| 876 | { |
| 877 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 878 | int i = 0; |
| 879 | |
| 880 | i += scnprintf(&buff[i], len - i, " CLOAD=%x", |
| 881 | FIELD2VALUE(MAX77779_CLOAD, val)); |
| 882 | i += scnprintf(&buff[i], len - i, " SPR_3_2=%x", |
| 883 | FIELD2VALUE(MAX77779_SPR_3_2, val)); |
| 884 | i += scnprintf(&buff[i], len - i, " VIO_HIGH=%x", |
| 885 | FIELD2VALUE(MAX77779_VIO_HIGH, val)); |
| 886 | i += scnprintf(&buff[i], len - i, " SPR_7_5=%x", |
| 887 | FIELD2VALUE(MAX77779_SPR_7_5, val)); |
| 888 | #else |
| 889 | buff[0] = 0; |
| 890 | #endif |
| 891 | return buff; |
| 892 | } |
| 893 | |
| 894 | MAX77779_BFF(max77779_spmi_cnfg_cload,1,0) |
| 895 | MAX77779_BFF(max77779_spmi_cnfg_spr_3_2,3,2) |
| 896 | MAX77779_BFF(max77779_spmi_cnfg_vio_high,4,4) |
| 897 | MAX77779_BFF(max77779_spmi_cnfg_spr_7_5,7,5) |
| 898 | |
| 899 | /* |
| 900 | * SPMI_MID,0x42,0b00000010,0x2,Reset_Type:O |
| 901 | * SPMI_MID[0:2],SPR_6_2[2:5],SPMI_MSG_REPEAT |
| 902 | */ |
| 903 | #define MAX77779_SPMI_MID 0x42 |
| 904 | #define MAX77779_SPMI_MID_SPMI_MID_SHIFT 0 |
| 905 | #define MAX77779_SPMI_MID_SPMI_MID_MASK (0x3 << 0) |
| 906 | #define MAX77779_SPMI_MID_SPMI_MID_CLEAR (~(0x3 << 0)) |
| 907 | #define MAX77779_SPMI_MID_SPR_6_2_SHIFT 2 |
| 908 | #define MAX77779_SPMI_MID_SPR_6_2_MASK (0x1f << 2) |
| 909 | #define MAX77779_SPMI_MID_SPR_6_2_CLEAR (~(0x1f << 2)) |
| 910 | #define MAX77779_SPMI_MID_SPMI_MSG_REPEAT_SHIFT 7 |
| 911 | #define MAX77779_SPMI_MID_SPMI_MSG_REPEAT_MASK (0x1 << 7) |
| 912 | #define MAX77779_SPMI_MID_SPMI_MSG_REPEAT_CLEAR (~(0x1 << 7)) |
| 913 | static inline const char * |
| 914 | max77779_spmi_mid_cstr(char *buff, size_t len, int val) |
| 915 | { |
| 916 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 917 | int i = 0; |
| 918 | |
| 919 | i += scnprintf(&buff[i], len - i, " SPMI_MID=%x", |
| 920 | FIELD2VALUE(MAX77779_SPMI_MID, val)); |
| 921 | i += scnprintf(&buff[i], len - i, " SPR_6_2=%x", |
| 922 | FIELD2VALUE(MAX77779_SPR_6_2, val)); |
| 923 | i += scnprintf(&buff[i], len - i, " SPMI_MSG_REPEAT=%x", |
| 924 | FIELD2VALUE(MAX77779_SPMI_MSG_REPEAT, val)); |
| 925 | #else |
| 926 | buff[0] = 0; |
| 927 | #endif |
| 928 | return buff; |
| 929 | } |
| 930 | |
| 931 | MAX77779_BFF(max77779_spmi_mid_spmi_mid,1,0) |
| 932 | MAX77779_BFF(max77779_spmi_mid_spr_6_2,6,2) |
| 933 | MAX77779_BFF(max77779_spmi_mid_spmi_msg_repeat,7,7) |
| 934 | |
| 935 | /* |
| 936 | * SPMI_MADDR,0x43,0b00000000,0x0,Reset_Type:O |
| 937 | */ |
| 938 | #define MAX77779_SPMI_MADDR 0x43 |
| 939 | |
| 940 | /* |
| 941 | * SWRESET,0x50,0b00000000,0x0,Reset_Type:S, (Exception: SWR_RST bits are not register type which can retain data) |
| 942 | * SWR_RST[0:6],IC_RST_MASK,VIO_OK_MASK |
| 943 | */ |
| 944 | #define MAX77779_SWRESET 0x50 |
| 945 | #define MAX77779_SWRESET_SWR_RST_SHIFT 0 |
| 946 | #define MAX77779_SWRESET_SWR_RST_MASK (0x3f << 0) |
| 947 | #define MAX77779_SWRESET_SWR_RST_CLEAR (~(0x3f << 0)) |
| 948 | #define MAX77779_SWRESET_IC_RST_MASK_SHIFT 6 |
| 949 | #define MAX77779_SWRESET_IC_RST_MASK_MASK (0x1 << 6) |
| 950 | #define MAX77779_SWRESET_IC_RST_MASK_CLEAR (~(0x1 << 6)) |
| 951 | #define MAX77779_SWRESET_VIO_OK_MASK_SHIFT 7 |
| 952 | #define MAX77779_SWRESET_VIO_OK_MASK_MASK (0x1 << 7) |
| 953 | #define MAX77779_SWRESET_VIO_OK_MASK_CLEAR (~(0x1 << 7)) |
| 954 | static inline const char * |
| 955 | max77779_swreset_cstr(char *buff, size_t len, int val) |
| 956 | { |
| 957 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 958 | int i = 0; |
| 959 | |
| 960 | i += scnprintf(&buff[i], len - i, " SWR_RST=%x", |
| 961 | FIELD2VALUE(MAX77779_SWR_RST, val)); |
| 962 | i += scnprintf(&buff[i], len - i, " IC_RST_MASK=%x", |
| 963 | FIELD2VALUE(MAX77779_IC_RST_MASK, val)); |
| 964 | i += scnprintf(&buff[i], len - i, " VIO_OK_MASK=%x", |
| 965 | FIELD2VALUE(MAX77779_VIO_OK_MASK, val)); |
| 966 | #else |
| 967 | buff[0] = 0; |
| 968 | #endif |
| 969 | return buff; |
| 970 | } |
| 971 | |
| 972 | MAX77779_BFF(max77779_swreset_swr_rst,5,0) |
| 973 | MAX77779_BFF(max77779_swreset_ic_rst_mask,6,6) |
| 974 | MAX77779_BFF(max77779_swreset_vio_ok_mask,7,7) |
| 975 | |
| 976 | /* |
| 977 | * CONTROL_FG,0x51,0b00010000,0x10,Reset_Type:F |
| 978 | * SPR_3_0[0:4],TSHDN_DIS,SPR_7_5[5:3] |
| 979 | */ |
| 980 | #define MAX77779_CONTROL_FG 0x51 |
| 981 | #define MAX77779_CONTROL_FG_SPR_3_0_SHIFT 0 |
| 982 | #define MAX77779_CONTROL_FG_SPR_3_0_MASK (0xf << 0) |
| 983 | #define MAX77779_CONTROL_FG_SPR_3_0_CLEAR (~(0xf << 0)) |
| 984 | #define MAX77779_CONTROL_FG_TSHDN_DIS_SHIFT 4 |
| 985 | #define MAX77779_CONTROL_FG_TSHDN_DIS_MASK (0x1 << 4) |
| 986 | #define MAX77779_CONTROL_FG_TSHDN_DIS_CLEAR (~(0x1 << 4)) |
| 987 | #define MAX77779_CONTROL_FG_SPR_7_5_SHIFT 5 |
| 988 | #define MAX77779_CONTROL_FG_SPR_7_5_MASK (0x7 << 5) |
| 989 | #define MAX77779_CONTROL_FG_SPR_7_5_CLEAR (~(0x7 << 5)) |
| 990 | static inline const char * |
| 991 | max77779_control_fg_cstr(char *buff, size_t len, int val) |
| 992 | { |
| 993 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 994 | int i = 0; |
| 995 | |
| 996 | i += scnprintf(&buff[i], len - i, " SPR_3_0=%x", |
| 997 | FIELD2VALUE(MAX77779_SPR_3_0, val)); |
| 998 | i += scnprintf(&buff[i], len - i, " TSHDN_DIS=%x", |
| 999 | FIELD2VALUE(MAX77779_TSHDN_DIS, val)); |
| 1000 | i += scnprintf(&buff[i], len - i, " SPR_7_5=%x", |
| 1001 | FIELD2VALUE(MAX77779_SPR_7_5, val)); |
| 1002 | #else |
| 1003 | buff[0] = 0; |
| 1004 | #endif |
| 1005 | return buff; |
| 1006 | } |
| 1007 | |
| 1008 | MAX77779_BFF(max77779_control_fg_spr_3_0,3,0) |
| 1009 | MAX77779_BFF(max77779_control_fg_tshdn_dis,4,4) |
| 1010 | MAX77779_BFF(max77779_control_fg_spr_7_5,7,5) |
| 1011 | /* |
| 1012 | * Section: RISCV_FUNC 0x60 8 |
| 1013 | */ |
| 1014 | |
| 1015 | |
| 1016 | /* |
| 1017 | * DEVICE_ID,0x00,0b01111001,0x79,Reset_Type:S |
| 1018 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1019 | #define MAX77779_DEVICE_ID 0x60 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1020 | |
| 1021 | /* |
| 1022 | * DEVICE_REV,0x01,0b00000001,0x1,Reset_Type:S |
| 1023 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1024 | #define MAX77779_DEVICE_REV 0x61 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1025 | |
| 1026 | /* |
| 1027 | * FW_REV,0x02,0b00000000,0x0,Reset_Type:S |
| 1028 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1029 | #define MAX77779_FW_REV 0x62 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1030 | |
| 1031 | /* |
| 1032 | * FW_SUB_REV,0x03,0b00000000,0x0,Reset_Type:S |
| 1033 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1034 | #define MAX77779_FW_SUB_REV 0x63 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1035 | |
| 1036 | /* |
| 1037 | * SysMsg,0x09,0b00000000,0x0,Reset_Type:S |
| 1038 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1039 | #define MAX77779_SysMsg 0x69 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1040 | |
| 1041 | /* |
| 1042 | * AP_DATAOUT1,0x21,0b00000000,0x0,Reset_Type:S |
| 1043 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1044 | #define MAX77779_AP_DATAOUT1 0x81 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1045 | |
| 1046 | /* |
| 1047 | * AP_DATAOUT2,0x22,0b00000000,0x0,Reset_Type:S |
| 1048 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1049 | #define MAX77779_AP_DATAOUT2 0x82 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1050 | |
| 1051 | /* |
| 1052 | * AP_DATAOUT3,0x23,0b00000000,0x0,Reset_Type:S |
| 1053 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1054 | #define MAX77779_AP_DATAOUT3 0x83 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1055 | |
| 1056 | /* |
| 1057 | * AP_DATAOUT4,0x24,0b00000000,0x0,Reset_Type:S |
| 1058 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1059 | #define MAX77779_AP_DATAOUT4 0x84 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1060 | |
| 1061 | /* |
| 1062 | * AP_DATAOUT5,0x25,0b00000000,0x0,Reset_Type:S |
| 1063 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1064 | #define MAX77779_AP_DATAOUT5 0x85 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1065 | |
| 1066 | /* |
| 1067 | * AP_DATAOUT6,0x26,0b00000000,0x0,Reset_Type:S |
| 1068 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1069 | #define MAX77779_AP_DATAOUT6 0x86 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1070 | |
| 1071 | /* |
| 1072 | * AP_DATAOUT7,0x27,0b00000000,0x0,Reset_Type:S |
| 1073 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1074 | #define MAX77779_AP_DATAOUT7 0x87 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1075 | |
| 1076 | /* |
| 1077 | * AP_DATAOUT8,0x28,0b00000000,0x0,Reset_Type:S |
| 1078 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1079 | #define MAX77779_AP_DATAOUT8 0x88 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1080 | |
| 1081 | /* |
| 1082 | * AP_DATAOUT_OPCODE,0x29,0b00000000,0x0,Reset_Type:S |
| 1083 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1084 | #define MAX77779_AP_DATAOUT_OPCODE 0x89 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1085 | |
| 1086 | /* |
| 1087 | * AP_DATAIN0,0x51,0b00000000,0x0,Reset_Type:S |
| 1088 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1089 | #define MAX77779_AP_DATAIN0 0xb1 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1090 | |
| 1091 | /* |
| 1092 | * AP_DATAIN1,0x52,0b00000000,0x0,Reset_Type:S |
| 1093 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1094 | #define MAX77779_AP_DATAIN1 0xb2 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1095 | |
| 1096 | /* |
| 1097 | * AP_DATAIN2,0x53,0b00000000,0x0,Reset_Type:S |
| 1098 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1099 | #define MAX77779_AP_DATAIN2 0xb3 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1100 | |
| 1101 | /* |
| 1102 | * AP_DATAIN3,0x54,0b00000000,0x0,Reset_Type:S |
| 1103 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1104 | #define MAX77779_AP_DATAIN3 0xb4 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1105 | |
| 1106 | /* |
| 1107 | * AP_DATAIN4,0x55,0b00000000,0x0,Reset_Type:S |
| 1108 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1109 | #define MAX77779_AP_DATAIN4 0xb5 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1110 | |
| 1111 | /* |
| 1112 | * AP_DATAIN5,0x56,0b00000000,0x0,Reset_Type:S |
| 1113 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1114 | #define MAX77779_AP_DATAIN5 0xb6 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1115 | |
| 1116 | /* |
| 1117 | * AP_DATAIN6,0x57,0b00000000,0x0,Reset_Type:S |
| 1118 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1119 | #define MAX77779_AP_DATAIN6 0xb7 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1120 | |
| 1121 | /* |
| 1122 | * AP_DATAIN7,0x58,0b00000000,0x0,Reset_Type:S |
| 1123 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1124 | #define MAX77779_AP_DATAIN7 0xb8 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1125 | |
| 1126 | /* |
| 1127 | * AP_DATAIN8,0x59,0b00000000,0x0,Reset_Type:S |
| 1128 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1129 | #define MAX77779_AP_DATAIN8 0xb9 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1130 | |
| 1131 | /* |
| 1132 | * AP_DATAIN9,0x5A,0b00000000,0x0,Reset_Type:S |
| 1133 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1134 | #define MAX77779_AP_DATAIN9 0xba |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1135 | |
| 1136 | /* |
| 1137 | * AP_DATAIN10,0x5B,0b00000000,0x0,Reset_Type:S |
| 1138 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1139 | #define MAX77779_AP_DATAIN10 0xbb |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1140 | |
| 1141 | /* |
| 1142 | * AP_DATAIN11,0x5C,0b00000000,0x0,Reset_Type:S |
| 1143 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1144 | #define MAX77779_AP_DATAIN11 0xbc |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1145 | |
| 1146 | /* |
| 1147 | * COMMAND_HW,0x80,0b00000000,0x0,Reset_Type:S |
| 1148 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1149 | #define MAX77779_COMMAND_HW 0xe0 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1150 | /* |
| 1151 | * Section: GPIO 0xE8 8 |
| 1152 | */ |
| 1153 | |
| 1154 | |
| 1155 | /* |
| 1156 | * SGPIO_INT,0x00,0b00000000,0x0,Reset_Type:S |
| 1157 | * SGPIO0_STS,SGPIO1_STS,SGPIO2_STS,SGPIO3_STS,SGPIO4_STS,SGPIO5_STS, |
| 1158 | * SGPIO6_STS,SGPIO7_STS |
| 1159 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1160 | #define MAX77779_PMICSGPIO_INT 0xe8 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1161 | #define MAX77779_PMICSGPIO_INT_SGPIO0_STS_SHIFT 0 |
| 1162 | #define MAX77779_PMICSGPIO_INT_SGPIO0_STS_MASK (0x1 << 0) |
| 1163 | #define MAX77779_PMICSGPIO_INT_SGPIO0_STS_CLEAR (~(0x1 << 0)) |
| 1164 | #define MAX77779_PMICSGPIO_INT_SGPIO1_STS_SHIFT 1 |
| 1165 | #define MAX77779_PMICSGPIO_INT_SGPIO1_STS_MASK (0x1 << 1) |
| 1166 | #define MAX77779_PMICSGPIO_INT_SGPIO1_STS_CLEAR (~(0x1 << 1)) |
| 1167 | #define MAX77779_PMICSGPIO_INT_SGPIO2_STS_SHIFT 2 |
| 1168 | #define MAX77779_PMICSGPIO_INT_SGPIO2_STS_MASK (0x1 << 2) |
| 1169 | #define MAX77779_PMICSGPIO_INT_SGPIO2_STS_CLEAR (~(0x1 << 2)) |
| 1170 | #define MAX77779_PMICSGPIO_INT_SGPIO3_STS_SHIFT 3 |
| 1171 | #define MAX77779_PMICSGPIO_INT_SGPIO3_STS_MASK (0x1 << 3) |
| 1172 | #define MAX77779_PMICSGPIO_INT_SGPIO3_STS_CLEAR (~(0x1 << 3)) |
| 1173 | #define MAX77779_PMICSGPIO_INT_SGPIO4_STS_SHIFT 4 |
| 1174 | #define MAX77779_PMICSGPIO_INT_SGPIO4_STS_MASK (0x1 << 4) |
| 1175 | #define MAX77779_PMICSGPIO_INT_SGPIO4_STS_CLEAR (~(0x1 << 4)) |
| 1176 | #define MAX77779_PMICSGPIO_INT_SGPIO5_STS_SHIFT 5 |
| 1177 | #define MAX77779_PMICSGPIO_INT_SGPIO5_STS_MASK (0x1 << 5) |
| 1178 | #define MAX77779_PMICSGPIO_INT_SGPIO5_STS_CLEAR (~(0x1 << 5)) |
| 1179 | #define MAX77779_PMICSGPIO_INT_SGPIO6_STS_SHIFT 6 |
| 1180 | #define MAX77779_PMICSGPIO_INT_SGPIO6_STS_MASK (0x1 << 6) |
| 1181 | #define MAX77779_PMICSGPIO_INT_SGPIO6_STS_CLEAR (~(0x1 << 6)) |
| 1182 | #define MAX77779_PMICSGPIO_INT_SGPIO7_STS_SHIFT 7 |
| 1183 | #define MAX77779_PMICSGPIO_INT_SGPIO7_STS_MASK (0x1 << 7) |
| 1184 | #define MAX77779_PMICSGPIO_INT_SGPIO7_STS_CLEAR (~(0x1 << 7)) |
| 1185 | static inline const char * |
| 1186 | max77779_pmicsgpio_int_cstr(char *buff, size_t len, int val) |
| 1187 | { |
| 1188 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1189 | int i = 0; |
| 1190 | |
| 1191 | i += scnprintf(&buff[i], len - i, " SGPIO0_STS=%x", |
| 1192 | FIELD2VALUE(MAX77779_SGPIO0_STS, val)); |
| 1193 | i += scnprintf(&buff[i], len - i, " SGPIO1_STS=%x", |
| 1194 | FIELD2VALUE(MAX77779_SGPIO1_STS, val)); |
| 1195 | i += scnprintf(&buff[i], len - i, " SGPIO2_STS=%x", |
| 1196 | FIELD2VALUE(MAX77779_SGPIO2_STS, val)); |
| 1197 | i += scnprintf(&buff[i], len - i, " SGPIO3_STS=%x", |
| 1198 | FIELD2VALUE(MAX77779_SGPIO3_STS, val)); |
| 1199 | i += scnprintf(&buff[i], len - i, " SGPIO4_STS=%x", |
| 1200 | FIELD2VALUE(MAX77779_SGPIO4_STS, val)); |
| 1201 | i += scnprintf(&buff[i], len - i, " SGPIO5_STS=%x", |
| 1202 | FIELD2VALUE(MAX77779_SGPIO5_STS, val)); |
| 1203 | i += scnprintf(&buff[i], len - i, " SGPIO6_STS=%x", |
| 1204 | FIELD2VALUE(MAX77779_SGPIO6_STS, val)); |
| 1205 | i += scnprintf(&buff[i], len - i, " SGPIO7_STS=%x", |
| 1206 | FIELD2VALUE(MAX77779_SGPIO7_STS, val)); |
| 1207 | #else |
| 1208 | buff[0] = 0; |
| 1209 | #endif |
| 1210 | return buff; |
| 1211 | } |
| 1212 | |
| 1213 | MAX77779_BFF(max77779_pmicsgpio_int_sgpio0_sts,0,0) |
| 1214 | MAX77779_BFF(max77779_pmicsgpio_int_sgpio1_sts,1,1) |
| 1215 | MAX77779_BFF(max77779_pmicsgpio_int_sgpio2_sts,2,2) |
| 1216 | MAX77779_BFF(max77779_pmicsgpio_int_sgpio3_sts,3,3) |
| 1217 | MAX77779_BFF(max77779_pmicsgpio_int_sgpio4_sts,4,4) |
| 1218 | MAX77779_BFF(max77779_pmicsgpio_int_sgpio5_sts,5,5) |
| 1219 | MAX77779_BFF(max77779_pmicsgpio_int_sgpio6_sts,6,6) |
| 1220 | MAX77779_BFF(max77779_pmicsgpio_int_sgpio7_sts,7,7) |
| 1221 | |
| 1222 | /* |
| 1223 | * SGPIO_PU,0x01,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1224 | * PU0,PU1,PU2,PU3,PU4,PU5,PU6,PU7 |
| 1225 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1226 | #define MAX77779_PMICSGPIO_PU 0xe9 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1227 | #define MAX77779_PMICSGPIO_PU_PU0_SHIFT 0 |
| 1228 | #define MAX77779_PMICSGPIO_PU_PU0_MASK (0x1 << 0) |
| 1229 | #define MAX77779_PMICSGPIO_PU_PU0_CLEAR (~(0x1 << 0)) |
| 1230 | #define MAX77779_PMICSGPIO_PU_PU1_SHIFT 1 |
| 1231 | #define MAX77779_PMICSGPIO_PU_PU1_MASK (0x1 << 1) |
| 1232 | #define MAX77779_PMICSGPIO_PU_PU1_CLEAR (~(0x1 << 1)) |
| 1233 | #define MAX77779_PMICSGPIO_PU_PU2_SHIFT 2 |
| 1234 | #define MAX77779_PMICSGPIO_PU_PU2_MASK (0x1 << 2) |
| 1235 | #define MAX77779_PMICSGPIO_PU_PU2_CLEAR (~(0x1 << 2)) |
| 1236 | #define MAX77779_PMICSGPIO_PU_PU3_SHIFT 3 |
| 1237 | #define MAX77779_PMICSGPIO_PU_PU3_MASK (0x1 << 3) |
| 1238 | #define MAX77779_PMICSGPIO_PU_PU3_CLEAR (~(0x1 << 3)) |
| 1239 | #define MAX77779_PMICSGPIO_PU_PU4_SHIFT 4 |
| 1240 | #define MAX77779_PMICSGPIO_PU_PU4_MASK (0x1 << 4) |
| 1241 | #define MAX77779_PMICSGPIO_PU_PU4_CLEAR (~(0x1 << 4)) |
| 1242 | #define MAX77779_PMICSGPIO_PU_PU5_SHIFT 5 |
| 1243 | #define MAX77779_PMICSGPIO_PU_PU5_MASK (0x1 << 5) |
| 1244 | #define MAX77779_PMICSGPIO_PU_PU5_CLEAR (~(0x1 << 5)) |
| 1245 | #define MAX77779_PMICSGPIO_PU_PU6_SHIFT 6 |
| 1246 | #define MAX77779_PMICSGPIO_PU_PU6_MASK (0x1 << 6) |
| 1247 | #define MAX77779_PMICSGPIO_PU_PU6_CLEAR (~(0x1 << 6)) |
| 1248 | #define MAX77779_PMICSGPIO_PU_PU7_SHIFT 7 |
| 1249 | #define MAX77779_PMICSGPIO_PU_PU7_MASK (0x1 << 7) |
| 1250 | #define MAX77779_PMICSGPIO_PU_PU7_CLEAR (~(0x1 << 7)) |
| 1251 | static inline const char * |
| 1252 | max77779_pmicsgpio_pu_cstr(char *buff, size_t len, int val) |
| 1253 | { |
| 1254 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1255 | int i = 0; |
| 1256 | |
| 1257 | i += scnprintf(&buff[i], len - i, " PU0=%x", |
| 1258 | FIELD2VALUE(MAX77779_PU0, val)); |
| 1259 | i += scnprintf(&buff[i], len - i, " PU1=%x", |
| 1260 | FIELD2VALUE(MAX77779_PU1, val)); |
| 1261 | i += scnprintf(&buff[i], len - i, " PU2=%x", |
| 1262 | FIELD2VALUE(MAX77779_PU2, val)); |
| 1263 | i += scnprintf(&buff[i], len - i, " PU3=%x", |
| 1264 | FIELD2VALUE(MAX77779_PU3, val)); |
| 1265 | i += scnprintf(&buff[i], len - i, " PU4=%x", |
| 1266 | FIELD2VALUE(MAX77779_PU4, val)); |
| 1267 | i += scnprintf(&buff[i], len - i, " PU5=%x", |
| 1268 | FIELD2VALUE(MAX77779_PU5, val)); |
| 1269 | i += scnprintf(&buff[i], len - i, " PU6=%x", |
| 1270 | FIELD2VALUE(MAX77779_PU6, val)); |
| 1271 | i += scnprintf(&buff[i], len - i, " PU7=%x", |
| 1272 | FIELD2VALUE(MAX77779_PU7, val)); |
| 1273 | #else |
| 1274 | buff[0] = 0; |
| 1275 | #endif |
| 1276 | return buff; |
| 1277 | } |
| 1278 | |
| 1279 | MAX77779_BFF(max77779_pmicsgpio_pu_pu0,0,0) |
| 1280 | MAX77779_BFF(max77779_pmicsgpio_pu_pu1,1,1) |
| 1281 | MAX77779_BFF(max77779_pmicsgpio_pu_pu2,2,2) |
| 1282 | MAX77779_BFF(max77779_pmicsgpio_pu_pu3,3,3) |
| 1283 | MAX77779_BFF(max77779_pmicsgpio_pu_pu4,4,4) |
| 1284 | MAX77779_BFF(max77779_pmicsgpio_pu_pu5,5,5) |
| 1285 | MAX77779_BFF(max77779_pmicsgpio_pu_pu6,6,6) |
| 1286 | MAX77779_BFF(max77779_pmicsgpio_pu_pu7,7,7) |
| 1287 | |
| 1288 | /* |
| 1289 | * SGPIO_PD,0x02,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1290 | * PD0,PD1,PD2,PD3,PD4,PD5,PD6,PD7 |
| 1291 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1292 | #define MAX77779_PMICSGPIO_PD 0xea |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1293 | #define MAX77779_PMICSGPIO_PD_PD0_SHIFT 0 |
| 1294 | #define MAX77779_PMICSGPIO_PD_PD0_MASK (0x1 << 0) |
| 1295 | #define MAX77779_PMICSGPIO_PD_PD0_CLEAR (~(0x1 << 0)) |
| 1296 | #define MAX77779_PMICSGPIO_PD_PD1_SHIFT 1 |
| 1297 | #define MAX77779_PMICSGPIO_PD_PD1_MASK (0x1 << 1) |
| 1298 | #define MAX77779_PMICSGPIO_PD_PD1_CLEAR (~(0x1 << 1)) |
| 1299 | #define MAX77779_PMICSGPIO_PD_PD2_SHIFT 2 |
| 1300 | #define MAX77779_PMICSGPIO_PD_PD2_MASK (0x1 << 2) |
| 1301 | #define MAX77779_PMICSGPIO_PD_PD2_CLEAR (~(0x1 << 2)) |
| 1302 | #define MAX77779_PMICSGPIO_PD_PD3_SHIFT 3 |
| 1303 | #define MAX77779_PMICSGPIO_PD_PD3_MASK (0x1 << 3) |
| 1304 | #define MAX77779_PMICSGPIO_PD_PD3_CLEAR (~(0x1 << 3)) |
| 1305 | #define MAX77779_PMICSGPIO_PD_PD4_SHIFT 4 |
| 1306 | #define MAX77779_PMICSGPIO_PD_PD4_MASK (0x1 << 4) |
| 1307 | #define MAX77779_PMICSGPIO_PD_PD4_CLEAR (~(0x1 << 4)) |
| 1308 | #define MAX77779_PMICSGPIO_PD_PD5_SHIFT 5 |
| 1309 | #define MAX77779_PMICSGPIO_PD_PD5_MASK (0x1 << 5) |
| 1310 | #define MAX77779_PMICSGPIO_PD_PD5_CLEAR (~(0x1 << 5)) |
| 1311 | #define MAX77779_PMICSGPIO_PD_PD6_SHIFT 6 |
| 1312 | #define MAX77779_PMICSGPIO_PD_PD6_MASK (0x1 << 6) |
| 1313 | #define MAX77779_PMICSGPIO_PD_PD6_CLEAR (~(0x1 << 6)) |
| 1314 | #define MAX77779_PMICSGPIO_PD_PD7_SHIFT 7 |
| 1315 | #define MAX77779_PMICSGPIO_PD_PD7_MASK (0x1 << 7) |
| 1316 | #define MAX77779_PMICSGPIO_PD_PD7_CLEAR (~(0x1 << 7)) |
| 1317 | static inline const char * |
| 1318 | max77779_pmicsgpio_pd_cstr(char *buff, size_t len, int val) |
| 1319 | { |
| 1320 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1321 | int i = 0; |
| 1322 | |
| 1323 | i += scnprintf(&buff[i], len - i, " PD0=%x", |
| 1324 | FIELD2VALUE(MAX77779_PD0, val)); |
| 1325 | i += scnprintf(&buff[i], len - i, " PD1=%x", |
| 1326 | FIELD2VALUE(MAX77779_PD1, val)); |
| 1327 | i += scnprintf(&buff[i], len - i, " PD2=%x", |
| 1328 | FIELD2VALUE(MAX77779_PD2, val)); |
| 1329 | i += scnprintf(&buff[i], len - i, " PD3=%x", |
| 1330 | FIELD2VALUE(MAX77779_PD3, val)); |
| 1331 | i += scnprintf(&buff[i], len - i, " PD4=%x", |
| 1332 | FIELD2VALUE(MAX77779_PD4, val)); |
| 1333 | i += scnprintf(&buff[i], len - i, " PD5=%x", |
| 1334 | FIELD2VALUE(MAX77779_PD5, val)); |
| 1335 | i += scnprintf(&buff[i], len - i, " PD6=%x", |
| 1336 | FIELD2VALUE(MAX77779_PD6, val)); |
| 1337 | i += scnprintf(&buff[i], len - i, " PD7=%x", |
| 1338 | FIELD2VALUE(MAX77779_PD7, val)); |
| 1339 | #else |
| 1340 | buff[0] = 0; |
| 1341 | #endif |
| 1342 | return buff; |
| 1343 | } |
| 1344 | |
| 1345 | MAX77779_BFF(max77779_pmicsgpio_pd_pd0,0,0) |
| 1346 | MAX77779_BFF(max77779_pmicsgpio_pd_pd1,1,1) |
| 1347 | MAX77779_BFF(max77779_pmicsgpio_pd_pd2,2,2) |
| 1348 | MAX77779_BFF(max77779_pmicsgpio_pd_pd3,3,3) |
| 1349 | MAX77779_BFF(max77779_pmicsgpio_pd_pd4,4,4) |
| 1350 | MAX77779_BFF(max77779_pmicsgpio_pd_pd5,5,5) |
| 1351 | MAX77779_BFF(max77779_pmicsgpio_pd_pd6,6,6) |
| 1352 | MAX77779_BFF(max77779_pmicsgpio_pd_pd7,7,7) |
| 1353 | |
| 1354 | /* |
| 1355 | * AGPIO_PU,0x03,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1356 | * PU0,PU1,PU2,PU3,SPR_7_4[4:4] |
| 1357 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1358 | #define MAX77779_PMICAGPIO_PU 0xeb |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1359 | #define MAX77779_PMICAGPIO_PU_PU0_SHIFT 0 |
| 1360 | #define MAX77779_PMICAGPIO_PU_PU0_MASK (0x1 << 0) |
| 1361 | #define MAX77779_PMICAGPIO_PU_PU0_CLEAR (~(0x1 << 0)) |
| 1362 | #define MAX77779_PMICAGPIO_PU_PU1_SHIFT 1 |
| 1363 | #define MAX77779_PMICAGPIO_PU_PU1_MASK (0x1 << 1) |
| 1364 | #define MAX77779_PMICAGPIO_PU_PU1_CLEAR (~(0x1 << 1)) |
| 1365 | #define MAX77779_PMICAGPIO_PU_PU2_SHIFT 2 |
| 1366 | #define MAX77779_PMICAGPIO_PU_PU2_MASK (0x1 << 2) |
| 1367 | #define MAX77779_PMICAGPIO_PU_PU2_CLEAR (~(0x1 << 2)) |
| 1368 | #define MAX77779_PMICAGPIO_PU_PU3_SHIFT 3 |
| 1369 | #define MAX77779_PMICAGPIO_PU_PU3_MASK (0x1 << 3) |
| 1370 | #define MAX77779_PMICAGPIO_PU_PU3_CLEAR (~(0x1 << 3)) |
| 1371 | #define MAX77779_PMICAGPIO_PU_SPR_7_4_SHIFT 4 |
| 1372 | #define MAX77779_PMICAGPIO_PU_SPR_7_4_MASK (0xf << 4) |
| 1373 | #define MAX77779_PMICAGPIO_PU_SPR_7_4_CLEAR (~(0xf << 4)) |
| 1374 | static inline const char * |
| 1375 | max77779_pmicagpio_pu_cstr(char *buff, size_t len, int val) |
| 1376 | { |
| 1377 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1378 | int i = 0; |
| 1379 | |
| 1380 | i += scnprintf(&buff[i], len - i, " PU0=%x", |
| 1381 | FIELD2VALUE(MAX77779_PU0, val)); |
| 1382 | i += scnprintf(&buff[i], len - i, " PU1=%x", |
| 1383 | FIELD2VALUE(MAX77779_PU1, val)); |
| 1384 | i += scnprintf(&buff[i], len - i, " PU2=%x", |
| 1385 | FIELD2VALUE(MAX77779_PU2, val)); |
| 1386 | i += scnprintf(&buff[i], len - i, " PU3=%x", |
| 1387 | FIELD2VALUE(MAX77779_PU3, val)); |
| 1388 | i += scnprintf(&buff[i], len - i, " SPR_7_4=%x", |
| 1389 | FIELD2VALUE(MAX77779_SPR_7_4, val)); |
| 1390 | #else |
| 1391 | buff[0] = 0; |
| 1392 | #endif |
| 1393 | return buff; |
| 1394 | } |
| 1395 | |
| 1396 | MAX77779_BFF(max77779_pmicagpio_pu_pu0,0,0) |
| 1397 | MAX77779_BFF(max77779_pmicagpio_pu_pu1,1,1) |
| 1398 | MAX77779_BFF(max77779_pmicagpio_pu_pu2,2,2) |
| 1399 | MAX77779_BFF(max77779_pmicagpio_pu_pu3,3,3) |
| 1400 | MAX77779_BFF(max77779_pmicagpio_pu_spr_7_4,7,4) |
| 1401 | |
| 1402 | /* |
| 1403 | * AGPIO_PD,0x04,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1404 | * PD0,PD1,PD2,PD3,SPR_7_4[4:4] |
| 1405 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1406 | #define MAX77779_PMICAGPIO_PD 0xec |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1407 | #define MAX77779_PMICAGPIO_PD_PD0_SHIFT 0 |
| 1408 | #define MAX77779_PMICAGPIO_PD_PD0_MASK (0x1 << 0) |
| 1409 | #define MAX77779_PMICAGPIO_PD_PD0_CLEAR (~(0x1 << 0)) |
| 1410 | #define MAX77779_PMICAGPIO_PD_PD1_SHIFT 1 |
| 1411 | #define MAX77779_PMICAGPIO_PD_PD1_MASK (0x1 << 1) |
| 1412 | #define MAX77779_PMICAGPIO_PD_PD1_CLEAR (~(0x1 << 1)) |
| 1413 | #define MAX77779_PMICAGPIO_PD_PD2_SHIFT 2 |
| 1414 | #define MAX77779_PMICAGPIO_PD_PD2_MASK (0x1 << 2) |
| 1415 | #define MAX77779_PMICAGPIO_PD_PD2_CLEAR (~(0x1 << 2)) |
| 1416 | #define MAX77779_PMICAGPIO_PD_PD3_SHIFT 3 |
| 1417 | #define MAX77779_PMICAGPIO_PD_PD3_MASK (0x1 << 3) |
| 1418 | #define MAX77779_PMICAGPIO_PD_PD3_CLEAR (~(0x1 << 3)) |
| 1419 | #define MAX77779_PMICAGPIO_PD_SPR_7_4_SHIFT 4 |
| 1420 | #define MAX77779_PMICAGPIO_PD_SPR_7_4_MASK (0xf << 4) |
| 1421 | #define MAX77779_PMICAGPIO_PD_SPR_7_4_CLEAR (~(0xf << 4)) |
| 1422 | static inline const char * |
| 1423 | max77779_pmicagpio_pd_cstr(char *buff, size_t len, int val) |
| 1424 | { |
| 1425 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1426 | int i = 0; |
| 1427 | |
| 1428 | i += scnprintf(&buff[i], len - i, " PD0=%x", |
| 1429 | FIELD2VALUE(MAX77779_PD0, val)); |
| 1430 | i += scnprintf(&buff[i], len - i, " PD1=%x", |
| 1431 | FIELD2VALUE(MAX77779_PD1, val)); |
| 1432 | i += scnprintf(&buff[i], len - i, " PD2=%x", |
| 1433 | FIELD2VALUE(MAX77779_PD2, val)); |
| 1434 | i += scnprintf(&buff[i], len - i, " PD3=%x", |
| 1435 | FIELD2VALUE(MAX77779_PD3, val)); |
| 1436 | i += scnprintf(&buff[i], len - i, " SPR_7_4=%x", |
| 1437 | FIELD2VALUE(MAX77779_SPR_7_4, val)); |
| 1438 | #else |
| 1439 | buff[0] = 0; |
| 1440 | #endif |
| 1441 | return buff; |
| 1442 | } |
| 1443 | |
| 1444 | MAX77779_BFF(max77779_pmicagpio_pd_pd0,0,0) |
| 1445 | MAX77779_BFF(max77779_pmicagpio_pd_pd1,1,1) |
| 1446 | MAX77779_BFF(max77779_pmicagpio_pd_pd2,2,2) |
| 1447 | MAX77779_BFF(max77779_pmicagpio_pd_pd3,3,3) |
| 1448 | MAX77779_BFF(max77779_pmicagpio_pd_spr_7_4,7,4) |
| 1449 | |
| 1450 | /* |
| 1451 | * SGPIO_CNFG0,0x05,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1452 | * DATA,VGPI_EN,MODE[2:2],DBNC_SEL[4:2],IRQ_SEL[6:2] |
| 1453 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1454 | #define MAX77779_PMICSGPIO_CNFG0 0xed |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1455 | #define MAX77779_PMICSGPIO_CNFG0_DATA_SHIFT 0 |
| 1456 | #define MAX77779_PMICSGPIO_CNFG0_DATA_MASK (0x1 << 0) |
| 1457 | #define MAX77779_PMICSGPIO_CNFG0_DATA_CLEAR (~(0x1 << 0)) |
| 1458 | #define MAX77779_PMICSGPIO_CNFG0_VGPI_EN_SHIFT 1 |
| 1459 | #define MAX77779_PMICSGPIO_CNFG0_VGPI_EN_MASK (0x1 << 1) |
| 1460 | #define MAX77779_PMICSGPIO_CNFG0_VGPI_EN_CLEAR (~(0x1 << 1)) |
| 1461 | #define MAX77779_PMICSGPIO_CNFG0_MODE_SHIFT 2 |
| 1462 | #define MAX77779_PMICSGPIO_CNFG0_MODE_MASK (0x3 << 2) |
| 1463 | #define MAX77779_PMICSGPIO_CNFG0_MODE_CLEAR (~(0x3 << 2)) |
| 1464 | #define MAX77779_PMICSGPIO_CNFG0_DBNC_SEL_SHIFT 4 |
| 1465 | #define MAX77779_PMICSGPIO_CNFG0_DBNC_SEL_MASK (0x3 << 4) |
| 1466 | #define MAX77779_PMICSGPIO_CNFG0_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1467 | #define MAX77779_PMICSGPIO_CNFG0_IRQ_SEL_SHIFT 6 |
| 1468 | #define MAX77779_PMICSGPIO_CNFG0_IRQ_SEL_MASK (0x3 << 6) |
| 1469 | #define MAX77779_PMICSGPIO_CNFG0_IRQ_SEL_CLEAR (~(0x3 << 6)) |
| 1470 | static inline const char * |
| 1471 | max77779_pmicsgpio_cnfg0_cstr(char *buff, size_t len, int val) |
| 1472 | { |
| 1473 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1474 | int i = 0; |
| 1475 | |
| 1476 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 1477 | FIELD2VALUE(MAX77779_DATA, val)); |
| 1478 | i += scnprintf(&buff[i], len - i, " VGPI_EN=%x", |
| 1479 | FIELD2VALUE(MAX77779_VGPI_EN, val)); |
| 1480 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 1481 | FIELD2VALUE(MAX77779_MODE, val)); |
| 1482 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 1483 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 1484 | i += scnprintf(&buff[i], len - i, " IRQ_SEL=%x", |
| 1485 | FIELD2VALUE(MAX77779_IRQ_SEL, val)); |
| 1486 | #else |
| 1487 | buff[0] = 0; |
| 1488 | #endif |
| 1489 | return buff; |
| 1490 | } |
| 1491 | |
| 1492 | MAX77779_BFF(max77779_pmicsgpio_cnfg0_data,0,0) |
| 1493 | MAX77779_BFF(max77779_pmicsgpio_cnfg0_vgpi_en,1,1) |
| 1494 | MAX77779_BFF(max77779_pmicsgpio_cnfg0_mode,3,2) |
| 1495 | MAX77779_BFF(max77779_pmicsgpio_cnfg0_dbnc_sel,5,4) |
| 1496 | MAX77779_BFF(max77779_pmicsgpio_cnfg0_irq_sel,7,6) |
| 1497 | |
| 1498 | /* |
| 1499 | * SGPIO_CNFG1,0x06,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1500 | * DATA,VGPI_EN,MODE[2:2],DBNC_SEL[4:2],IRQ_SEL[6:2] |
| 1501 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1502 | #define MAX77779_PMICSGPIO_CNFG1 0xee |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1503 | #define MAX77779_PMICSGPIO_CNFG1_DATA_SHIFT 0 |
| 1504 | #define MAX77779_PMICSGPIO_CNFG1_DATA_MASK (0x1 << 0) |
| 1505 | #define MAX77779_PMICSGPIO_CNFG1_DATA_CLEAR (~(0x1 << 0)) |
| 1506 | #define MAX77779_PMICSGPIO_CNFG1_VGPI_EN_SHIFT 1 |
| 1507 | #define MAX77779_PMICSGPIO_CNFG1_VGPI_EN_MASK (0x1 << 1) |
| 1508 | #define MAX77779_PMICSGPIO_CNFG1_VGPI_EN_CLEAR (~(0x1 << 1)) |
| 1509 | #define MAX77779_PMICSGPIO_CNFG1_MODE_SHIFT 2 |
| 1510 | #define MAX77779_PMICSGPIO_CNFG1_MODE_MASK (0x3 << 2) |
| 1511 | #define MAX77779_PMICSGPIO_CNFG1_MODE_CLEAR (~(0x3 << 2)) |
| 1512 | #define MAX77779_PMICSGPIO_CNFG1_DBNC_SEL_SHIFT 4 |
| 1513 | #define MAX77779_PMICSGPIO_CNFG1_DBNC_SEL_MASK (0x3 << 4) |
| 1514 | #define MAX77779_PMICSGPIO_CNFG1_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1515 | #define MAX77779_PMICSGPIO_CNFG1_IRQ_SEL_SHIFT 6 |
| 1516 | #define MAX77779_PMICSGPIO_CNFG1_IRQ_SEL_MASK (0x3 << 6) |
| 1517 | #define MAX77779_PMICSGPIO_CNFG1_IRQ_SEL_CLEAR (~(0x3 << 6)) |
| 1518 | static inline const char * |
| 1519 | max77779_pmicsgpio_cnfg1_cstr(char *buff, size_t len, int val) |
| 1520 | { |
| 1521 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1522 | int i = 0; |
| 1523 | |
| 1524 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 1525 | FIELD2VALUE(MAX77779_DATA, val)); |
| 1526 | i += scnprintf(&buff[i], len - i, " VGPI_EN=%x", |
| 1527 | FIELD2VALUE(MAX77779_VGPI_EN, val)); |
| 1528 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 1529 | FIELD2VALUE(MAX77779_MODE, val)); |
| 1530 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 1531 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 1532 | i += scnprintf(&buff[i], len - i, " IRQ_SEL=%x", |
| 1533 | FIELD2VALUE(MAX77779_IRQ_SEL, val)); |
| 1534 | #else |
| 1535 | buff[0] = 0; |
| 1536 | #endif |
| 1537 | return buff; |
| 1538 | } |
| 1539 | |
| 1540 | MAX77779_BFF(max77779_pmicsgpio_cnfg1_data,0,0) |
| 1541 | MAX77779_BFF(max77779_pmicsgpio_cnfg1_vgpi_en,1,1) |
| 1542 | MAX77779_BFF(max77779_pmicsgpio_cnfg1_mode,3,2) |
| 1543 | MAX77779_BFF(max77779_pmicsgpio_cnfg1_dbnc_sel,5,4) |
| 1544 | MAX77779_BFF(max77779_pmicsgpio_cnfg1_irq_sel,7,6) |
| 1545 | |
| 1546 | /* |
| 1547 | * SGPIO_CNFG2,0x07,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1548 | * DATA,VGPI_EN,MODE[2:2],DBNC_SEL[4:2],IRQ_SEL[6:2] |
| 1549 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1550 | #define MAX77779_PMICSGPIO_CNFG2 0xef |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1551 | #define MAX77779_PMICSGPIO_CNFG2_DATA_SHIFT 0 |
| 1552 | #define MAX77779_PMICSGPIO_CNFG2_DATA_MASK (0x1 << 0) |
| 1553 | #define MAX77779_PMICSGPIO_CNFG2_DATA_CLEAR (~(0x1 << 0)) |
| 1554 | #define MAX77779_PMICSGPIO_CNFG2_VGPI_EN_SHIFT 1 |
| 1555 | #define MAX77779_PMICSGPIO_CNFG2_VGPI_EN_MASK (0x1 << 1) |
| 1556 | #define MAX77779_PMICSGPIO_CNFG2_VGPI_EN_CLEAR (~(0x1 << 1)) |
| 1557 | #define MAX77779_PMICSGPIO_CNFG2_MODE_SHIFT 2 |
| 1558 | #define MAX77779_PMICSGPIO_CNFG2_MODE_MASK (0x3 << 2) |
| 1559 | #define MAX77779_PMICSGPIO_CNFG2_MODE_CLEAR (~(0x3 << 2)) |
| 1560 | #define MAX77779_PMICSGPIO_CNFG2_DBNC_SEL_SHIFT 4 |
| 1561 | #define MAX77779_PMICSGPIO_CNFG2_DBNC_SEL_MASK (0x3 << 4) |
| 1562 | #define MAX77779_PMICSGPIO_CNFG2_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1563 | #define MAX77779_PMICSGPIO_CNFG2_IRQ_SEL_SHIFT 6 |
| 1564 | #define MAX77779_PMICSGPIO_CNFG2_IRQ_SEL_MASK (0x3 << 6) |
| 1565 | #define MAX77779_PMICSGPIO_CNFG2_IRQ_SEL_CLEAR (~(0x3 << 6)) |
| 1566 | static inline const char * |
| 1567 | max77779_pmicsgpio_cnfg2_cstr(char *buff, size_t len, int val) |
| 1568 | { |
| 1569 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1570 | int i = 0; |
| 1571 | |
| 1572 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 1573 | FIELD2VALUE(MAX77779_DATA, val)); |
| 1574 | i += scnprintf(&buff[i], len - i, " VGPI_EN=%x", |
| 1575 | FIELD2VALUE(MAX77779_VGPI_EN, val)); |
| 1576 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 1577 | FIELD2VALUE(MAX77779_MODE, val)); |
| 1578 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 1579 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 1580 | i += scnprintf(&buff[i], len - i, " IRQ_SEL=%x", |
| 1581 | FIELD2VALUE(MAX77779_IRQ_SEL, val)); |
| 1582 | #else |
| 1583 | buff[0] = 0; |
| 1584 | #endif |
| 1585 | return buff; |
| 1586 | } |
| 1587 | |
| 1588 | MAX77779_BFF(max77779_pmicsgpio_cnfg2_data,0,0) |
| 1589 | MAX77779_BFF(max77779_pmicsgpio_cnfg2_vgpi_en,1,1) |
| 1590 | MAX77779_BFF(max77779_pmicsgpio_cnfg2_mode,3,2) |
| 1591 | MAX77779_BFF(max77779_pmicsgpio_cnfg2_dbnc_sel,5,4) |
| 1592 | MAX77779_BFF(max77779_pmicsgpio_cnfg2_irq_sel,7,6) |
| 1593 | |
| 1594 | /* |
| 1595 | * SGPIO_CNFG3,0x08,0b00000100,0x4,OTP:SHADOW, Reset_Type:S |
| 1596 | * DATA,VGPI_EN,MODE[2:2],DBNC_SEL[4:2],IRQ_SEL[6:2] |
| 1597 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1598 | #define MAX77779_PMICSGPIO_CNFG3 0xf0 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1599 | #define MAX77779_PMICSGPIO_CNFG3_DATA_SHIFT 0 |
| 1600 | #define MAX77779_PMICSGPIO_CNFG3_DATA_MASK (0x1 << 0) |
| 1601 | #define MAX77779_PMICSGPIO_CNFG3_DATA_CLEAR (~(0x1 << 0)) |
| 1602 | #define MAX77779_PMICSGPIO_CNFG3_VGPI_EN_SHIFT 1 |
| 1603 | #define MAX77779_PMICSGPIO_CNFG3_VGPI_EN_MASK (0x1 << 1) |
| 1604 | #define MAX77779_PMICSGPIO_CNFG3_VGPI_EN_CLEAR (~(0x1 << 1)) |
| 1605 | #define MAX77779_PMICSGPIO_CNFG3_MODE_SHIFT 2 |
| 1606 | #define MAX77779_PMICSGPIO_CNFG3_MODE_MASK (0x3 << 2) |
| 1607 | #define MAX77779_PMICSGPIO_CNFG3_MODE_CLEAR (~(0x3 << 2)) |
| 1608 | #define MAX77779_PMICSGPIO_CNFG3_DBNC_SEL_SHIFT 4 |
| 1609 | #define MAX77779_PMICSGPIO_CNFG3_DBNC_SEL_MASK (0x3 << 4) |
| 1610 | #define MAX77779_PMICSGPIO_CNFG3_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1611 | #define MAX77779_PMICSGPIO_CNFG3_IRQ_SEL_SHIFT 6 |
| 1612 | #define MAX77779_PMICSGPIO_CNFG3_IRQ_SEL_MASK (0x3 << 6) |
| 1613 | #define MAX77779_PMICSGPIO_CNFG3_IRQ_SEL_CLEAR (~(0x3 << 6)) |
| 1614 | static inline const char * |
| 1615 | max77779_pmicsgpio_cnfg3_cstr(char *buff, size_t len, int val) |
| 1616 | { |
| 1617 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1618 | int i = 0; |
| 1619 | |
| 1620 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 1621 | FIELD2VALUE(MAX77779_DATA, val)); |
| 1622 | i += scnprintf(&buff[i], len - i, " VGPI_EN=%x", |
| 1623 | FIELD2VALUE(MAX77779_VGPI_EN, val)); |
| 1624 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 1625 | FIELD2VALUE(MAX77779_MODE, val)); |
| 1626 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 1627 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 1628 | i += scnprintf(&buff[i], len - i, " IRQ_SEL=%x", |
| 1629 | FIELD2VALUE(MAX77779_IRQ_SEL, val)); |
| 1630 | #else |
| 1631 | buff[0] = 0; |
| 1632 | #endif |
| 1633 | return buff; |
| 1634 | } |
| 1635 | |
| 1636 | MAX77779_BFF(max77779_pmicsgpio_cnfg3_data,0,0) |
| 1637 | MAX77779_BFF(max77779_pmicsgpio_cnfg3_vgpi_en,1,1) |
| 1638 | MAX77779_BFF(max77779_pmicsgpio_cnfg3_mode,3,2) |
| 1639 | MAX77779_BFF(max77779_pmicsgpio_cnfg3_dbnc_sel,5,4) |
| 1640 | MAX77779_BFF(max77779_pmicsgpio_cnfg3_irq_sel,7,6) |
| 1641 | |
| 1642 | /* |
| 1643 | * SGPIO_CNFG4,0x09,0b00000100,0x4,OTP:SHADOW, Reset_Type:S |
| 1644 | * DATA,VGPI_EN,MODE[2:2],DBNC_SEL[4:2],IRQ_SEL[6:2] |
| 1645 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1646 | #define MAX77779_PMICSGPIO_CNFG4 0xf1 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1647 | #define MAX77779_PMICSGPIO_CNFG4_DATA_SHIFT 0 |
| 1648 | #define MAX77779_PMICSGPIO_CNFG4_DATA_MASK (0x1 << 0) |
| 1649 | #define MAX77779_PMICSGPIO_CNFG4_DATA_CLEAR (~(0x1 << 0)) |
| 1650 | #define MAX77779_PMICSGPIO_CNFG4_VGPI_EN_SHIFT 1 |
| 1651 | #define MAX77779_PMICSGPIO_CNFG4_VGPI_EN_MASK (0x1 << 1) |
| 1652 | #define MAX77779_PMICSGPIO_CNFG4_VGPI_EN_CLEAR (~(0x1 << 1)) |
| 1653 | #define MAX77779_PMICSGPIO_CNFG4_MODE_SHIFT 2 |
| 1654 | #define MAX77779_PMICSGPIO_CNFG4_MODE_MASK (0x3 << 2) |
| 1655 | #define MAX77779_PMICSGPIO_CNFG4_MODE_CLEAR (~(0x3 << 2)) |
| 1656 | #define MAX77779_PMICSGPIO_CNFG4_DBNC_SEL_SHIFT 4 |
| 1657 | #define MAX77779_PMICSGPIO_CNFG4_DBNC_SEL_MASK (0x3 << 4) |
| 1658 | #define MAX77779_PMICSGPIO_CNFG4_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1659 | #define MAX77779_PMICSGPIO_CNFG4_IRQ_SEL_SHIFT 6 |
| 1660 | #define MAX77779_PMICSGPIO_CNFG4_IRQ_SEL_MASK (0x3 << 6) |
| 1661 | #define MAX77779_PMICSGPIO_CNFG4_IRQ_SEL_CLEAR (~(0x3 << 6)) |
| 1662 | static inline const char * |
| 1663 | max77779_pmicsgpio_cnfg4_cstr(char *buff, size_t len, int val) |
| 1664 | { |
| 1665 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1666 | int i = 0; |
| 1667 | |
| 1668 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 1669 | FIELD2VALUE(MAX77779_DATA, val)); |
| 1670 | i += scnprintf(&buff[i], len - i, " VGPI_EN=%x", |
| 1671 | FIELD2VALUE(MAX77779_VGPI_EN, val)); |
| 1672 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 1673 | FIELD2VALUE(MAX77779_MODE, val)); |
| 1674 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 1675 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 1676 | i += scnprintf(&buff[i], len - i, " IRQ_SEL=%x", |
| 1677 | FIELD2VALUE(MAX77779_IRQ_SEL, val)); |
| 1678 | #else |
| 1679 | buff[0] = 0; |
| 1680 | #endif |
| 1681 | return buff; |
| 1682 | } |
| 1683 | |
| 1684 | MAX77779_BFF(max77779_pmicsgpio_cnfg4_data,0,0) |
| 1685 | MAX77779_BFF(max77779_pmicsgpio_cnfg4_vgpi_en,1,1) |
| 1686 | MAX77779_BFF(max77779_pmicsgpio_cnfg4_mode,3,2) |
| 1687 | MAX77779_BFF(max77779_pmicsgpio_cnfg4_dbnc_sel,5,4) |
| 1688 | MAX77779_BFF(max77779_pmicsgpio_cnfg4_irq_sel,7,6) |
| 1689 | |
| 1690 | /* |
| 1691 | * SGPIO_CNFG5,0x0A,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1692 | * DATA,VGPI_EN,MODE[2:2],DBNC_SEL[4:2],IRQ_SEL[6:2] |
| 1693 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1694 | #define MAX77779_PMICSGPIO_CNFG5 0xf2 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1695 | #define MAX77779_PMICSGPIO_CNFG5_DATA_SHIFT 0 |
| 1696 | #define MAX77779_PMICSGPIO_CNFG5_DATA_MASK (0x1 << 0) |
| 1697 | #define MAX77779_PMICSGPIO_CNFG5_DATA_CLEAR (~(0x1 << 0)) |
| 1698 | #define MAX77779_PMICSGPIO_CNFG5_VGPI_EN_SHIFT 1 |
| 1699 | #define MAX77779_PMICSGPIO_CNFG5_VGPI_EN_MASK (0x1 << 1) |
| 1700 | #define MAX77779_PMICSGPIO_CNFG5_VGPI_EN_CLEAR (~(0x1 << 1)) |
| 1701 | #define MAX77779_PMICSGPIO_CNFG5_MODE_SHIFT 2 |
| 1702 | #define MAX77779_PMICSGPIO_CNFG5_MODE_MASK (0x3 << 2) |
| 1703 | #define MAX77779_PMICSGPIO_CNFG5_MODE_CLEAR (~(0x3 << 2)) |
| 1704 | #define MAX77779_PMICSGPIO_CNFG5_DBNC_SEL_SHIFT 4 |
| 1705 | #define MAX77779_PMICSGPIO_CNFG5_DBNC_SEL_MASK (0x3 << 4) |
| 1706 | #define MAX77779_PMICSGPIO_CNFG5_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1707 | #define MAX77779_PMICSGPIO_CNFG5_IRQ_SEL_SHIFT 6 |
| 1708 | #define MAX77779_PMICSGPIO_CNFG5_IRQ_SEL_MASK (0x3 << 6) |
| 1709 | #define MAX77779_PMICSGPIO_CNFG5_IRQ_SEL_CLEAR (~(0x3 << 6)) |
| 1710 | static inline const char * |
| 1711 | max77779_pmicsgpio_cnfg5_cstr(char *buff, size_t len, int val) |
| 1712 | { |
| 1713 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1714 | int i = 0; |
| 1715 | |
| 1716 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 1717 | FIELD2VALUE(MAX77779_DATA, val)); |
| 1718 | i += scnprintf(&buff[i], len - i, " VGPI_EN=%x", |
| 1719 | FIELD2VALUE(MAX77779_VGPI_EN, val)); |
| 1720 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 1721 | FIELD2VALUE(MAX77779_MODE, val)); |
| 1722 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 1723 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 1724 | i += scnprintf(&buff[i], len - i, " IRQ_SEL=%x", |
| 1725 | FIELD2VALUE(MAX77779_IRQ_SEL, val)); |
| 1726 | #else |
| 1727 | buff[0] = 0; |
| 1728 | #endif |
| 1729 | return buff; |
| 1730 | } |
| 1731 | |
| 1732 | MAX77779_BFF(max77779_pmicsgpio_cnfg5_data,0,0) |
| 1733 | MAX77779_BFF(max77779_pmicsgpio_cnfg5_vgpi_en,1,1) |
| 1734 | MAX77779_BFF(max77779_pmicsgpio_cnfg5_mode,3,2) |
| 1735 | MAX77779_BFF(max77779_pmicsgpio_cnfg5_dbnc_sel,5,4) |
| 1736 | MAX77779_BFF(max77779_pmicsgpio_cnfg5_irq_sel,7,6) |
| 1737 | |
| 1738 | /* |
| 1739 | * SGPIO_CNFG6,0x0B,0b00000100,0x4,OTP:SHADOW, Reset_Type:S |
| 1740 | * DATA,VGPI_EN,MODE[2:2],DBNC_SEL[4:2],IRQ_SEL[6:2] |
| 1741 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1742 | #define MAX77779_PMICSGPIO_CNFG6 0xf3 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1743 | #define MAX77779_PMICSGPIO_CNFG6_DATA_SHIFT 0 |
| 1744 | #define MAX77779_PMICSGPIO_CNFG6_DATA_MASK (0x1 << 0) |
| 1745 | #define MAX77779_PMICSGPIO_CNFG6_DATA_CLEAR (~(0x1 << 0)) |
| 1746 | #define MAX77779_PMICSGPIO_CNFG6_VGPI_EN_SHIFT 1 |
| 1747 | #define MAX77779_PMICSGPIO_CNFG6_VGPI_EN_MASK (0x1 << 1) |
| 1748 | #define MAX77779_PMICSGPIO_CNFG6_VGPI_EN_CLEAR (~(0x1 << 1)) |
| 1749 | #define MAX77779_PMICSGPIO_CNFG6_MODE_SHIFT 2 |
| 1750 | #define MAX77779_PMICSGPIO_CNFG6_MODE_MASK (0x3 << 2) |
| 1751 | #define MAX77779_PMICSGPIO_CNFG6_MODE_CLEAR (~(0x3 << 2)) |
| 1752 | #define MAX77779_PMICSGPIO_CNFG6_DBNC_SEL_SHIFT 4 |
| 1753 | #define MAX77779_PMICSGPIO_CNFG6_DBNC_SEL_MASK (0x3 << 4) |
| 1754 | #define MAX77779_PMICSGPIO_CNFG6_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1755 | #define MAX77779_PMICSGPIO_CNFG6_IRQ_SEL_SHIFT 6 |
| 1756 | #define MAX77779_PMICSGPIO_CNFG6_IRQ_SEL_MASK (0x3 << 6) |
| 1757 | #define MAX77779_PMICSGPIO_CNFG6_IRQ_SEL_CLEAR (~(0x3 << 6)) |
| 1758 | static inline const char * |
| 1759 | max77779_pmicsgpio_cnfg6_cstr(char *buff, size_t len, int val) |
| 1760 | { |
| 1761 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1762 | int i = 0; |
| 1763 | |
| 1764 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 1765 | FIELD2VALUE(MAX77779_DATA, val)); |
| 1766 | i += scnprintf(&buff[i], len - i, " VGPI_EN=%x", |
| 1767 | FIELD2VALUE(MAX77779_VGPI_EN, val)); |
| 1768 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 1769 | FIELD2VALUE(MAX77779_MODE, val)); |
| 1770 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 1771 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 1772 | i += scnprintf(&buff[i], len - i, " IRQ_SEL=%x", |
| 1773 | FIELD2VALUE(MAX77779_IRQ_SEL, val)); |
| 1774 | #else |
| 1775 | buff[0] = 0; |
| 1776 | #endif |
| 1777 | return buff; |
| 1778 | } |
| 1779 | |
| 1780 | MAX77779_BFF(max77779_pmicsgpio_cnfg6_data,0,0) |
| 1781 | MAX77779_BFF(max77779_pmicsgpio_cnfg6_vgpi_en,1,1) |
| 1782 | MAX77779_BFF(max77779_pmicsgpio_cnfg6_mode,3,2) |
| 1783 | MAX77779_BFF(max77779_pmicsgpio_cnfg6_dbnc_sel,5,4) |
| 1784 | MAX77779_BFF(max77779_pmicsgpio_cnfg6_irq_sel,7,6) |
| 1785 | |
| 1786 | /* |
| 1787 | * SGPIO_CNFG7,0x0C,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1788 | * DATA,VGPI_EN,MODE[2:2],DBNC_SEL[4:2],IRQ_SEL[6:2] |
| 1789 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1790 | #define MAX77779_PMICSGPIO_CNFG7 0xf4 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1791 | #define MAX77779_PMICSGPIO_CNFG7_DATA_SHIFT 0 |
| 1792 | #define MAX77779_PMICSGPIO_CNFG7_DATA_MASK (0x1 << 0) |
| 1793 | #define MAX77779_PMICSGPIO_CNFG7_DATA_CLEAR (~(0x1 << 0)) |
| 1794 | #define MAX77779_PMICSGPIO_CNFG7_VGPI_EN_SHIFT 1 |
| 1795 | #define MAX77779_PMICSGPIO_CNFG7_VGPI_EN_MASK (0x1 << 1) |
| 1796 | #define MAX77779_PMICSGPIO_CNFG7_VGPI_EN_CLEAR (~(0x1 << 1)) |
| 1797 | #define MAX77779_PMICSGPIO_CNFG7_MODE_SHIFT 2 |
| 1798 | #define MAX77779_PMICSGPIO_CNFG7_MODE_MASK (0x3 << 2) |
| 1799 | #define MAX77779_PMICSGPIO_CNFG7_MODE_CLEAR (~(0x3 << 2)) |
| 1800 | #define MAX77779_PMICSGPIO_CNFG7_DBNC_SEL_SHIFT 4 |
| 1801 | #define MAX77779_PMICSGPIO_CNFG7_DBNC_SEL_MASK (0x3 << 4) |
| 1802 | #define MAX77779_PMICSGPIO_CNFG7_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1803 | #define MAX77779_PMICSGPIO_CNFG7_IRQ_SEL_SHIFT 6 |
| 1804 | #define MAX77779_PMICSGPIO_CNFG7_IRQ_SEL_MASK (0x3 << 6) |
| 1805 | #define MAX77779_PMICSGPIO_CNFG7_IRQ_SEL_CLEAR (~(0x3 << 6)) |
| 1806 | static inline const char * |
| 1807 | max77779_pmicsgpio_cnfg7_cstr(char *buff, size_t len, int val) |
| 1808 | { |
| 1809 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1810 | int i = 0; |
| 1811 | |
| 1812 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 1813 | FIELD2VALUE(MAX77779_DATA, val)); |
| 1814 | i += scnprintf(&buff[i], len - i, " VGPI_EN=%x", |
| 1815 | FIELD2VALUE(MAX77779_VGPI_EN, val)); |
| 1816 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 1817 | FIELD2VALUE(MAX77779_MODE, val)); |
| 1818 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 1819 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 1820 | i += scnprintf(&buff[i], len - i, " IRQ_SEL=%x", |
| 1821 | FIELD2VALUE(MAX77779_IRQ_SEL, val)); |
| 1822 | #else |
| 1823 | buff[0] = 0; |
| 1824 | #endif |
| 1825 | return buff; |
| 1826 | } |
| 1827 | |
| 1828 | MAX77779_BFF(max77779_pmicsgpio_cnfg7_data,0,0) |
| 1829 | MAX77779_BFF(max77779_pmicsgpio_cnfg7_vgpi_en,1,1) |
| 1830 | MAX77779_BFF(max77779_pmicsgpio_cnfg7_mode,3,2) |
| 1831 | MAX77779_BFF(max77779_pmicsgpio_cnfg7_dbnc_sel,5,4) |
| 1832 | MAX77779_BFF(max77779_pmicsgpio_cnfg7_irq_sel,7,6) |
| 1833 | |
| 1834 | /* |
| 1835 | * AGPIO_CNFG0,0x0D,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1836 | * DATA,SPR_1,MODE[2:2],DBNC_SEL[4:2],RSVD_7_6[6:2] |
| 1837 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1838 | #define MAX77779_PMICAGPIO_CNFG0 0xf5 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1839 | #define MAX77779_PMICAGPIO_CNFG0_DATA_SHIFT 0 |
| 1840 | #define MAX77779_PMICAGPIO_CNFG0_DATA_MASK (0x1 << 0) |
| 1841 | #define MAX77779_PMICAGPIO_CNFG0_DATA_CLEAR (~(0x1 << 0)) |
| 1842 | #define MAX77779_PMICAGPIO_CNFG0_SPR_1_SHIFT 1 |
| 1843 | #define MAX77779_PMICAGPIO_CNFG0_SPR_1_MASK (0x1 << 1) |
| 1844 | #define MAX77779_PMICAGPIO_CNFG0_SPR_1_CLEAR (~(0x1 << 1)) |
| 1845 | #define MAX77779_PMICAGPIO_CNFG0_MODE_SHIFT 2 |
| 1846 | #define MAX77779_PMICAGPIO_CNFG0_MODE_MASK (0x3 << 2) |
| 1847 | #define MAX77779_PMICAGPIO_CNFG0_MODE_CLEAR (~(0x3 << 2)) |
| 1848 | #define MAX77779_PMICAGPIO_CNFG0_DBNC_SEL_SHIFT 4 |
| 1849 | #define MAX77779_PMICAGPIO_CNFG0_DBNC_SEL_MASK (0x3 << 4) |
| 1850 | #define MAX77779_PMICAGPIO_CNFG0_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1851 | #define MAX77779_PMICAGPIO_CNFG0_RSVD_7_6_SHIFT 6 |
| 1852 | #define MAX77779_PMICAGPIO_CNFG0_RSVD_7_6_MASK (0x3 << 6) |
| 1853 | #define MAX77779_PMICAGPIO_CNFG0_RSVD_7_6_CLEAR (~(0x3 << 6)) |
| 1854 | static inline const char * |
| 1855 | max77779_pmicagpio_cnfg0_cstr(char *buff, size_t len, int val) |
| 1856 | { |
| 1857 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1858 | int i = 0; |
| 1859 | |
| 1860 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 1861 | FIELD2VALUE(MAX77779_DATA, val)); |
| 1862 | i += scnprintf(&buff[i], len - i, " SPR_1=%x", |
| 1863 | FIELD2VALUE(MAX77779_SPR_1, val)); |
| 1864 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 1865 | FIELD2VALUE(MAX77779_MODE, val)); |
| 1866 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 1867 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 1868 | i += scnprintf(&buff[i], len - i, " RSVD_7_6=%x", |
| 1869 | FIELD2VALUE(MAX77779_RSVD_7_6, val)); |
| 1870 | #else |
| 1871 | buff[0] = 0; |
| 1872 | #endif |
| 1873 | return buff; |
| 1874 | } |
| 1875 | |
| 1876 | MAX77779_BFF(max77779_pmicagpio_cnfg0_data,0,0) |
| 1877 | MAX77779_BFF(max77779_pmicagpio_cnfg0_spr_1,1,1) |
| 1878 | MAX77779_BFF(max77779_pmicagpio_cnfg0_mode,3,2) |
| 1879 | MAX77779_BFF(max77779_pmicagpio_cnfg0_dbnc_sel,5,4) |
| 1880 | MAX77779_BFF(max77779_pmicagpio_cnfg0_rsvd_7_6,7,6) |
| 1881 | |
| 1882 | /* |
| 1883 | * AGPIO_CNFG1,0x0E,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1884 | * DATA,SPR_1,MODE[2:2],DBNC_SEL[4:2],RSVD_7_6[6:2] |
| 1885 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1886 | #define MAX77779_PMICAGPIO_CNFG1 0xf6 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1887 | #define MAX77779_PMICAGPIO_CNFG1_DATA_SHIFT 0 |
| 1888 | #define MAX77779_PMICAGPIO_CNFG1_DATA_MASK (0x1 << 0) |
| 1889 | #define MAX77779_PMICAGPIO_CNFG1_DATA_CLEAR (~(0x1 << 0)) |
| 1890 | #define MAX77779_PMICAGPIO_CNFG1_SPR_1_SHIFT 1 |
| 1891 | #define MAX77779_PMICAGPIO_CNFG1_SPR_1_MASK (0x1 << 1) |
| 1892 | #define MAX77779_PMICAGPIO_CNFG1_SPR_1_CLEAR (~(0x1 << 1)) |
| 1893 | #define MAX77779_PMICAGPIO_CNFG1_MODE_SHIFT 2 |
| 1894 | #define MAX77779_PMICAGPIO_CNFG1_MODE_MASK (0x3 << 2) |
| 1895 | #define MAX77779_PMICAGPIO_CNFG1_MODE_CLEAR (~(0x3 << 2)) |
| 1896 | #define MAX77779_PMICAGPIO_CNFG1_DBNC_SEL_SHIFT 4 |
| 1897 | #define MAX77779_PMICAGPIO_CNFG1_DBNC_SEL_MASK (0x3 << 4) |
| 1898 | #define MAX77779_PMICAGPIO_CNFG1_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1899 | #define MAX77779_PMICAGPIO_CNFG1_RSVD_7_6_SHIFT 6 |
| 1900 | #define MAX77779_PMICAGPIO_CNFG1_RSVD_7_6_MASK (0x3 << 6) |
| 1901 | #define MAX77779_PMICAGPIO_CNFG1_RSVD_7_6_CLEAR (~(0x3 << 6)) |
| 1902 | static inline const char * |
| 1903 | max77779_pmicagpio_cnfg1_cstr(char *buff, size_t len, int val) |
| 1904 | { |
| 1905 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1906 | int i = 0; |
| 1907 | |
| 1908 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 1909 | FIELD2VALUE(MAX77779_DATA, val)); |
| 1910 | i += scnprintf(&buff[i], len - i, " SPR_1=%x", |
| 1911 | FIELD2VALUE(MAX77779_SPR_1, val)); |
| 1912 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 1913 | FIELD2VALUE(MAX77779_MODE, val)); |
| 1914 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 1915 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 1916 | i += scnprintf(&buff[i], len - i, " RSVD_7_6=%x", |
| 1917 | FIELD2VALUE(MAX77779_RSVD_7_6, val)); |
| 1918 | #else |
| 1919 | buff[0] = 0; |
| 1920 | #endif |
| 1921 | return buff; |
| 1922 | } |
| 1923 | |
| 1924 | MAX77779_BFF(max77779_pmicagpio_cnfg1_data,0,0) |
| 1925 | MAX77779_BFF(max77779_pmicagpio_cnfg1_spr_1,1,1) |
| 1926 | MAX77779_BFF(max77779_pmicagpio_cnfg1_mode,3,2) |
| 1927 | MAX77779_BFF(max77779_pmicagpio_cnfg1_dbnc_sel,5,4) |
| 1928 | MAX77779_BFF(max77779_pmicagpio_cnfg1_rsvd_7_6,7,6) |
| 1929 | |
| 1930 | /* |
| 1931 | * AGPIO_CNFG2,0x0F,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1932 | * DATA,SPR_1,MODE[2:2],DBNC_SEL[4:2],RSVD_7_6[6:2] |
| 1933 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1934 | #define MAX77779_PMICAGPIO_CNFG2 0xf7 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1935 | #define MAX77779_PMICAGPIO_CNFG2_DATA_SHIFT 0 |
| 1936 | #define MAX77779_PMICAGPIO_CNFG2_DATA_MASK (0x1 << 0) |
| 1937 | #define MAX77779_PMICAGPIO_CNFG2_DATA_CLEAR (~(0x1 << 0)) |
| 1938 | #define MAX77779_PMICAGPIO_CNFG2_SPR_1_SHIFT 1 |
| 1939 | #define MAX77779_PMICAGPIO_CNFG2_SPR_1_MASK (0x1 << 1) |
| 1940 | #define MAX77779_PMICAGPIO_CNFG2_SPR_1_CLEAR (~(0x1 << 1)) |
| 1941 | #define MAX77779_PMICAGPIO_CNFG2_MODE_SHIFT 2 |
| 1942 | #define MAX77779_PMICAGPIO_CNFG2_MODE_MASK (0x3 << 2) |
| 1943 | #define MAX77779_PMICAGPIO_CNFG2_MODE_CLEAR (~(0x3 << 2)) |
| 1944 | #define MAX77779_PMICAGPIO_CNFG2_DBNC_SEL_SHIFT 4 |
| 1945 | #define MAX77779_PMICAGPIO_CNFG2_DBNC_SEL_MASK (0x3 << 4) |
| 1946 | #define MAX77779_PMICAGPIO_CNFG2_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1947 | #define MAX77779_PMICAGPIO_CNFG2_RSVD_7_6_SHIFT 6 |
| 1948 | #define MAX77779_PMICAGPIO_CNFG2_RSVD_7_6_MASK (0x3 << 6) |
| 1949 | #define MAX77779_PMICAGPIO_CNFG2_RSVD_7_6_CLEAR (~(0x3 << 6)) |
| 1950 | static inline const char * |
| 1951 | max77779_pmicagpio_cnfg2_cstr(char *buff, size_t len, int val) |
| 1952 | { |
| 1953 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 1954 | int i = 0; |
| 1955 | |
| 1956 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 1957 | FIELD2VALUE(MAX77779_DATA, val)); |
| 1958 | i += scnprintf(&buff[i], len - i, " SPR_1=%x", |
| 1959 | FIELD2VALUE(MAX77779_SPR_1, val)); |
| 1960 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 1961 | FIELD2VALUE(MAX77779_MODE, val)); |
| 1962 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 1963 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 1964 | i += scnprintf(&buff[i], len - i, " RSVD_7_6=%x", |
| 1965 | FIELD2VALUE(MAX77779_RSVD_7_6, val)); |
| 1966 | #else |
| 1967 | buff[0] = 0; |
| 1968 | #endif |
| 1969 | return buff; |
| 1970 | } |
| 1971 | |
| 1972 | MAX77779_BFF(max77779_pmicagpio_cnfg2_data,0,0) |
| 1973 | MAX77779_BFF(max77779_pmicagpio_cnfg2_spr_1,1,1) |
| 1974 | MAX77779_BFF(max77779_pmicagpio_cnfg2_mode,3,2) |
| 1975 | MAX77779_BFF(max77779_pmicagpio_cnfg2_dbnc_sel,5,4) |
| 1976 | MAX77779_BFF(max77779_pmicagpio_cnfg2_rsvd_7_6,7,6) |
| 1977 | |
| 1978 | /* |
| 1979 | * AGPIO_CNFG3,0x10,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 1980 | * DATA,SPR_1,MODE[2:2],DBNC_SEL[4:2],RSVD_7_6[6:2] |
| 1981 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 1982 | #define MAX77779_PMICAGPIO_CNFG3 0xf8 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 1983 | #define MAX77779_PMICAGPIO_CNFG3_DATA_SHIFT 0 |
| 1984 | #define MAX77779_PMICAGPIO_CNFG3_DATA_MASK (0x1 << 0) |
| 1985 | #define MAX77779_PMICAGPIO_CNFG3_DATA_CLEAR (~(0x1 << 0)) |
| 1986 | #define MAX77779_PMICAGPIO_CNFG3_SPR_1_SHIFT 1 |
| 1987 | #define MAX77779_PMICAGPIO_CNFG3_SPR_1_MASK (0x1 << 1) |
| 1988 | #define MAX77779_PMICAGPIO_CNFG3_SPR_1_CLEAR (~(0x1 << 1)) |
| 1989 | #define MAX77779_PMICAGPIO_CNFG3_MODE_SHIFT 2 |
| 1990 | #define MAX77779_PMICAGPIO_CNFG3_MODE_MASK (0x3 << 2) |
| 1991 | #define MAX77779_PMICAGPIO_CNFG3_MODE_CLEAR (~(0x3 << 2)) |
| 1992 | #define MAX77779_PMICAGPIO_CNFG3_DBNC_SEL_SHIFT 4 |
| 1993 | #define MAX77779_PMICAGPIO_CNFG3_DBNC_SEL_MASK (0x3 << 4) |
| 1994 | #define MAX77779_PMICAGPIO_CNFG3_DBNC_SEL_CLEAR (~(0x3 << 4)) |
| 1995 | #define MAX77779_PMICAGPIO_CNFG3_RSVD_7_6_SHIFT 6 |
| 1996 | #define MAX77779_PMICAGPIO_CNFG3_RSVD_7_6_MASK (0x3 << 6) |
| 1997 | #define MAX77779_PMICAGPIO_CNFG3_RSVD_7_6_CLEAR (~(0x3 << 6)) |
| 1998 | static inline const char * |
| 1999 | max77779_pmicagpio_cnfg3_cstr(char *buff, size_t len, int val) |
| 2000 | { |
| 2001 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2002 | int i = 0; |
| 2003 | |
| 2004 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 2005 | FIELD2VALUE(MAX77779_DATA, val)); |
| 2006 | i += scnprintf(&buff[i], len - i, " SPR_1=%x", |
| 2007 | FIELD2VALUE(MAX77779_SPR_1, val)); |
| 2008 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 2009 | FIELD2VALUE(MAX77779_MODE, val)); |
| 2010 | i += scnprintf(&buff[i], len - i, " DBNC_SEL=%x", |
| 2011 | FIELD2VALUE(MAX77779_DBNC_SEL, val)); |
| 2012 | i += scnprintf(&buff[i], len - i, " RSVD_7_6=%x", |
| 2013 | FIELD2VALUE(MAX77779_RSVD_7_6, val)); |
| 2014 | #else |
| 2015 | buff[0] = 0; |
| 2016 | #endif |
| 2017 | return buff; |
| 2018 | } |
| 2019 | |
| 2020 | MAX77779_BFF(max77779_pmicagpio_cnfg3_data,0,0) |
| 2021 | MAX77779_BFF(max77779_pmicagpio_cnfg3_spr_1,1,1) |
| 2022 | MAX77779_BFF(max77779_pmicagpio_cnfg3_mode,3,2) |
| 2023 | MAX77779_BFF(max77779_pmicagpio_cnfg3_dbnc_sel,5,4) |
| 2024 | MAX77779_BFF(max77779_pmicagpio_cnfg3_rsvd_7_6,7,6) |
| 2025 | |
| 2026 | /* |
| 2027 | * AGPIO_CNFG4,0x11,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 2028 | * DATA,SPR_1,MODE[2:2],RSVD_7_4[4:4] |
| 2029 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2030 | #define MAX77779_PMICAGPIO_CNFG4 0xf9 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2031 | #define MAX77779_PMICAGPIO_CNFG4_DATA_SHIFT 0 |
| 2032 | #define MAX77779_PMICAGPIO_CNFG4_DATA_MASK (0x1 << 0) |
| 2033 | #define MAX77779_PMICAGPIO_CNFG4_DATA_CLEAR (~(0x1 << 0)) |
| 2034 | #define MAX77779_PMICAGPIO_CNFG4_SPR_1_SHIFT 1 |
| 2035 | #define MAX77779_PMICAGPIO_CNFG4_SPR_1_MASK (0x1 << 1) |
| 2036 | #define MAX77779_PMICAGPIO_CNFG4_SPR_1_CLEAR (~(0x1 << 1)) |
| 2037 | #define MAX77779_PMICAGPIO_CNFG4_MODE_SHIFT 2 |
| 2038 | #define MAX77779_PMICAGPIO_CNFG4_MODE_MASK (0x3 << 2) |
| 2039 | #define MAX77779_PMICAGPIO_CNFG4_MODE_CLEAR (~(0x3 << 2)) |
| 2040 | #define MAX77779_PMICAGPIO_CNFG4_RSVD_7_4_SHIFT 4 |
| 2041 | #define MAX77779_PMICAGPIO_CNFG4_RSVD_7_4_MASK (0xf << 4) |
| 2042 | #define MAX77779_PMICAGPIO_CNFG4_RSVD_7_4_CLEAR (~(0xf << 4)) |
| 2043 | static inline const char * |
| 2044 | max77779_pmicagpio_cnfg4_cstr(char *buff, size_t len, int val) |
| 2045 | { |
| 2046 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2047 | int i = 0; |
| 2048 | |
| 2049 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 2050 | FIELD2VALUE(MAX77779_DATA, val)); |
| 2051 | i += scnprintf(&buff[i], len - i, " SPR_1=%x", |
| 2052 | FIELD2VALUE(MAX77779_SPR_1, val)); |
| 2053 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 2054 | FIELD2VALUE(MAX77779_MODE, val)); |
| 2055 | i += scnprintf(&buff[i], len - i, " RSVD_7_4=%x", |
| 2056 | FIELD2VALUE(MAX77779_RSVD_7_4, val)); |
| 2057 | #else |
| 2058 | buff[0] = 0; |
| 2059 | #endif |
| 2060 | return buff; |
| 2061 | } |
| 2062 | |
| 2063 | MAX77779_BFF(max77779_pmicagpio_cnfg4_data,0,0) |
| 2064 | MAX77779_BFF(max77779_pmicagpio_cnfg4_spr_1,1,1) |
| 2065 | MAX77779_BFF(max77779_pmicagpio_cnfg4_mode,3,2) |
| 2066 | MAX77779_BFF(max77779_pmicagpio_cnfg4_rsvd_7_4,7,4) |
| 2067 | |
| 2068 | /* |
| 2069 | * AGPIO_CNFG5,0x12,0b00000000,0x0,OTP:SHADOW, Reset_Type:S |
| 2070 | * DATA,SPR_1,MODE[2:2],RSVD_7_4[4:4] |
| 2071 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2072 | #define MAX77779_PMICAGPIO_CNFG5 0xfa |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2073 | #define MAX77779_PMICAGPIO_CNFG5_DATA_SHIFT 0 |
| 2074 | #define MAX77779_PMICAGPIO_CNFG5_DATA_MASK (0x1 << 0) |
| 2075 | #define MAX77779_PMICAGPIO_CNFG5_DATA_CLEAR (~(0x1 << 0)) |
| 2076 | #define MAX77779_PMICAGPIO_CNFG5_SPR_1_SHIFT 1 |
| 2077 | #define MAX77779_PMICAGPIO_CNFG5_SPR_1_MASK (0x1 << 1) |
| 2078 | #define MAX77779_PMICAGPIO_CNFG5_SPR_1_CLEAR (~(0x1 << 1)) |
| 2079 | #define MAX77779_PMICAGPIO_CNFG5_MODE_SHIFT 2 |
| 2080 | #define MAX77779_PMICAGPIO_CNFG5_MODE_MASK (0x3 << 2) |
| 2081 | #define MAX77779_PMICAGPIO_CNFG5_MODE_CLEAR (~(0x3 << 2)) |
| 2082 | #define MAX77779_PMICAGPIO_CNFG5_RSVD_7_4_SHIFT 4 |
| 2083 | #define MAX77779_PMICAGPIO_CNFG5_RSVD_7_4_MASK (0xf << 4) |
| 2084 | #define MAX77779_PMICAGPIO_CNFG5_RSVD_7_4_CLEAR (~(0xf << 4)) |
| 2085 | static inline const char * |
| 2086 | max77779_pmicagpio_cnfg5_cstr(char *buff, size_t len, int val) |
| 2087 | { |
| 2088 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2089 | int i = 0; |
| 2090 | |
| 2091 | i += scnprintf(&buff[i], len - i, " DATA=%x", |
| 2092 | FIELD2VALUE(MAX77779_DATA, val)); |
| 2093 | i += scnprintf(&buff[i], len - i, " SPR_1=%x", |
| 2094 | FIELD2VALUE(MAX77779_SPR_1, val)); |
| 2095 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 2096 | FIELD2VALUE(MAX77779_MODE, val)); |
| 2097 | i += scnprintf(&buff[i], len - i, " RSVD_7_4=%x", |
| 2098 | FIELD2VALUE(MAX77779_RSVD_7_4, val)); |
| 2099 | #else |
| 2100 | buff[0] = 0; |
| 2101 | #endif |
| 2102 | return buff; |
| 2103 | } |
| 2104 | |
| 2105 | MAX77779_BFF(max77779_pmicagpio_cnfg5_data,0,0) |
| 2106 | MAX77779_BFF(max77779_pmicagpio_cnfg5_spr_1,1,1) |
| 2107 | MAX77779_BFF(max77779_pmicagpio_cnfg5_mode,3,2) |
| 2108 | MAX77779_BFF(max77779_pmicagpio_cnfg5_rsvd_7_4,7,4) |
| 2109 | |
| 2110 | /* |
| 2111 | * VGPI_CNFG,0x13,0b00000001,0x1,Reset_Type:S |
| 2112 | * VGPI_PR,SPR_7_1[1:7] |
| 2113 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2114 | #define MAX77779_PMICVGPI_CNFG 0xfb |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2115 | #define MAX77779_PMICVGPI_CNFG_VGPI_PR_SHIFT 0 |
| 2116 | #define MAX77779_PMICVGPI_CNFG_VGPI_PR_MASK (0x1 << 0) |
| 2117 | #define MAX77779_PMICVGPI_CNFG_VGPI_PR_CLEAR (~(0x1 << 0)) |
| 2118 | #define MAX77779_PMICVGPI_CNFG_SPR_7_1_SHIFT 1 |
| 2119 | #define MAX77779_PMICVGPI_CNFG_SPR_7_1_MASK (0x7f << 1) |
| 2120 | #define MAX77779_PMICVGPI_CNFG_SPR_7_1_CLEAR (~(0x7f << 1)) |
| 2121 | static inline const char * |
| 2122 | max77779_pmicvgpi_cnfg_cstr(char *buff, size_t len, int val) |
| 2123 | { |
| 2124 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2125 | int i = 0; |
| 2126 | |
| 2127 | i += scnprintf(&buff[i], len - i, " VGPI_PR=%x", |
| 2128 | FIELD2VALUE(MAX77779_VGPI_PR, val)); |
| 2129 | i += scnprintf(&buff[i], len - i, " SPR_7_1=%x", |
| 2130 | FIELD2VALUE(MAX77779_SPR_7_1, val)); |
| 2131 | #else |
| 2132 | buff[0] = 0; |
| 2133 | #endif |
| 2134 | return buff; |
| 2135 | } |
| 2136 | |
| 2137 | MAX77779_BFF(max77779_pmicvgpi_cnfg_vgpi_pr,0,0) |
| 2138 | MAX77779_BFF(max77779_pmicvgpi_cnfg_spr_7_1,7,1) |
| 2139 | /* |
| 2140 | * Section: JEITA_FUNC 0x00 8 |
| 2141 | */ |
| 2142 | |
| 2143 | |
| 2144 | /* |
| 2145 | * CHGIN_I_ADC_L,0x00,0b00000000,0x0,Reset_Type:S |
| 2146 | */ |
| 2147 | #define MAX77779_CHGCHGIN_I_ADC_L 0x00 |
| 2148 | |
| 2149 | /* |
| 2150 | * CHGIN_I_ADC_H,0x01,0b00000000,0x0,Reset_Type:S |
| 2151 | */ |
| 2152 | #define MAX77779_CHGCHGIN_I_ADC_H 0x01 |
| 2153 | |
| 2154 | /* |
| 2155 | * CHGIN_V_ADC_L,0x02,0b00000000,0x0,Reset_Type:S |
| 2156 | */ |
| 2157 | #define MAX77779_CHGCHGIN_V_ADC_L 0x02 |
| 2158 | |
| 2159 | /* |
| 2160 | * CHGIN_V_ADC_H,0x03,0b00000000,0x0,Reset_Type:S |
| 2161 | */ |
| 2162 | #define MAX77779_CHGCHGIN_V_ADC_H 0x03 |
| 2163 | |
| 2164 | /* |
| 2165 | * WCIN_I_ADC_L,0x04,0b00000000,0x0,Reset_Type:S |
| 2166 | */ |
| 2167 | #define MAX77779_CHGWCIN_I_ADC_L 0x04 |
| 2168 | |
| 2169 | /* |
| 2170 | * WCIN_I_ADC_H,0x05,0b00000000,0x0,Reset_Type:S |
| 2171 | */ |
| 2172 | #define MAX77779_CHGWCIN_I_ADC_H 0x05 |
| 2173 | |
| 2174 | /* |
| 2175 | * WCIN_V_ADC_L,0x06,0b00000000,0x0,Reset_Type:S |
| 2176 | */ |
| 2177 | #define MAX77779_CHGWCIN_V_ADC_L 0x06 |
| 2178 | |
| 2179 | /* |
| 2180 | * WCIN_V_ADC_H,0x07,0b00000000,0x0,Reset_Type:S |
| 2181 | */ |
| 2182 | #define MAX77779_CHGWCIN_V_ADC_H 0x07 |
| 2183 | |
| 2184 | /* |
| 2185 | * THM1_TEMP_L,0x08,0b00000000,0x0,Reset_Type:S |
| 2186 | */ |
| 2187 | #define MAX77779_CHGTHM1_TEMP_L 0x08 |
| 2188 | |
| 2189 | /* |
| 2190 | * THM1_TEMP_H,0x09,0b00000000,0x0,Reset_Type:S |
| 2191 | */ |
| 2192 | #define MAX77779_CHGTHM1_TEMP_H 0x09 |
| 2193 | |
| 2194 | /* |
| 2195 | * THM2_TEMP_L,0x0A,0b00000000,0x0,Reset_Type:S |
| 2196 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2197 | #define MAX77779_CHGTHM2_TEMP_L 0x0a |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2198 | |
| 2199 | /* |
| 2200 | * THM2_TEMP_H,0x0B,0b00000000,0x0,Reset_Type:S |
| 2201 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2202 | #define MAX77779_CHGTHM2_TEMP_H 0x0b |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2203 | |
| 2204 | /* |
| 2205 | * THM3_TEMP_L,0x0C,0b00000000,0x0,Reset_Type:S |
| 2206 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2207 | #define MAX77779_CHGTHM3_TEMP_L 0x0c |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2208 | |
| 2209 | /* |
| 2210 | * THM3_TEMP_H,0x0D,0b00000000,0x0,Reset_Type:S |
| 2211 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2212 | #define MAX77779_CHGTHM3_TEMP_H 0x0d |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2213 | |
| 2214 | /* |
| 2215 | * BATT_ID1_ADC_L,0x0E,0b00000000,0x0,Reset_Type:S |
| 2216 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2217 | #define MAX77779_CHGBATT_ID1_ADC_L 0x0e |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2218 | |
| 2219 | /* |
| 2220 | * BATT_ID1_ADC_H,0x0F,0b00000000,0x0,Reset_Type:S |
| 2221 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2222 | #define MAX77779_CHGBATT_ID1_ADC_H 0x0f |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2223 | |
| 2224 | /* |
| 2225 | * BATT_ID2_ADC_L,0x10,0b00000000,0x0,Reset_Type:S |
| 2226 | */ |
| 2227 | #define MAX77779_CHGBATT_ID2_ADC_L 0x10 |
| 2228 | |
| 2229 | /* |
| 2230 | * BATT_ID2_ADC_H,0x11,0b00000000,0x0,Reset_Type:S |
| 2231 | */ |
| 2232 | #define MAX77779_CHGBATT_ID2_ADC_H 0x11 |
| 2233 | |
| 2234 | /* |
| 2235 | * JEITA_CTRL,0x12,0b00000000,0x0,OTP:SHADOW, Reset_Type:O |
| 2236 | * IN_ADC_FORCE,THM2_TEMP_FORCE,THM3_CHECK_EN,BATT_ID1_DO,BATT_ID2_DO,SPR_7_5[5:3] |
| 2237 | */ |
| 2238 | #define MAX77779_CHGJEITA_CTRL 0x12 |
| 2239 | #define MAX77779_CHGJEITA_CTRL_IN_ADC_FORCE_SHIFT 0 |
| 2240 | #define MAX77779_CHGJEITA_CTRL_IN_ADC_FORCE_MASK (0x1 << 0) |
| 2241 | #define MAX77779_CHGJEITA_CTRL_IN_ADC_FORCE_CLEAR (~(0x1 << 0)) |
| 2242 | #define MAX77779_CHGJEITA_CTRL_THM2_TEMP_FORCE_SHIFT 1 |
| 2243 | #define MAX77779_CHGJEITA_CTRL_THM2_TEMP_FORCE_MASK (0x1 << 1) |
| 2244 | #define MAX77779_CHGJEITA_CTRL_THM2_TEMP_FORCE_CLEAR (~(0x1 << 1)) |
| 2245 | #define MAX77779_CHGJEITA_CTRL_THM3_CHECK_EN_SHIFT 2 |
| 2246 | #define MAX77779_CHGJEITA_CTRL_THM3_CHECK_EN_MASK (0x1 << 2) |
| 2247 | #define MAX77779_CHGJEITA_CTRL_THM3_CHECK_EN_CLEAR (~(0x1 << 2)) |
| 2248 | #define MAX77779_CHGJEITA_CTRL_BATT_ID1_DO_SHIFT 3 |
| 2249 | #define MAX77779_CHGJEITA_CTRL_BATT_ID1_DO_MASK (0x1 << 3) |
| 2250 | #define MAX77779_CHGJEITA_CTRL_BATT_ID1_DO_CLEAR (~(0x1 << 3)) |
| 2251 | #define MAX77779_CHGJEITA_CTRL_BATT_ID2_DO_SHIFT 4 |
| 2252 | #define MAX77779_CHGJEITA_CTRL_BATT_ID2_DO_MASK (0x1 << 4) |
| 2253 | #define MAX77779_CHGJEITA_CTRL_BATT_ID2_DO_CLEAR (~(0x1 << 4)) |
| 2254 | #define MAX77779_CHGJEITA_CTRL_SPR_7_5_SHIFT 5 |
| 2255 | #define MAX77779_CHGJEITA_CTRL_SPR_7_5_MASK (0x7 << 5) |
| 2256 | #define MAX77779_CHGJEITA_CTRL_SPR_7_5_CLEAR (~(0x7 << 5)) |
| 2257 | static inline const char * |
| 2258 | max77779_chgjeita_ctrl_cstr(char *buff, size_t len, int val) |
| 2259 | { |
| 2260 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2261 | int i = 0; |
| 2262 | |
| 2263 | i += scnprintf(&buff[i], len - i, " IN_ADC_FORCE=%x", |
| 2264 | FIELD2VALUE(MAX77779_IN_ADC_FORCE, val)); |
| 2265 | i += scnprintf(&buff[i], len - i, " THM2_TEMP_FORCE=%x", |
| 2266 | FIELD2VALUE(MAX77779_THM2_TEMP_FORCE, val)); |
| 2267 | i += scnprintf(&buff[i], len - i, " THM3_CHECK_EN=%x", |
| 2268 | FIELD2VALUE(MAX77779_THM3_CHECK_EN, val)); |
| 2269 | i += scnprintf(&buff[i], len - i, " BATT_ID1_DO=%x", |
| 2270 | FIELD2VALUE(MAX77779_BATT_ID1_DO, val)); |
| 2271 | i += scnprintf(&buff[i], len - i, " BATT_ID2_DO=%x", |
| 2272 | FIELD2VALUE(MAX77779_BATT_ID2_DO, val)); |
| 2273 | i += scnprintf(&buff[i], len - i, " SPR_7_5=%x", |
| 2274 | FIELD2VALUE(MAX77779_SPR_7_5, val)); |
| 2275 | #else |
| 2276 | buff[0] = 0; |
| 2277 | #endif |
| 2278 | return buff; |
| 2279 | } |
| 2280 | |
| 2281 | MAX77779_BFF(max77779_chgjeita_ctrl_in_adc_force,0,0) |
| 2282 | MAX77779_BFF(max77779_chgjeita_ctrl_thm2_temp_force,1,1) |
| 2283 | MAX77779_BFF(max77779_chgjeita_ctrl_thm3_check_en,2,2) |
| 2284 | MAX77779_BFF(max77779_chgjeita_ctrl_batt_id1_do,3,3) |
| 2285 | MAX77779_BFF(max77779_chgjeita_ctrl_batt_id2_do,4,4) |
| 2286 | MAX77779_BFF(max77779_chgjeita_ctrl_spr_7_5,7,5) |
| 2287 | |
| 2288 | /* |
| 2289 | * JEITA_FLAGS,0x13,0b00000000,0x0,Reset_Type:S |
| 2290 | * CHGIN_I_ADC_ON,WCIN_I_ADC_ON,THM3_TEMP_ON,THM2_TEMP_ON,THM1_TEMP_ON, |
| 2291 | * BATT_ID2_ADC_OK,BATT_ID1_ADC_OK,SPR_7 |
| 2292 | */ |
| 2293 | #define MAX77779_CHGJEITA_FLAGS 0x13 |
| 2294 | #define MAX77779_CHGJEITA_FLAGS_CHGIN_I_ADC_ON_SHIFT 0 |
| 2295 | #define MAX77779_CHGJEITA_FLAGS_CHGIN_I_ADC_ON_MASK (0x1 << 0) |
| 2296 | #define MAX77779_CHGJEITA_FLAGS_CHGIN_I_ADC_ON_CLEAR (~(0x1 << 0)) |
| 2297 | #define MAX77779_CHGJEITA_FLAGS_WCIN_I_ADC_ON_SHIFT 1 |
| 2298 | #define MAX77779_CHGJEITA_FLAGS_WCIN_I_ADC_ON_MASK (0x1 << 1) |
| 2299 | #define MAX77779_CHGJEITA_FLAGS_WCIN_I_ADC_ON_CLEAR (~(0x1 << 1)) |
| 2300 | #define MAX77779_CHGJEITA_FLAGS_THM3_TEMP_ON_SHIFT 2 |
| 2301 | #define MAX77779_CHGJEITA_FLAGS_THM3_TEMP_ON_MASK (0x1 << 2) |
| 2302 | #define MAX77779_CHGJEITA_FLAGS_THM3_TEMP_ON_CLEAR (~(0x1 << 2)) |
| 2303 | #define MAX77779_CHGJEITA_FLAGS_THM2_TEMP_ON_SHIFT 3 |
| 2304 | #define MAX77779_CHGJEITA_FLAGS_THM2_TEMP_ON_MASK (0x1 << 3) |
| 2305 | #define MAX77779_CHGJEITA_FLAGS_THM2_TEMP_ON_CLEAR (~(0x1 << 3)) |
| 2306 | #define MAX77779_CHGJEITA_FLAGS_THM1_TEMP_ON_SHIFT 4 |
| 2307 | #define MAX77779_CHGJEITA_FLAGS_THM1_TEMP_ON_MASK (0x1 << 4) |
| 2308 | #define MAX77779_CHGJEITA_FLAGS_THM1_TEMP_ON_CLEAR (~(0x1 << 4)) |
| 2309 | #define MAX77779_CHGJEITA_FLAGS_BATT_ID2_ADC_OK_SHIFT 5 |
| 2310 | #define MAX77779_CHGJEITA_FLAGS_BATT_ID2_ADC_OK_MASK (0x1 << 5) |
| 2311 | #define MAX77779_CHGJEITA_FLAGS_BATT_ID2_ADC_OK_CLEAR (~(0x1 << 5)) |
| 2312 | #define MAX77779_CHGJEITA_FLAGS_BATT_ID1_ADC_OK_SHIFT 6 |
| 2313 | #define MAX77779_CHGJEITA_FLAGS_BATT_ID1_ADC_OK_MASK (0x1 << 6) |
| 2314 | #define MAX77779_CHGJEITA_FLAGS_BATT_ID1_ADC_OK_CLEAR (~(0x1 << 6)) |
| 2315 | #define MAX77779_CHGJEITA_FLAGS_SPR_7_SHIFT 7 |
| 2316 | #define MAX77779_CHGJEITA_FLAGS_SPR_7_MASK (0x1 << 7) |
| 2317 | #define MAX77779_CHGJEITA_FLAGS_SPR_7_CLEAR (~(0x1 << 7)) |
| 2318 | static inline const char * |
| 2319 | max77779_chgjeita_flags_cstr(char *buff, size_t len, int val) |
| 2320 | { |
| 2321 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2322 | int i = 0; |
| 2323 | |
| 2324 | i += scnprintf(&buff[i], len - i, " CHGIN_I_ADC_ON=%x", |
| 2325 | FIELD2VALUE(MAX77779_CHGIN_I_ADC_ON, val)); |
| 2326 | i += scnprintf(&buff[i], len - i, " WCIN_I_ADC_ON=%x", |
| 2327 | FIELD2VALUE(MAX77779_WCIN_I_ADC_ON, val)); |
| 2328 | i += scnprintf(&buff[i], len - i, " THM3_TEMP_ON=%x", |
| 2329 | FIELD2VALUE(MAX77779_THM3_TEMP_ON, val)); |
| 2330 | i += scnprintf(&buff[i], len - i, " THM2_TEMP_ON=%x", |
| 2331 | FIELD2VALUE(MAX77779_THM2_TEMP_ON, val)); |
| 2332 | i += scnprintf(&buff[i], len - i, " THM1_TEMP_ON=%x", |
| 2333 | FIELD2VALUE(MAX77779_THM1_TEMP_ON, val)); |
| 2334 | i += scnprintf(&buff[i], len - i, " BATT_ID2_ADC_OK=%x", |
| 2335 | FIELD2VALUE(MAX77779_BATT_ID2_ADC_OK, val)); |
| 2336 | i += scnprintf(&buff[i], len - i, " BATT_ID1_ADC_OK=%x", |
| 2337 | FIELD2VALUE(MAX77779_BATT_ID1_ADC_OK, val)); |
| 2338 | i += scnprintf(&buff[i], len - i, " SPR_7=%x", |
| 2339 | FIELD2VALUE(MAX77779_SPR_7, val)); |
| 2340 | #else |
| 2341 | buff[0] = 0; |
| 2342 | #endif |
| 2343 | return buff; |
| 2344 | } |
| 2345 | |
| 2346 | MAX77779_BFF(max77779_chgjeita_flags_chgin_i_adc_on,0,0) |
| 2347 | MAX77779_BFF(max77779_chgjeita_flags_wcin_i_adc_on,1,1) |
| 2348 | MAX77779_BFF(max77779_chgjeita_flags_thm3_temp_on,2,2) |
| 2349 | MAX77779_BFF(max77779_chgjeita_flags_thm2_temp_on,3,3) |
| 2350 | MAX77779_BFF(max77779_chgjeita_flags_thm1_temp_on,4,4) |
| 2351 | MAX77779_BFF(max77779_chgjeita_flags_batt_id2_adc_ok,5,5) |
| 2352 | MAX77779_BFF(max77779_chgjeita_flags_batt_id1_adc_ok,6,6) |
| 2353 | MAX77779_BFF(max77779_chgjeita_flags_spr_7,7,7) |
| 2354 | |
| 2355 | /* |
| 2356 | * COP_CTRL,0x20,0b00000000,0x0,Reset_Type:S |
| 2357 | * COP_EN,COP_LIMIT_WD_EN,SPR_7_2[2:6] |
| 2358 | */ |
| 2359 | #define MAX77779_CHGCOP_CTRL 0x20 |
| 2360 | #define MAX77779_CHGCOP_CTRL_COP_EN_SHIFT 0 |
| 2361 | #define MAX77779_CHGCOP_CTRL_COP_EN_MASK (0x1 << 0) |
| 2362 | #define MAX77779_CHGCOP_CTRL_COP_EN_CLEAR (~(0x1 << 0)) |
| 2363 | #define MAX77779_CHGCOP_CTRL_COP_LIMIT_WD_EN_SHIFT 1 |
| 2364 | #define MAX77779_CHGCOP_CTRL_COP_LIMIT_WD_EN_MASK (0x1 << 1) |
| 2365 | #define MAX77779_CHGCOP_CTRL_COP_LIMIT_WD_EN_CLEAR (~(0x1 << 1)) |
| 2366 | #define MAX77779_CHGCOP_CTRL_SPR_7_2_SHIFT 2 |
| 2367 | #define MAX77779_CHGCOP_CTRL_SPR_7_2_MASK (0x3f << 2) |
| 2368 | #define MAX77779_CHGCOP_CTRL_SPR_7_2_CLEAR (~(0x3f << 2)) |
| 2369 | static inline const char * |
| 2370 | max77779_chgcop_ctrl_cstr(char *buff, size_t len, int val) |
| 2371 | { |
| 2372 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2373 | int i = 0; |
| 2374 | |
| 2375 | i += scnprintf(&buff[i], len - i, " COP_EN=%x", |
| 2376 | FIELD2VALUE(MAX77779_COP_EN, val)); |
| 2377 | i += scnprintf(&buff[i], len - i, " COP_LIMIT_WD_EN=%x", |
| 2378 | FIELD2VALUE(MAX77779_COP_LIMIT_WD_EN, val)); |
| 2379 | i += scnprintf(&buff[i], len - i, " SPR_7_2=%x", |
| 2380 | FIELD2VALUE(MAX77779_SPR_7_2, val)); |
| 2381 | #else |
| 2382 | buff[0] = 0; |
| 2383 | #endif |
| 2384 | return buff; |
| 2385 | } |
| 2386 | |
| 2387 | MAX77779_BFF(max77779_chgcop_ctrl_cop_en,0,0) |
| 2388 | MAX77779_BFF(max77779_chgcop_ctrl_cop_limit_wd_en,1,1) |
| 2389 | MAX77779_BFF(max77779_chgcop_ctrl_spr_7_2,7,2) |
| 2390 | |
| 2391 | /* |
| 2392 | * COP_DEBOUNCE,0x21,0b00000000,0x0,Reset_Type:S |
| 2393 | * COP_DB_TIME[0:3],SPR_7_3[3:5] |
| 2394 | */ |
| 2395 | #define MAX77779_CHGCOP_DEBOUNCE 0x21 |
| 2396 | #define MAX77779_CHGCOP_DEBOUNCE_COP_DB_TIME_SHIFT 0 |
| 2397 | #define MAX77779_CHGCOP_DEBOUNCE_COP_DB_TIME_MASK (0x7 << 0) |
| 2398 | #define MAX77779_CHGCOP_DEBOUNCE_COP_DB_TIME_CLEAR (~(0x7 << 0)) |
| 2399 | #define MAX77779_CHGCOP_DEBOUNCE_SPR_7_3_SHIFT 3 |
| 2400 | #define MAX77779_CHGCOP_DEBOUNCE_SPR_7_3_MASK (0x1f << 3) |
| 2401 | #define MAX77779_CHGCOP_DEBOUNCE_SPR_7_3_CLEAR (~(0x1f << 3)) |
| 2402 | static inline const char * |
| 2403 | max77779_chgcop_debounce_cstr(char *buff, size_t len, int val) |
| 2404 | { |
| 2405 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2406 | int i = 0; |
| 2407 | |
| 2408 | i += scnprintf(&buff[i], len - i, " COP_DB_TIME=%x", |
| 2409 | FIELD2VALUE(MAX77779_COP_DB_TIME, val)); |
| 2410 | i += scnprintf(&buff[i], len - i, " SPR_7_3=%x", |
| 2411 | FIELD2VALUE(MAX77779_SPR_7_3, val)); |
| 2412 | #else |
| 2413 | buff[0] = 0; |
| 2414 | #endif |
| 2415 | return buff; |
| 2416 | } |
| 2417 | |
| 2418 | MAX77779_BFF(max77779_chgcop_debounce_cop_db_time,2,0) |
| 2419 | MAX77779_BFF(max77779_chgcop_debounce_spr_7_3,7,3) |
| 2420 | |
| 2421 | /* |
| 2422 | * COP_WARN_L,0x22,0b00000000,0x0,Reset_Type:S |
| 2423 | */ |
| 2424 | #define MAX77779_CHGCOP_WARN_L 0x22 |
| 2425 | |
| 2426 | /* |
| 2427 | * COP_WARN_H,0x23,0b00000000,0x0,Reset_Type:S |
| 2428 | */ |
| 2429 | #define MAX77779_CHGCOP_WARN_H 0x23 |
| 2430 | |
| 2431 | /* |
| 2432 | * COP_LIMIT_L,0x24,0b00000000,0x0,Reset_Type:S |
| 2433 | */ |
| 2434 | #define MAX77779_CHGCOP_LIMIT_L 0x24 |
| 2435 | |
| 2436 | /* |
| 2437 | * COP_LIMIT_H,0x25,0b00000000,0x0,Reset_Type:S |
| 2438 | */ |
| 2439 | #define MAX77779_CHGCOP_LIMIT_H 0x25 |
| 2440 | /* |
| 2441 | * Section: CHARGER_FUNC 0xB0 8 |
| 2442 | */ |
| 2443 | |
| 2444 | |
| 2445 | /* |
| 2446 | * CHG_INT,0x00,0b00000000,0x0,Reset_Type:S |
| 2447 | * BYP_I,THM2_I,INLIM_I,BAT_I,CHG_I,WCIN_I,CHGIN_I,AICL_I |
| 2448 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2449 | #define MAX77779_CHG_INT 0xb0 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2450 | #define MAX77779_CHG_INT_BYP_I_SHIFT 0 |
| 2451 | #define MAX77779_CHG_INT_BYP_I_MASK (0x1 << 0) |
| 2452 | #define MAX77779_CHG_INT_BYP_I_CLEAR (~(0x1 << 0)) |
| 2453 | #define MAX77779_CHG_INT_THM2_I_SHIFT 1 |
| 2454 | #define MAX77779_CHG_INT_THM2_I_MASK (0x1 << 1) |
| 2455 | #define MAX77779_CHG_INT_THM2_I_CLEAR (~(0x1 << 1)) |
| 2456 | #define MAX77779_CHG_INT_INLIM_I_SHIFT 2 |
| 2457 | #define MAX77779_CHG_INT_INLIM_I_MASK (0x1 << 2) |
| 2458 | #define MAX77779_CHG_INT_INLIM_I_CLEAR (~(0x1 << 2)) |
| 2459 | #define MAX77779_CHG_INT_BAT_I_SHIFT 3 |
| 2460 | #define MAX77779_CHG_INT_BAT_I_MASK (0x1 << 3) |
| 2461 | #define MAX77779_CHG_INT_BAT_I_CLEAR (~(0x1 << 3)) |
| 2462 | #define MAX77779_CHG_INT_CHG_I_SHIFT 4 |
| 2463 | #define MAX77779_CHG_INT_CHG_I_MASK (0x1 << 4) |
| 2464 | #define MAX77779_CHG_INT_CHG_I_CLEAR (~(0x1 << 4)) |
| 2465 | #define MAX77779_CHG_INT_WCIN_I_SHIFT 5 |
| 2466 | #define MAX77779_CHG_INT_WCIN_I_MASK (0x1 << 5) |
| 2467 | #define MAX77779_CHG_INT_WCIN_I_CLEAR (~(0x1 << 5)) |
| 2468 | #define MAX77779_CHG_INT_CHGIN_I_SHIFT 6 |
| 2469 | #define MAX77779_CHG_INT_CHGIN_I_MASK (0x1 << 6) |
| 2470 | #define MAX77779_CHG_INT_CHGIN_I_CLEAR (~(0x1 << 6)) |
| 2471 | #define MAX77779_CHG_INT_AICL_I_SHIFT 7 |
| 2472 | #define MAX77779_CHG_INT_AICL_I_MASK (0x1 << 7) |
| 2473 | #define MAX77779_CHG_INT_AICL_I_CLEAR (~(0x1 << 7)) |
| 2474 | static inline const char * |
| 2475 | max77779_chg_int_cstr(char *buff, size_t len, int val) |
| 2476 | { |
| 2477 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2478 | int i = 0; |
| 2479 | |
| 2480 | i += scnprintf(&buff[i], len - i, " BYP_I=%x", |
| 2481 | FIELD2VALUE(MAX77779_BYP_I, val)); |
| 2482 | i += scnprintf(&buff[i], len - i, " THM2_I=%x", |
| 2483 | FIELD2VALUE(MAX77779_THM2_I, val)); |
| 2484 | i += scnprintf(&buff[i], len - i, " INLIM_I=%x", |
| 2485 | FIELD2VALUE(MAX77779_INLIM_I, val)); |
| 2486 | i += scnprintf(&buff[i], len - i, " BAT_I=%x", |
| 2487 | FIELD2VALUE(MAX77779_BAT_I, val)); |
| 2488 | i += scnprintf(&buff[i], len - i, " CHG_I=%x", |
| 2489 | FIELD2VALUE(MAX77779_CHG_I, val)); |
| 2490 | i += scnprintf(&buff[i], len - i, " WCIN_I=%x", |
| 2491 | FIELD2VALUE(MAX77779_WCIN_I, val)); |
| 2492 | i += scnprintf(&buff[i], len - i, " CHGIN_I=%x", |
| 2493 | FIELD2VALUE(MAX77779_CHGIN_I, val)); |
| 2494 | i += scnprintf(&buff[i], len - i, " AICL_I=%x", |
| 2495 | FIELD2VALUE(MAX77779_AICL_I, val)); |
| 2496 | #else |
| 2497 | buff[0] = 0; |
| 2498 | #endif |
| 2499 | return buff; |
| 2500 | } |
| 2501 | |
| 2502 | MAX77779_BFF(max77779_chg_int_byp_i,0,0) |
| 2503 | MAX77779_BFF(max77779_chg_int_thm2_i,1,1) |
| 2504 | MAX77779_BFF(max77779_chg_int_inlim_i,2,2) |
| 2505 | MAX77779_BFF(max77779_chg_int_bat_i,3,3) |
| 2506 | MAX77779_BFF(max77779_chg_int_chg_i,4,4) |
| 2507 | MAX77779_BFF(max77779_chg_int_wcin_i,5,5) |
| 2508 | MAX77779_BFF(max77779_chg_int_chgin_i,6,6) |
| 2509 | MAX77779_BFF(max77779_chg_int_aicl_i,7,7) |
| 2510 | |
| 2511 | /* |
| 2512 | * CHG_INT2,0x01,0b00000000,0x0,Reset_Type:S |
| 2513 | * CHG_STA_DONE_I,CHG_STA_TO_I,CHG_STA_CV_I,CHG_STA_CC_I,COP_WARN_I,COP_ALERT_I, |
| 2514 | * COP_LIMIT_WD_I,INSEL_I |
| 2515 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2516 | #define MAX77779_CHG_INT2 0xb1 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2517 | #define MAX77779_CHG_INT2_CHG_STA_DONE_I_SHIFT 0 |
| 2518 | #define MAX77779_CHG_INT2_CHG_STA_DONE_I_MASK (0x1 << 0) |
| 2519 | #define MAX77779_CHG_INT2_CHG_STA_DONE_I_CLEAR (~(0x1 << 0)) |
| 2520 | #define MAX77779_CHG_INT2_CHG_STA_TO_I_SHIFT 1 |
| 2521 | #define MAX77779_CHG_INT2_CHG_STA_TO_I_MASK (0x1 << 1) |
| 2522 | #define MAX77779_CHG_INT2_CHG_STA_TO_I_CLEAR (~(0x1 << 1)) |
| 2523 | #define MAX77779_CHG_INT2_CHG_STA_CV_I_SHIFT 2 |
| 2524 | #define MAX77779_CHG_INT2_CHG_STA_CV_I_MASK (0x1 << 2) |
| 2525 | #define MAX77779_CHG_INT2_CHG_STA_CV_I_CLEAR (~(0x1 << 2)) |
| 2526 | #define MAX77779_CHG_INT2_CHG_STA_CC_I_SHIFT 3 |
| 2527 | #define MAX77779_CHG_INT2_CHG_STA_CC_I_MASK (0x1 << 3) |
| 2528 | #define MAX77779_CHG_INT2_CHG_STA_CC_I_CLEAR (~(0x1 << 3)) |
| 2529 | #define MAX77779_CHG_INT2_COP_WARN_I_SHIFT 4 |
| 2530 | #define MAX77779_CHG_INT2_COP_WARN_I_MASK (0x1 << 4) |
| 2531 | #define MAX77779_CHG_INT2_COP_WARN_I_CLEAR (~(0x1 << 4)) |
| 2532 | #define MAX77779_CHG_INT2_COP_ALERT_I_SHIFT 5 |
| 2533 | #define MAX77779_CHG_INT2_COP_ALERT_I_MASK (0x1 << 5) |
| 2534 | #define MAX77779_CHG_INT2_COP_ALERT_I_CLEAR (~(0x1 << 5)) |
| 2535 | #define MAX77779_CHG_INT2_COP_LIMIT_WD_I_SHIFT 6 |
| 2536 | #define MAX77779_CHG_INT2_COP_LIMIT_WD_I_MASK (0x1 << 6) |
| 2537 | #define MAX77779_CHG_INT2_COP_LIMIT_WD_I_CLEAR (~(0x1 << 6)) |
| 2538 | #define MAX77779_CHG_INT2_INSEL_I_SHIFT 7 |
| 2539 | #define MAX77779_CHG_INT2_INSEL_I_MASK (0x1 << 7) |
| 2540 | #define MAX77779_CHG_INT2_INSEL_I_CLEAR (~(0x1 << 7)) |
| 2541 | static inline const char * |
| 2542 | max77779_chg_int2_cstr(char *buff, size_t len, int val) |
| 2543 | { |
| 2544 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2545 | int i = 0; |
| 2546 | |
| 2547 | i += scnprintf(&buff[i], len - i, " CHG_STA_DONE_I=%x", |
| 2548 | FIELD2VALUE(MAX77779_CHG_STA_DONE_I, val)); |
| 2549 | i += scnprintf(&buff[i], len - i, " CHG_STA_TO_I=%x", |
| 2550 | FIELD2VALUE(MAX77779_CHG_STA_TO_I, val)); |
| 2551 | i += scnprintf(&buff[i], len - i, " CHG_STA_CV_I=%x", |
| 2552 | FIELD2VALUE(MAX77779_CHG_STA_CV_I, val)); |
| 2553 | i += scnprintf(&buff[i], len - i, " CHG_STA_CC_I=%x", |
| 2554 | FIELD2VALUE(MAX77779_CHG_STA_CC_I, val)); |
| 2555 | i += scnprintf(&buff[i], len - i, " COP_WARN_I=%x", |
| 2556 | FIELD2VALUE(MAX77779_COP_WARN_I, val)); |
| 2557 | i += scnprintf(&buff[i], len - i, " COP_ALERT_I=%x", |
| 2558 | FIELD2VALUE(MAX77779_COP_ALERT_I, val)); |
| 2559 | i += scnprintf(&buff[i], len - i, " COP_LIMIT_WD_I=%x", |
| 2560 | FIELD2VALUE(MAX77779_COP_LIMIT_WD_I, val)); |
| 2561 | i += scnprintf(&buff[i], len - i, " INSEL_I=%x", |
| 2562 | FIELD2VALUE(MAX77779_INSEL_I, val)); |
| 2563 | #else |
| 2564 | buff[0] = 0; |
| 2565 | #endif |
| 2566 | return buff; |
| 2567 | } |
| 2568 | |
| 2569 | MAX77779_BFF(max77779_chg_int2_chg_sta_done_i,0,0) |
| 2570 | MAX77779_BFF(max77779_chg_int2_chg_sta_to_i,1,1) |
| 2571 | MAX77779_BFF(max77779_chg_int2_chg_sta_cv_i,2,2) |
| 2572 | MAX77779_BFF(max77779_chg_int2_chg_sta_cc_i,3,3) |
| 2573 | MAX77779_BFF(max77779_chg_int2_cop_warn_i,4,4) |
| 2574 | MAX77779_BFF(max77779_chg_int2_cop_alert_i,5,5) |
| 2575 | MAX77779_BFF(max77779_chg_int2_cop_limit_wd_i,6,6) |
| 2576 | MAX77779_BFF(max77779_chg_int2_insel_i,7,7) |
| 2577 | |
| 2578 | /* |
| 2579 | * CHG_INT_MASK,0x03,0b11111111,0xff,OTP:SHADOW, Reset_Type:O |
| 2580 | * BYP_M,THM2_M,INLIM_M,BAT_M,CHG_M,WCIN_M,CHGIN_M,AICL_M |
| 2581 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2582 | #define MAX77779_CHG_INT_MASK 0xb3 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2583 | #define MAX77779_CHG_INT_MASK_BYP_M_SHIFT 0 |
| 2584 | #define MAX77779_CHG_INT_MASK_BYP_M_MASK (0x1 << 0) |
| 2585 | #define MAX77779_CHG_INT_MASK_BYP_M_CLEAR (~(0x1 << 0)) |
| 2586 | #define MAX77779_CHG_INT_MASK_THM2_M_SHIFT 1 |
| 2587 | #define MAX77779_CHG_INT_MASK_THM2_M_MASK (0x1 << 1) |
| 2588 | #define MAX77779_CHG_INT_MASK_THM2_M_CLEAR (~(0x1 << 1)) |
| 2589 | #define MAX77779_CHG_INT_MASK_INLIM_M_SHIFT 2 |
| 2590 | #define MAX77779_CHG_INT_MASK_INLIM_M_MASK (0x1 << 2) |
| 2591 | #define MAX77779_CHG_INT_MASK_INLIM_M_CLEAR (~(0x1 << 2)) |
| 2592 | #define MAX77779_CHG_INT_MASK_BAT_M_SHIFT 3 |
| 2593 | #define MAX77779_CHG_INT_MASK_BAT_M_MASK (0x1 << 3) |
| 2594 | #define MAX77779_CHG_INT_MASK_BAT_M_CLEAR (~(0x1 << 3)) |
| 2595 | #define MAX77779_CHG_INT_MASK_CHG_M_SHIFT 4 |
| 2596 | #define MAX77779_CHG_INT_MASK_CHG_M_MASK (0x1 << 4) |
| 2597 | #define MAX77779_CHG_INT_MASK_CHG_M_CLEAR (~(0x1 << 4)) |
| 2598 | #define MAX77779_CHG_INT_MASK_WCIN_M_SHIFT 5 |
| 2599 | #define MAX77779_CHG_INT_MASK_WCIN_M_MASK (0x1 << 5) |
| 2600 | #define MAX77779_CHG_INT_MASK_WCIN_M_CLEAR (~(0x1 << 5)) |
| 2601 | #define MAX77779_CHG_INT_MASK_CHGIN_M_SHIFT 6 |
| 2602 | #define MAX77779_CHG_INT_MASK_CHGIN_M_MASK (0x1 << 6) |
| 2603 | #define MAX77779_CHG_INT_MASK_CHGIN_M_CLEAR (~(0x1 << 6)) |
| 2604 | #define MAX77779_CHG_INT_MASK_AICL_M_SHIFT 7 |
| 2605 | #define MAX77779_CHG_INT_MASK_AICL_M_MASK (0x1 << 7) |
| 2606 | #define MAX77779_CHG_INT_MASK_AICL_M_CLEAR (~(0x1 << 7)) |
| 2607 | static inline const char * |
| 2608 | max77779_chg_int_mask_cstr(char *buff, size_t len, int val) |
| 2609 | { |
| 2610 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2611 | int i = 0; |
| 2612 | |
| 2613 | i += scnprintf(&buff[i], len - i, " BYP_M=%x", |
| 2614 | FIELD2VALUE(MAX77779_BYP_M, val)); |
| 2615 | i += scnprintf(&buff[i], len - i, " THM2_M=%x", |
| 2616 | FIELD2VALUE(MAX77779_THM2_M, val)); |
| 2617 | i += scnprintf(&buff[i], len - i, " INLIM_M=%x", |
| 2618 | FIELD2VALUE(MAX77779_INLIM_M, val)); |
| 2619 | i += scnprintf(&buff[i], len - i, " BAT_M=%x", |
| 2620 | FIELD2VALUE(MAX77779_BAT_M, val)); |
| 2621 | i += scnprintf(&buff[i], len - i, " CHG_M=%x", |
| 2622 | FIELD2VALUE(MAX77779_CHG_M, val)); |
| 2623 | i += scnprintf(&buff[i], len - i, " WCIN_M=%x", |
| 2624 | FIELD2VALUE(MAX77779_WCIN_M, val)); |
| 2625 | i += scnprintf(&buff[i], len - i, " CHGIN_M=%x", |
| 2626 | FIELD2VALUE(MAX77779_CHGIN_M, val)); |
| 2627 | i += scnprintf(&buff[i], len - i, " AICL_M=%x", |
| 2628 | FIELD2VALUE(MAX77779_AICL_M, val)); |
| 2629 | #else |
| 2630 | buff[0] = 0; |
| 2631 | #endif |
| 2632 | return buff; |
| 2633 | } |
| 2634 | |
| 2635 | MAX77779_BFF(max77779_chg_int_mask_byp_m,0,0) |
| 2636 | MAX77779_BFF(max77779_chg_int_mask_thm2_m,1,1) |
| 2637 | MAX77779_BFF(max77779_chg_int_mask_inlim_m,2,2) |
| 2638 | MAX77779_BFF(max77779_chg_int_mask_bat_m,3,3) |
| 2639 | MAX77779_BFF(max77779_chg_int_mask_chg_m,4,4) |
| 2640 | MAX77779_BFF(max77779_chg_int_mask_wcin_m,5,5) |
| 2641 | MAX77779_BFF(max77779_chg_int_mask_chgin_m,6,6) |
| 2642 | MAX77779_BFF(max77779_chg_int_mask_aicl_m,7,7) |
| 2643 | |
| 2644 | /* |
| 2645 | * CHG_INT2_MASK,0x04,0b11111111,0xff,OTP:SHADOW, Reset_Type:O |
| 2646 | * CHG_STA_DONE_M,CHG_STA_TO_M,CHG_STA_CV_M,CHG_STA_CC_M,COP_WARN_M,COP_ALERT_M, |
| 2647 | * COP_LIMIT_WD_M,INSEL_M |
| 2648 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2649 | #define MAX77779_CHG_INT2_MASK 0xb4 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2650 | #define MAX77779_CHG_INT2_MASK_CHG_STA_DONE_M_SHIFT 0 |
| 2651 | #define MAX77779_CHG_INT2_MASK_CHG_STA_DONE_M_MASK (0x1 << 0) |
| 2652 | #define MAX77779_CHG_INT2_MASK_CHG_STA_DONE_M_CLEAR (~(0x1 << 0)) |
| 2653 | #define MAX77779_CHG_INT2_MASK_CHG_STA_TO_M_SHIFT 1 |
| 2654 | #define MAX77779_CHG_INT2_MASK_CHG_STA_TO_M_MASK (0x1 << 1) |
| 2655 | #define MAX77779_CHG_INT2_MASK_CHG_STA_TO_M_CLEAR (~(0x1 << 1)) |
| 2656 | #define MAX77779_CHG_INT2_MASK_CHG_STA_CV_M_SHIFT 2 |
| 2657 | #define MAX77779_CHG_INT2_MASK_CHG_STA_CV_M_MASK (0x1 << 2) |
| 2658 | #define MAX77779_CHG_INT2_MASK_CHG_STA_CV_M_CLEAR (~(0x1 << 2)) |
| 2659 | #define MAX77779_CHG_INT2_MASK_CHG_STA_CC_M_SHIFT 3 |
| 2660 | #define MAX77779_CHG_INT2_MASK_CHG_STA_CC_M_MASK (0x1 << 3) |
| 2661 | #define MAX77779_CHG_INT2_MASK_CHG_STA_CC_M_CLEAR (~(0x1 << 3)) |
| 2662 | #define MAX77779_CHG_INT2_MASK_COP_WARN_M_SHIFT 4 |
| 2663 | #define MAX77779_CHG_INT2_MASK_COP_WARN_M_MASK (0x1 << 4) |
| 2664 | #define MAX77779_CHG_INT2_MASK_COP_WARN_M_CLEAR (~(0x1 << 4)) |
| 2665 | #define MAX77779_CHG_INT2_MASK_COP_ALERT_M_SHIFT 5 |
| 2666 | #define MAX77779_CHG_INT2_MASK_COP_ALERT_M_MASK (0x1 << 5) |
| 2667 | #define MAX77779_CHG_INT2_MASK_COP_ALERT_M_CLEAR (~(0x1 << 5)) |
| 2668 | #define MAX77779_CHG_INT2_MASK_COP_LIMIT_WD_M_SHIFT 6 |
| 2669 | #define MAX77779_CHG_INT2_MASK_COP_LIMIT_WD_M_MASK (0x1 << 6) |
| 2670 | #define MAX77779_CHG_INT2_MASK_COP_LIMIT_WD_M_CLEAR (~(0x1 << 6)) |
| 2671 | #define MAX77779_CHG_INT2_MASK_INSEL_M_SHIFT 7 |
| 2672 | #define MAX77779_CHG_INT2_MASK_INSEL_M_MASK (0x1 << 7) |
| 2673 | #define MAX77779_CHG_INT2_MASK_INSEL_M_CLEAR (~(0x1 << 7)) |
| 2674 | static inline const char * |
| 2675 | max77779_chg_int2_mask_cstr(char *buff, size_t len, int val) |
| 2676 | { |
| 2677 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2678 | int i = 0; |
| 2679 | |
| 2680 | i += scnprintf(&buff[i], len - i, " CHG_STA_DONE_M=%x", |
| 2681 | FIELD2VALUE(MAX77779_CHG_STA_DONE_M, val)); |
| 2682 | i += scnprintf(&buff[i], len - i, " CHG_STA_TO_M=%x", |
| 2683 | FIELD2VALUE(MAX77779_CHG_STA_TO_M, val)); |
| 2684 | i += scnprintf(&buff[i], len - i, " CHG_STA_CV_M=%x", |
| 2685 | FIELD2VALUE(MAX77779_CHG_STA_CV_M, val)); |
| 2686 | i += scnprintf(&buff[i], len - i, " CHG_STA_CC_M=%x", |
| 2687 | FIELD2VALUE(MAX77779_CHG_STA_CC_M, val)); |
| 2688 | i += scnprintf(&buff[i], len - i, " COP_WARN_M=%x", |
| 2689 | FIELD2VALUE(MAX77779_COP_WARN_M, val)); |
| 2690 | i += scnprintf(&buff[i], len - i, " COP_ALERT_M=%x", |
| 2691 | FIELD2VALUE(MAX77779_COP_ALERT_M, val)); |
| 2692 | i += scnprintf(&buff[i], len - i, " COP_LIMIT_WD_M=%x", |
| 2693 | FIELD2VALUE(MAX77779_COP_LIMIT_WD_M, val)); |
| 2694 | i += scnprintf(&buff[i], len - i, " INSEL_M=%x", |
| 2695 | FIELD2VALUE(MAX77779_INSEL_M, val)); |
| 2696 | #else |
| 2697 | buff[0] = 0; |
| 2698 | #endif |
| 2699 | return buff; |
| 2700 | } |
| 2701 | |
| 2702 | MAX77779_BFF(max77779_chg_int2_mask_chg_sta_done_m,0,0) |
| 2703 | MAX77779_BFF(max77779_chg_int2_mask_chg_sta_to_m,1,1) |
| 2704 | MAX77779_BFF(max77779_chg_int2_mask_chg_sta_cv_m,2,2) |
| 2705 | MAX77779_BFF(max77779_chg_int2_mask_chg_sta_cc_m,3,3) |
| 2706 | MAX77779_BFF(max77779_chg_int2_mask_cop_warn_m,4,4) |
| 2707 | MAX77779_BFF(max77779_chg_int2_mask_cop_alert_m,5,5) |
| 2708 | MAX77779_BFF(max77779_chg_int2_mask_cop_limit_wd_m,6,6) |
| 2709 | MAX77779_BFF(max77779_chg_int2_mask_insel_m,7,7) |
| 2710 | |
| 2711 | /* |
| 2712 | * CHG_INT_OK,0x06,0b10011111,0x9f,Reset_Type:S |
| 2713 | * BYP_OK,THM2_OK,INLIM_OK,BAT_OK,CHG_OK,WCIN_OK,CHGIN_OK,AICL_OK |
| 2714 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2715 | #define MAX77779_CHG_INT_OK 0xb6 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2716 | #define MAX77779_CHG_INT_OK_BYP_OK_SHIFT 0 |
| 2717 | #define MAX77779_CHG_INT_OK_BYP_OK_MASK (0x1 << 0) |
| 2718 | #define MAX77779_CHG_INT_OK_BYP_OK_CLEAR (~(0x1 << 0)) |
| 2719 | #define MAX77779_CHG_INT_OK_THM2_OK_SHIFT 1 |
| 2720 | #define MAX77779_CHG_INT_OK_THM2_OK_MASK (0x1 << 1) |
| 2721 | #define MAX77779_CHG_INT_OK_THM2_OK_CLEAR (~(0x1 << 1)) |
| 2722 | #define MAX77779_CHG_INT_OK_INLIM_OK_SHIFT 2 |
| 2723 | #define MAX77779_CHG_INT_OK_INLIM_OK_MASK (0x1 << 2) |
| 2724 | #define MAX77779_CHG_INT_OK_INLIM_OK_CLEAR (~(0x1 << 2)) |
| 2725 | #define MAX77779_CHG_INT_OK_BAT_OK_SHIFT 3 |
| 2726 | #define MAX77779_CHG_INT_OK_BAT_OK_MASK (0x1 << 3) |
| 2727 | #define MAX77779_CHG_INT_OK_BAT_OK_CLEAR (~(0x1 << 3)) |
| 2728 | #define MAX77779_CHG_INT_OK_CHG_OK_SHIFT 4 |
| 2729 | #define MAX77779_CHG_INT_OK_CHG_OK_MASK (0x1 << 4) |
| 2730 | #define MAX77779_CHG_INT_OK_CHG_OK_CLEAR (~(0x1 << 4)) |
| 2731 | #define MAX77779_CHG_INT_OK_WCIN_OK_SHIFT 5 |
| 2732 | #define MAX77779_CHG_INT_OK_WCIN_OK_MASK (0x1 << 5) |
| 2733 | #define MAX77779_CHG_INT_OK_WCIN_OK_CLEAR (~(0x1 << 5)) |
| 2734 | #define MAX77779_CHG_INT_OK_CHGIN_OK_SHIFT 6 |
| 2735 | #define MAX77779_CHG_INT_OK_CHGIN_OK_MASK (0x1 << 6) |
| 2736 | #define MAX77779_CHG_INT_OK_CHGIN_OK_CLEAR (~(0x1 << 6)) |
| 2737 | #define MAX77779_CHG_INT_OK_AICL_OK_SHIFT 7 |
| 2738 | #define MAX77779_CHG_INT_OK_AICL_OK_MASK (0x1 << 7) |
| 2739 | #define MAX77779_CHG_INT_OK_AICL_OK_CLEAR (~(0x1 << 7)) |
| 2740 | static inline const char * |
| 2741 | max77779_chg_int_ok_cstr(char *buff, size_t len, int val) |
| 2742 | { |
| 2743 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2744 | int i = 0; |
| 2745 | |
| 2746 | i += scnprintf(&buff[i], len - i, " BYP_OK=%x", |
| 2747 | FIELD2VALUE(MAX77779_BYP_OK, val)); |
| 2748 | i += scnprintf(&buff[i], len - i, " THM2_OK=%x", |
| 2749 | FIELD2VALUE(MAX77779_THM2_OK, val)); |
| 2750 | i += scnprintf(&buff[i], len - i, " INLIM_OK=%x", |
| 2751 | FIELD2VALUE(MAX77779_INLIM_OK, val)); |
| 2752 | i += scnprintf(&buff[i], len - i, " BAT_OK=%x", |
| 2753 | FIELD2VALUE(MAX77779_BAT_OK, val)); |
| 2754 | i += scnprintf(&buff[i], len - i, " CHG_OK=%x", |
| 2755 | FIELD2VALUE(MAX77779_CHG_OK, val)); |
| 2756 | i += scnprintf(&buff[i], len - i, " WCIN_OK=%x", |
| 2757 | FIELD2VALUE(MAX77779_WCIN_OK, val)); |
| 2758 | i += scnprintf(&buff[i], len - i, " CHGIN_OK=%x", |
| 2759 | FIELD2VALUE(MAX77779_CHGIN_OK, val)); |
| 2760 | i += scnprintf(&buff[i], len - i, " AICL_OK=%x", |
| 2761 | FIELD2VALUE(MAX77779_AICL_OK, val)); |
| 2762 | #else |
| 2763 | buff[0] = 0; |
| 2764 | #endif |
| 2765 | return buff; |
| 2766 | } |
| 2767 | |
| 2768 | MAX77779_BFF(max77779_chg_int_ok_byp_ok,0,0) |
| 2769 | MAX77779_BFF(max77779_chg_int_ok_thm2_ok,1,1) |
| 2770 | MAX77779_BFF(max77779_chg_int_ok_inlim_ok,2,2) |
| 2771 | MAX77779_BFF(max77779_chg_int_ok_bat_ok,3,3) |
| 2772 | MAX77779_BFF(max77779_chg_int_ok_chg_ok,4,4) |
| 2773 | MAX77779_BFF(max77779_chg_int_ok_wcin_ok,5,5) |
| 2774 | MAX77779_BFF(max77779_chg_int_ok_chgin_ok,6,6) |
| 2775 | MAX77779_BFF(max77779_chg_int_ok_aicl_ok,7,7) |
| 2776 | |
| 2777 | /* |
| 2778 | * CHG_DETAILS_00,0x07,0b10000000,0x80,Reset_Type:S |
| 2779 | * TREG,SPSN_DTLS[1:2],WCIN_DTLS[3:2],CHGIN_DTLS[5:2],VDROOP1_OK |
| 2780 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2781 | #define MAX77779_CHG_DETAILS_00 0xb7 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2782 | #define MAX77779_CHG_DETAILS_00_TREG_SHIFT 0 |
| 2783 | #define MAX77779_CHG_DETAILS_00_TREG_MASK (0x1 << 0) |
| 2784 | #define MAX77779_CHG_DETAILS_00_TREG_CLEAR (~(0x1 << 0)) |
| 2785 | #define MAX77779_CHG_DETAILS_00_SPSN_DTLS_SHIFT 1 |
| 2786 | #define MAX77779_CHG_DETAILS_00_SPSN_DTLS_MASK (0x3 << 1) |
| 2787 | #define MAX77779_CHG_DETAILS_00_SPSN_DTLS_CLEAR (~(0x3 << 1)) |
| 2788 | #define MAX77779_CHG_DETAILS_00_WCIN_DTLS_SHIFT 3 |
| 2789 | #define MAX77779_CHG_DETAILS_00_WCIN_DTLS_MASK (0x3 << 3) |
| 2790 | #define MAX77779_CHG_DETAILS_00_WCIN_DTLS_CLEAR (~(0x3 << 3)) |
| 2791 | #define MAX77779_CHG_DETAILS_00_CHGIN_DTLS_SHIFT 5 |
| 2792 | #define MAX77779_CHG_DETAILS_00_CHGIN_DTLS_MASK (0x3 << 5) |
| 2793 | #define MAX77779_CHG_DETAILS_00_CHGIN_DTLS_CLEAR (~(0x3 << 5)) |
| 2794 | #define MAX77779_CHG_DETAILS_00_VDROOP1_OK_SHIFT 7 |
| 2795 | #define MAX77779_CHG_DETAILS_00_VDROOP1_OK_MASK (0x1 << 7) |
| 2796 | #define MAX77779_CHG_DETAILS_00_VDROOP1_OK_CLEAR (~(0x1 << 7)) |
| 2797 | static inline const char * |
| 2798 | max77779_chg_details_00_cstr(char *buff, size_t len, int val) |
| 2799 | { |
| 2800 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2801 | int i = 0; |
| 2802 | |
| 2803 | i += scnprintf(&buff[i], len - i, " TREG=%x", |
| 2804 | FIELD2VALUE(MAX77779_TREG, val)); |
| 2805 | i += scnprintf(&buff[i], len - i, " SPSN_DTLS=%x", |
| 2806 | FIELD2VALUE(MAX77779_SPSN_DTLS, val)); |
| 2807 | i += scnprintf(&buff[i], len - i, " WCIN_DTLS=%x", |
| 2808 | FIELD2VALUE(MAX77779_WCIN_DTLS, val)); |
| 2809 | i += scnprintf(&buff[i], len - i, " CHGIN_DTLS=%x", |
| 2810 | FIELD2VALUE(MAX77779_CHGIN_DTLS, val)); |
| 2811 | i += scnprintf(&buff[i], len - i, " VDROOP1_OK=%x", |
| 2812 | FIELD2VALUE(MAX77779_VDROOP1_OK, val)); |
| 2813 | #else |
| 2814 | buff[0] = 0; |
| 2815 | #endif |
| 2816 | return buff; |
| 2817 | } |
| 2818 | |
| 2819 | MAX77779_BFF(max77779_chg_details_00_treg,0,0) |
| 2820 | MAX77779_BFF(max77779_chg_details_00_spsn_dtls,2,1) |
| 2821 | MAX77779_BFF(max77779_chg_details_00_wcin_dtls,4,3) |
| 2822 | MAX77779_BFF(max77779_chg_details_00_chgin_dtls,6,5) |
| 2823 | MAX77779_BFF(max77779_chg_details_00_vdroop1_ok,7,7) |
| 2824 | |
| 2825 | /* |
| 2826 | * CHG_DETAILS_01,0x08,0b11111000,0xf8,Reset_Type:S |
| 2827 | * CHG_DTLS[0:4],BAT_DTLS[4:3],VDROOP2_OK |
| 2828 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2829 | #define MAX77779_CHG_DETAILS_01 0xb8 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2830 | #define MAX77779_CHG_DETAILS_01_CHG_DTLS_SHIFT 0 |
| 2831 | #define MAX77779_CHG_DETAILS_01_CHG_DTLS_MASK (0xf << 0) |
| 2832 | #define MAX77779_CHG_DETAILS_01_CHG_DTLS_CLEAR (~(0xf << 0)) |
| 2833 | #define MAX77779_CHG_DETAILS_01_BAT_DTLS_SHIFT 4 |
| 2834 | #define MAX77779_CHG_DETAILS_01_BAT_DTLS_MASK (0x7 << 4) |
| 2835 | #define MAX77779_CHG_DETAILS_01_BAT_DTLS_CLEAR (~(0x7 << 4)) |
| 2836 | #define MAX77779_CHG_DETAILS_01_VDROOP2_OK_SHIFT 7 |
| 2837 | #define MAX77779_CHG_DETAILS_01_VDROOP2_OK_MASK (0x1 << 7) |
| 2838 | #define MAX77779_CHG_DETAILS_01_VDROOP2_OK_CLEAR (~(0x1 << 7)) |
| 2839 | static inline const char * |
| 2840 | max77779_chg_details_01_cstr(char *buff, size_t len, int val) |
| 2841 | { |
| 2842 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2843 | int i = 0; |
| 2844 | |
| 2845 | i += scnprintf(&buff[i], len - i, " CHG_DTLS=%x", |
| 2846 | FIELD2VALUE(MAX77779_CHG_DTLS, val)); |
| 2847 | i += scnprintf(&buff[i], len - i, " BAT_DTLS=%x", |
| 2848 | FIELD2VALUE(MAX77779_BAT_DTLS, val)); |
| 2849 | i += scnprintf(&buff[i], len - i, " VDROOP2_OK=%x", |
| 2850 | FIELD2VALUE(MAX77779_VDROOP2_OK, val)); |
| 2851 | #else |
| 2852 | buff[0] = 0; |
| 2853 | #endif |
| 2854 | return buff; |
| 2855 | } |
| 2856 | |
| 2857 | MAX77779_BFF(max77779_chg_details_01_chg_dtls,3,0) |
| 2858 | MAX77779_BFF(max77779_chg_details_01_bat_dtls,6,4) |
| 2859 | MAX77779_BFF(max77779_chg_details_01_vdroop2_ok,7,7) |
| 2860 | |
| 2861 | /* |
| 2862 | * CHG_DETAILS_02,0x09,0b00000000,0x0,Reset_Type:S |
| 2863 | * BYP_DTLS[0:4],WCIN_STS,CHGIN_STS,NXT_BCK_INPUT[6:2] |
| 2864 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2865 | #define MAX77779_CHG_DETAILS_02 0xb9 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2866 | #define MAX77779_CHG_DETAILS_02_BYP_DTLS_SHIFT 0 |
| 2867 | #define MAX77779_CHG_DETAILS_02_BYP_DTLS_MASK (0xf << 0) |
| 2868 | #define MAX77779_CHG_DETAILS_02_BYP_DTLS_CLEAR (~(0xf << 0)) |
| 2869 | #define MAX77779_CHG_DETAILS_02_WCIN_STS_SHIFT 4 |
| 2870 | #define MAX77779_CHG_DETAILS_02_WCIN_STS_MASK (0x1 << 4) |
| 2871 | #define MAX77779_CHG_DETAILS_02_WCIN_STS_CLEAR (~(0x1 << 4)) |
| 2872 | #define MAX77779_CHG_DETAILS_02_CHGIN_STS_SHIFT 5 |
| 2873 | #define MAX77779_CHG_DETAILS_02_CHGIN_STS_MASK (0x1 << 5) |
| 2874 | #define MAX77779_CHG_DETAILS_02_CHGIN_STS_CLEAR (~(0x1 << 5)) |
| 2875 | #define MAX77779_CHG_DETAILS_02_NXT_BCK_INPUT_SHIFT 6 |
| 2876 | #define MAX77779_CHG_DETAILS_02_NXT_BCK_INPUT_MASK (0x3 << 6) |
| 2877 | #define MAX77779_CHG_DETAILS_02_NXT_BCK_INPUT_CLEAR (~(0x3 << 6)) |
| 2878 | static inline const char * |
| 2879 | max77779_chg_details_02_cstr(char *buff, size_t len, int val) |
| 2880 | { |
| 2881 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2882 | int i = 0; |
| 2883 | |
| 2884 | i += scnprintf(&buff[i], len - i, " BYP_DTLS=%x", |
| 2885 | FIELD2VALUE(MAX77779_BYP_DTLS, val)); |
| 2886 | i += scnprintf(&buff[i], len - i, " WCIN_STS=%x", |
| 2887 | FIELD2VALUE(MAX77779_WCIN_STS, val)); |
| 2888 | i += scnprintf(&buff[i], len - i, " CHGIN_STS=%x", |
| 2889 | FIELD2VALUE(MAX77779_CHGIN_STS, val)); |
| 2890 | i += scnprintf(&buff[i], len - i, " NXT_BCK_INPUT=%x", |
| 2891 | FIELD2VALUE(MAX77779_NXT_BCK_INPUT, val)); |
| 2892 | #else |
| 2893 | buff[0] = 0; |
| 2894 | #endif |
| 2895 | return buff; |
| 2896 | } |
| 2897 | |
| 2898 | MAX77779_BFF(max77779_chg_details_02_byp_dtls,3,0) |
| 2899 | MAX77779_BFF(max77779_chg_details_02_wcin_sts,4,4) |
| 2900 | MAX77779_BFF(max77779_chg_details_02_chgin_sts,5,5) |
| 2901 | MAX77779_BFF(max77779_chg_details_02_nxt_bck_input,7,6) |
| 2902 | |
| 2903 | /* |
| 2904 | * CHG_DETAILS_03,0x0A,0b00010010,0x12,Reset_Type:S |
| 2905 | * THM1_DTLS[0:3],THM3_DTLS[3:3],JEITA_AUX_DTLS[6:2] |
| 2906 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2907 | #define MAX77779_CHG_DETAILS_03 0xba |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2908 | #define MAX77779_CHG_DETAILS_03_THM1_DTLS_SHIFT 0 |
| 2909 | #define MAX77779_CHG_DETAILS_03_THM1_DTLS_MASK (0x7 << 0) |
| 2910 | #define MAX77779_CHG_DETAILS_03_THM1_DTLS_CLEAR (~(0x7 << 0)) |
| 2911 | #define MAX77779_CHG_DETAILS_03_THM3_DTLS_SHIFT 3 |
| 2912 | #define MAX77779_CHG_DETAILS_03_THM3_DTLS_MASK (0x7 << 3) |
| 2913 | #define MAX77779_CHG_DETAILS_03_THM3_DTLS_CLEAR (~(0x7 << 3)) |
| 2914 | #define MAX77779_CHG_DETAILS_03_JEITA_AUX_DTLS_SHIFT 6 |
| 2915 | #define MAX77779_CHG_DETAILS_03_JEITA_AUX_DTLS_MASK (0x3 << 6) |
| 2916 | #define MAX77779_CHG_DETAILS_03_JEITA_AUX_DTLS_CLEAR (~(0x3 << 6)) |
| 2917 | static inline const char * |
| 2918 | max77779_chg_details_03_cstr(char *buff, size_t len, int val) |
| 2919 | { |
| 2920 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2921 | int i = 0; |
| 2922 | |
| 2923 | i += scnprintf(&buff[i], len - i, " THM1_DTLS=%x", |
| 2924 | FIELD2VALUE(MAX77779_THM1_DTLS, val)); |
| 2925 | i += scnprintf(&buff[i], len - i, " THM3_DTLS=%x", |
| 2926 | FIELD2VALUE(MAX77779_THM3_DTLS, val)); |
| 2927 | i += scnprintf(&buff[i], len - i, " JEITA_AUX_DTLS=%x", |
| 2928 | FIELD2VALUE(MAX77779_JEITA_AUX_DTLS, val)); |
| 2929 | #else |
| 2930 | buff[0] = 0; |
| 2931 | #endif |
| 2932 | return buff; |
| 2933 | } |
| 2934 | |
| 2935 | MAX77779_BFF(max77779_chg_details_03_thm1_dtls,2,0) |
| 2936 | MAX77779_BFF(max77779_chg_details_03_thm3_dtls,5,3) |
| 2937 | MAX77779_BFF(max77779_chg_details_03_jeita_aux_dtls,7,6) |
| 2938 | |
| 2939 | /* |
| 2940 | * CHG_DETAILS_04,0x0B,0b00000000,0x0,Reset_Type:S |
| 2941 | * FSHIP_EXIT_DTLS[0:2],MD_DTLS[2:2],BAT_OILO1_OPEN,BAT_OILO2_OPEN,SPR_7_6[6:2] |
| 2942 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2943 | #define MAX77779_CHG_DETAILS_04 0xbb |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2944 | #define MAX77779_CHG_DETAILS_04_FSHIP_EXIT_DTLS_SHIFT 0 |
| 2945 | #define MAX77779_CHG_DETAILS_04_FSHIP_EXIT_DTLS_MASK (0x3 << 0) |
| 2946 | #define MAX77779_CHG_DETAILS_04_FSHIP_EXIT_DTLS_CLEAR (~(0x3 << 0)) |
| 2947 | #define MAX77779_CHG_DETAILS_04_MD_DTLS_SHIFT 2 |
| 2948 | #define MAX77779_CHG_DETAILS_04_MD_DTLS_MASK (0x3 << 2) |
| 2949 | #define MAX77779_CHG_DETAILS_04_MD_DTLS_CLEAR (~(0x3 << 2)) |
| 2950 | #define MAX77779_CHG_DETAILS_04_BAT_OILO1_OPEN_SHIFT 4 |
| 2951 | #define MAX77779_CHG_DETAILS_04_BAT_OILO1_OPEN_MASK (0x1 << 4) |
| 2952 | #define MAX77779_CHG_DETAILS_04_BAT_OILO1_OPEN_CLEAR (~(0x1 << 4)) |
| 2953 | #define MAX77779_CHG_DETAILS_04_BAT_OILO2_OPEN_SHIFT 5 |
| 2954 | #define MAX77779_CHG_DETAILS_04_BAT_OILO2_OPEN_MASK (0x1 << 5) |
| 2955 | #define MAX77779_CHG_DETAILS_04_BAT_OILO2_OPEN_CLEAR (~(0x1 << 5)) |
| 2956 | #define MAX77779_CHG_DETAILS_04_SPR_7_6_SHIFT 6 |
| 2957 | #define MAX77779_CHG_DETAILS_04_SPR_7_6_MASK (0x3 << 6) |
| 2958 | #define MAX77779_CHG_DETAILS_04_SPR_7_6_CLEAR (~(0x3 << 6)) |
| 2959 | static inline const char * |
| 2960 | max77779_chg_details_04_cstr(char *buff, size_t len, int val) |
| 2961 | { |
| 2962 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 2963 | int i = 0; |
| 2964 | |
| 2965 | i += scnprintf(&buff[i], len - i, " FSHIP_EXIT_DTLS=%x", |
| 2966 | FIELD2VALUE(MAX77779_FSHIP_EXIT_DTLS, val)); |
| 2967 | i += scnprintf(&buff[i], len - i, " MD_DTLS=%x", |
| 2968 | FIELD2VALUE(MAX77779_MD_DTLS, val)); |
| 2969 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_OPEN=%x", |
| 2970 | FIELD2VALUE(MAX77779_BAT_OILO1_OPEN, val)); |
| 2971 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_OPEN=%x", |
| 2972 | FIELD2VALUE(MAX77779_BAT_OILO2_OPEN, val)); |
| 2973 | i += scnprintf(&buff[i], len - i, " SPR_7_6=%x", |
| 2974 | FIELD2VALUE(MAX77779_SPR_7_6, val)); |
| 2975 | #else |
| 2976 | buff[0] = 0; |
| 2977 | #endif |
| 2978 | return buff; |
| 2979 | } |
| 2980 | |
| 2981 | MAX77779_BFF(max77779_chg_details_04_fship_exit_dtls,1,0) |
| 2982 | MAX77779_BFF(max77779_chg_details_04_md_dtls,3,2) |
| 2983 | MAX77779_BFF(max77779_chg_details_04_bat_oilo1_open,4,4) |
| 2984 | MAX77779_BFF(max77779_chg_details_04_bat_oilo2_open,5,5) |
| 2985 | MAX77779_BFF(max77779_chg_details_04_spr_7_6,7,6) |
| 2986 | |
| 2987 | /* |
| 2988 | * CHG_CNFG_00,0x0C,0b00000100,0x4,OTP:SHADOW, Reset_Type:O |
| 2989 | * MODE[0:4],BYPV_RAMP_BYPASS,CP_EN,WDTCLR[6:2] |
| 2990 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 2991 | #define MAX77779_CHG_CNFG_00 0xbc |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 2992 | #define MAX77779_CHG_CNFG_00_MODE_SHIFT 0 |
| 2993 | #define MAX77779_CHG_CNFG_00_MODE_MASK (0xf << 0) |
| 2994 | #define MAX77779_CHG_CNFG_00_MODE_CLEAR (~(0xf << 0)) |
| 2995 | #define MAX77779_CHG_CNFG_00_BYPV_RAMP_BYPASS_SHIFT 4 |
| 2996 | #define MAX77779_CHG_CNFG_00_BYPV_RAMP_BYPASS_MASK (0x1 << 4) |
| 2997 | #define MAX77779_CHG_CNFG_00_BYPV_RAMP_BYPASS_CLEAR (~(0x1 << 4)) |
| 2998 | #define MAX77779_CHG_CNFG_00_CP_EN_SHIFT 5 |
| 2999 | #define MAX77779_CHG_CNFG_00_CP_EN_MASK (0x1 << 5) |
| 3000 | #define MAX77779_CHG_CNFG_00_CP_EN_CLEAR (~(0x1 << 5)) |
| 3001 | #define MAX77779_CHG_CNFG_00_WDTCLR_SHIFT 6 |
| 3002 | #define MAX77779_CHG_CNFG_00_WDTCLR_MASK (0x3 << 6) |
| 3003 | #define MAX77779_CHG_CNFG_00_WDTCLR_CLEAR (~(0x3 << 6)) |
| 3004 | static inline const char * |
| 3005 | max77779_chg_cnfg_00_cstr(char *buff, size_t len, int val) |
| 3006 | { |
| 3007 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3008 | int i = 0; |
| 3009 | |
| 3010 | i += scnprintf(&buff[i], len - i, " MODE=%x", |
| 3011 | FIELD2VALUE(MAX77779_MODE, val)); |
| 3012 | i += scnprintf(&buff[i], len - i, " BYPV_RAMP_BYPASS=%x", |
| 3013 | FIELD2VALUE(MAX77779_BYPV_RAMP_BYPASS, val)); |
| 3014 | i += scnprintf(&buff[i], len - i, " CP_EN=%x", |
| 3015 | FIELD2VALUE(MAX77779_CP_EN, val)); |
| 3016 | i += scnprintf(&buff[i], len - i, " WDTCLR=%x", |
| 3017 | FIELD2VALUE(MAX77779_WDTCLR, val)); |
| 3018 | #else |
| 3019 | buff[0] = 0; |
| 3020 | #endif |
| 3021 | return buff; |
| 3022 | } |
| 3023 | |
| 3024 | MAX77779_BFF(max77779_chg_cnfg_00_mode,3,0) |
| 3025 | MAX77779_BFF(max77779_chg_cnfg_00_bypv_ramp_bypass,4,4) |
| 3026 | MAX77779_BFF(max77779_chg_cnfg_00_cp_en,5,5) |
| 3027 | MAX77779_BFF(max77779_chg_cnfg_00_wdtclr,7,6) |
| 3028 | |
| 3029 | /* |
| 3030 | * CHG_CNFG_01,0x0D,0b10011001,0x99,OTP:SHADOW, Reset_Type:O |
| 3031 | * FCHGTIME[0:3],RECYCLE_EN,CHG_RSTRT[4:2],LSEL,PQEN |
| 3032 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3033 | #define MAX77779_CHG_CNFG_01 0xbd |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3034 | #define MAX77779_CHG_CNFG_01_FCHGTIME_SHIFT 0 |
| 3035 | #define MAX77779_CHG_CNFG_01_FCHGTIME_MASK (0x7 << 0) |
| 3036 | #define MAX77779_CHG_CNFG_01_FCHGTIME_CLEAR (~(0x7 << 0)) |
| 3037 | #define MAX77779_CHG_CNFG_01_RECYCLE_EN_SHIFT 3 |
| 3038 | #define MAX77779_CHG_CNFG_01_RECYCLE_EN_MASK (0x1 << 3) |
| 3039 | #define MAX77779_CHG_CNFG_01_RECYCLE_EN_CLEAR (~(0x1 << 3)) |
| 3040 | #define MAX77779_CHG_CNFG_01_CHG_RSTRT_SHIFT 4 |
| 3041 | #define MAX77779_CHG_CNFG_01_CHG_RSTRT_MASK (0x3 << 4) |
| 3042 | #define MAX77779_CHG_CNFG_01_CHG_RSTRT_CLEAR (~(0x3 << 4)) |
| 3043 | #define MAX77779_CHG_CNFG_01_LSEL_SHIFT 6 |
| 3044 | #define MAX77779_CHG_CNFG_01_LSEL_MASK (0x1 << 6) |
| 3045 | #define MAX77779_CHG_CNFG_01_LSEL_CLEAR (~(0x1 << 6)) |
| 3046 | #define MAX77779_CHG_CNFG_01_PQEN_SHIFT 7 |
| 3047 | #define MAX77779_CHG_CNFG_01_PQEN_MASK (0x1 << 7) |
| 3048 | #define MAX77779_CHG_CNFG_01_PQEN_CLEAR (~(0x1 << 7)) |
| 3049 | static inline const char * |
| 3050 | max77779_chg_cnfg_01_cstr(char *buff, size_t len, int val) |
| 3051 | { |
| 3052 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3053 | int i = 0; |
| 3054 | |
| 3055 | i += scnprintf(&buff[i], len - i, " FCHGTIME=%x", |
| 3056 | FIELD2VALUE(MAX77779_FCHGTIME, val)); |
| 3057 | i += scnprintf(&buff[i], len - i, " RECYCLE_EN=%x", |
| 3058 | FIELD2VALUE(MAX77779_RECYCLE_EN, val)); |
| 3059 | i += scnprintf(&buff[i], len - i, " CHG_RSTRT=%x", |
| 3060 | FIELD2VALUE(MAX77779_CHG_RSTRT, val)); |
| 3061 | i += scnprintf(&buff[i], len - i, " LSEL=%x", |
| 3062 | FIELD2VALUE(MAX77779_LSEL, val)); |
| 3063 | i += scnprintf(&buff[i], len - i, " PQEN=%x", |
| 3064 | FIELD2VALUE(MAX77779_PQEN, val)); |
| 3065 | #else |
| 3066 | buff[0] = 0; |
| 3067 | #endif |
| 3068 | return buff; |
| 3069 | } |
| 3070 | |
| 3071 | MAX77779_BFF(max77779_chg_cnfg_01_fchgtime,2,0) |
| 3072 | MAX77779_BFF(max77779_chg_cnfg_01_recycle_en,3,3) |
| 3073 | MAX77779_BFF(max77779_chg_cnfg_01_chg_rstrt,5,4) |
| 3074 | MAX77779_BFF(max77779_chg_cnfg_01_lsel,6,6) |
| 3075 | MAX77779_BFF(max77779_chg_cnfg_01_pqen,7,7) |
| 3076 | |
| 3077 | /* |
| 3078 | * CHG_CNFG_02,0x0E,0b00000111,0x7,OTP:SHADOW, Reset_Type:O |
| 3079 | * CHGCC[0:6],SPR_7_6[6:2] |
| 3080 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3081 | #define MAX77779_CHG_CNFG_02 0xbe |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3082 | #define MAX77779_CHG_CNFG_02_CHGCC_SHIFT 0 |
| 3083 | #define MAX77779_CHG_CNFG_02_CHGCC_MASK (0x3f << 0) |
| 3084 | #define MAX77779_CHG_CNFG_02_CHGCC_CLEAR (~(0x3f << 0)) |
| 3085 | #define MAX77779_CHG_CNFG_02_SPR_7_6_SHIFT 6 |
| 3086 | #define MAX77779_CHG_CNFG_02_SPR_7_6_MASK (0x3 << 6) |
| 3087 | #define MAX77779_CHG_CNFG_02_SPR_7_6_CLEAR (~(0x3 << 6)) |
| 3088 | static inline const char * |
| 3089 | max77779_chg_cnfg_02_cstr(char *buff, size_t len, int val) |
| 3090 | { |
| 3091 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3092 | int i = 0; |
| 3093 | |
| 3094 | i += scnprintf(&buff[i], len - i, " CHGCC=%x", |
| 3095 | FIELD2VALUE(MAX77779_CHGCC, val)); |
| 3096 | i += scnprintf(&buff[i], len - i, " SPR_7_6=%x", |
| 3097 | FIELD2VALUE(MAX77779_SPR_7_6, val)); |
| 3098 | #else |
| 3099 | buff[0] = 0; |
| 3100 | #endif |
| 3101 | return buff; |
| 3102 | } |
| 3103 | |
| 3104 | MAX77779_BFF(max77779_chg_cnfg_02_chgcc,5,0) |
| 3105 | MAX77779_BFF(max77779_chg_cnfg_02_spr_7_6,7,6) |
| 3106 | |
| 3107 | /* |
| 3108 | * CHG_CNFG_03,0x0F,0b10011001,0x99,OTP:SHADOW, Reset_Type:O |
| 3109 | * TO_ITH[0:3],TO_TIME[3:3],AUTO_FSHIP_MODE_EN,SYS_TRACK_DIS |
| 3110 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3111 | #define MAX77779_CHG_CNFG_03 0xbf |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3112 | #define MAX77779_CHG_CNFG_03_TO_ITH_SHIFT 0 |
| 3113 | #define MAX77779_CHG_CNFG_03_TO_ITH_MASK (0x7 << 0) |
| 3114 | #define MAX77779_CHG_CNFG_03_TO_ITH_CLEAR (~(0x7 << 0)) |
| 3115 | #define MAX77779_CHG_CNFG_03_TO_TIME_SHIFT 3 |
| 3116 | #define MAX77779_CHG_CNFG_03_TO_TIME_MASK (0x7 << 3) |
| 3117 | #define MAX77779_CHG_CNFG_03_TO_TIME_CLEAR (~(0x7 << 3)) |
| 3118 | #define MAX77779_CHG_CNFG_03_AUTO_FSHIP_MODE_EN_SHIFT 6 |
| 3119 | #define MAX77779_CHG_CNFG_03_AUTO_FSHIP_MODE_EN_MASK (0x1 << 6) |
| 3120 | #define MAX77779_CHG_CNFG_03_AUTO_FSHIP_MODE_EN_CLEAR (~(0x1 << 6)) |
| 3121 | #define MAX77779_CHG_CNFG_03_SYS_TRACK_DIS_SHIFT 7 |
| 3122 | #define MAX77779_CHG_CNFG_03_SYS_TRACK_DIS_MASK (0x1 << 7) |
| 3123 | #define MAX77779_CHG_CNFG_03_SYS_TRACK_DIS_CLEAR (~(0x1 << 7)) |
| 3124 | static inline const char * |
| 3125 | max77779_chg_cnfg_03_cstr(char *buff, size_t len, int val) |
| 3126 | { |
| 3127 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3128 | int i = 0; |
| 3129 | |
| 3130 | i += scnprintf(&buff[i], len - i, " TO_ITH=%x", |
| 3131 | FIELD2VALUE(MAX77779_TO_ITH, val)); |
| 3132 | i += scnprintf(&buff[i], len - i, " TO_TIME=%x", |
| 3133 | FIELD2VALUE(MAX77779_TO_TIME, val)); |
| 3134 | i += scnprintf(&buff[i], len - i, " AUTO_FSHIP_MODE_EN=%x", |
| 3135 | FIELD2VALUE(MAX77779_AUTO_FSHIP_MODE_EN, val)); |
| 3136 | i += scnprintf(&buff[i], len - i, " SYS_TRACK_DIS=%x", |
| 3137 | FIELD2VALUE(MAX77779_SYS_TRACK_DIS, val)); |
| 3138 | #else |
| 3139 | buff[0] = 0; |
| 3140 | #endif |
| 3141 | return buff; |
| 3142 | } |
| 3143 | |
| 3144 | MAX77779_BFF(max77779_chg_cnfg_03_to_ith,2,0) |
| 3145 | MAX77779_BFF(max77779_chg_cnfg_03_to_time,5,3) |
| 3146 | MAX77779_BFF(max77779_chg_cnfg_03_auto_fship_mode_en,6,6) |
| 3147 | MAX77779_BFF(max77779_chg_cnfg_03_sys_track_dis,7,7) |
| 3148 | |
| 3149 | /* |
| 3150 | * CHG_CNFG_04,0x10,0b00010100,0x14,OTP:SHADOW, Reset_Type:O |
| 3151 | * CHG_CV_PRM[0:6],SPR_7_6[6:2] |
| 3152 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3153 | #define MAX77779_CHG_CNFG_04 0xc0 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3154 | #define MAX77779_CHG_CNFG_04_CHG_CV_PRM_SHIFT 0 |
| 3155 | #define MAX77779_CHG_CNFG_04_CHG_CV_PRM_MASK (0x3f << 0) |
| 3156 | #define MAX77779_CHG_CNFG_04_CHG_CV_PRM_CLEAR (~(0x3f << 0)) |
| 3157 | #define MAX77779_CHG_CNFG_04_SPR_7_6_SHIFT 6 |
| 3158 | #define MAX77779_CHG_CNFG_04_SPR_7_6_MASK (0x3 << 6) |
| 3159 | #define MAX77779_CHG_CNFG_04_SPR_7_6_CLEAR (~(0x3 << 6)) |
| 3160 | static inline const char * |
| 3161 | max77779_chg_cnfg_04_cstr(char *buff, size_t len, int val) |
| 3162 | { |
| 3163 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3164 | int i = 0; |
| 3165 | |
| 3166 | i += scnprintf(&buff[i], len - i, " CHG_CV_PRM=%x", |
| 3167 | FIELD2VALUE(MAX77779_CHG_CV_PRM, val)); |
| 3168 | i += scnprintf(&buff[i], len - i, " SPR_7_6=%x", |
| 3169 | FIELD2VALUE(MAX77779_SPR_7_6, val)); |
| 3170 | #else |
| 3171 | buff[0] = 0; |
| 3172 | #endif |
| 3173 | return buff; |
| 3174 | } |
| 3175 | |
| 3176 | MAX77779_BFF(max77779_chg_cnfg_04_chg_cv_prm,5,0) |
| 3177 | MAX77779_BFF(max77779_chg_cnfg_04_spr_7_6,7,6) |
| 3178 | |
| 3179 | /* |
| 3180 | * CHG_CNFG_05,0x11,0b00110110,0x36,OTP:SHADOW, Reset_Type:O |
| 3181 | * OTG_ILIM[0:4],WCSM_ILIM[4:4] |
| 3182 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3183 | #define MAX77779_CHG_CNFG_05 0xc1 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3184 | #define MAX77779_CHG_CNFG_05_OTG_ILIM_SHIFT 0 |
| 3185 | #define MAX77779_CHG_CNFG_05_OTG_ILIM_MASK (0xf << 0) |
| 3186 | #define MAX77779_CHG_CNFG_05_OTG_ILIM_CLEAR (~(0xf << 0)) |
| 3187 | #define MAX77779_CHG_CNFG_05_WCSM_ILIM_SHIFT 4 |
| 3188 | #define MAX77779_CHG_CNFG_05_WCSM_ILIM_MASK (0xf << 4) |
| 3189 | #define MAX77779_CHG_CNFG_05_WCSM_ILIM_CLEAR (~(0xf << 4)) |
| 3190 | static inline const char * |
| 3191 | max77779_chg_cnfg_05_cstr(char *buff, size_t len, int val) |
| 3192 | { |
| 3193 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3194 | int i = 0; |
| 3195 | |
| 3196 | i += scnprintf(&buff[i], len - i, " OTG_ILIM=%x", |
| 3197 | FIELD2VALUE(MAX77779_OTG_ILIM, val)); |
| 3198 | i += scnprintf(&buff[i], len - i, " WCSM_ILIM=%x", |
| 3199 | FIELD2VALUE(MAX77779_WCSM_ILIM, val)); |
| 3200 | #else |
| 3201 | buff[0] = 0; |
| 3202 | #endif |
| 3203 | return buff; |
| 3204 | } |
| 3205 | |
| 3206 | MAX77779_BFF(max77779_chg_cnfg_05_otg_ilim,3,0) |
| 3207 | MAX77779_BFF(max77779_chg_cnfg_05_wcsm_ilim,7,4) |
| 3208 | |
| 3209 | /* |
| 3210 | * CHG_CNFG_06,0x12,0b00000000,0x0,OTP:SHADOW, Reset_Type:O |
| 3211 | * SPR_1_0[0:2],CHGPROT[2:2],CHG_CTM_KEY[4:4] |
| 3212 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3213 | #define MAX77779_CHG_CNFG_06 0xc2 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3214 | #define MAX77779_CHG_CNFG_06_SPR_1_0_SHIFT 0 |
| 3215 | #define MAX77779_CHG_CNFG_06_SPR_1_0_MASK (0x3 << 0) |
| 3216 | #define MAX77779_CHG_CNFG_06_SPR_1_0_CLEAR (~(0x3 << 0)) |
| 3217 | #define MAX77779_CHG_CNFG_06_CHGPROT_SHIFT 2 |
| 3218 | #define MAX77779_CHG_CNFG_06_CHGPROT_MASK (0x3 << 2) |
| 3219 | #define MAX77779_CHG_CNFG_06_CHGPROT_CLEAR (~(0x3 << 2)) |
| 3220 | #define MAX77779_CHG_CNFG_06_CHG_CTM_KEY_SHIFT 4 |
| 3221 | #define MAX77779_CHG_CNFG_06_CHG_CTM_KEY_MASK (0xf << 4) |
| 3222 | #define MAX77779_CHG_CNFG_06_CHG_CTM_KEY_CLEAR (~(0xf << 4)) |
| 3223 | static inline const char * |
| 3224 | max77779_chg_cnfg_06_cstr(char *buff, size_t len, int val) |
| 3225 | { |
| 3226 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3227 | int i = 0; |
| 3228 | |
| 3229 | i += scnprintf(&buff[i], len - i, " SPR_1_0=%x", |
| 3230 | FIELD2VALUE(MAX77779_SPR_1_0, val)); |
| 3231 | i += scnprintf(&buff[i], len - i, " CHGPROT=%x", |
| 3232 | FIELD2VALUE(MAX77779_CHGPROT, val)); |
| 3233 | i += scnprintf(&buff[i], len - i, " CHG_CTM_KEY=%x", |
| 3234 | FIELD2VALUE(MAX77779_CHG_CTM_KEY, val)); |
| 3235 | #else |
| 3236 | buff[0] = 0; |
| 3237 | #endif |
| 3238 | return buff; |
| 3239 | } |
| 3240 | |
| 3241 | MAX77779_BFF(max77779_chg_cnfg_06_spr_1_0,1,0) |
| 3242 | MAX77779_BFF(max77779_chg_cnfg_06_chgprot,3,2) |
| 3243 | MAX77779_BFF(max77779_chg_cnfg_06_chg_ctm_key,7,4) |
| 3244 | |
| 3245 | /* |
| 3246 | * CHG_CNFG_07,0x13,0b00110000,0x30,OTP:SHADOW, Reset_Type:O |
| 3247 | * FSHIP_MODE,SPR_2_1[1:2],REGTEMP[3:4],WD_QBATOFF |
| 3248 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3249 | #define MAX77779_CHG_CNFG_07 0xc3 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3250 | #define MAX77779_CHG_CNFG_07_FSHIP_MODE_SHIFT 0 |
| 3251 | #define MAX77779_CHG_CNFG_07_FSHIP_MODE_MASK (0x1 << 0) |
| 3252 | #define MAX77779_CHG_CNFG_07_FSHIP_MODE_CLEAR (~(0x1 << 0)) |
| 3253 | #define MAX77779_CHG_CNFG_07_SPR_2_1_SHIFT 1 |
| 3254 | #define MAX77779_CHG_CNFG_07_SPR_2_1_MASK (0x3 << 1) |
| 3255 | #define MAX77779_CHG_CNFG_07_SPR_2_1_CLEAR (~(0x3 << 1)) |
| 3256 | #define MAX77779_CHG_CNFG_07_REGTEMP_SHIFT 3 |
| 3257 | #define MAX77779_CHG_CNFG_07_REGTEMP_MASK (0xf << 3) |
| 3258 | #define MAX77779_CHG_CNFG_07_REGTEMP_CLEAR (~(0xf << 3)) |
| 3259 | #define MAX77779_CHG_CNFG_07_WD_QBATOFF_SHIFT 7 |
| 3260 | #define MAX77779_CHG_CNFG_07_WD_QBATOFF_MASK (0x1 << 7) |
| 3261 | #define MAX77779_CHG_CNFG_07_WD_QBATOFF_CLEAR (~(0x1 << 7)) |
| 3262 | static inline const char * |
| 3263 | max77779_chg_cnfg_07_cstr(char *buff, size_t len, int val) |
| 3264 | { |
| 3265 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3266 | int i = 0; |
| 3267 | |
| 3268 | i += scnprintf(&buff[i], len - i, " FSHIP_MODE=%x", |
| 3269 | FIELD2VALUE(MAX77779_FSHIP_MODE, val)); |
| 3270 | i += scnprintf(&buff[i], len - i, " SPR_2_1=%x", |
| 3271 | FIELD2VALUE(MAX77779_SPR_2_1, val)); |
| 3272 | i += scnprintf(&buff[i], len - i, " REGTEMP=%x", |
| 3273 | FIELD2VALUE(MAX77779_REGTEMP, val)); |
| 3274 | i += scnprintf(&buff[i], len - i, " WD_QBATOFF=%x", |
| 3275 | FIELD2VALUE(MAX77779_WD_QBATOFF, val)); |
| 3276 | #else |
| 3277 | buff[0] = 0; |
| 3278 | #endif |
| 3279 | return buff; |
| 3280 | } |
| 3281 | |
| 3282 | MAX77779_BFF(max77779_chg_cnfg_07_fship_mode,0,0) |
| 3283 | MAX77779_BFF(max77779_chg_cnfg_07_spr_2_1,2,1) |
| 3284 | MAX77779_BFF(max77779_chg_cnfg_07_regtemp,6,3) |
| 3285 | MAX77779_BFF(max77779_chg_cnfg_07_wd_qbatoff,7,7) |
| 3286 | |
| 3287 | /* |
| 3288 | * CHG_CNFG_08,0x14,0b00000101,0x5,OTP:SHADOW, Reset_Type:O |
| 3289 | * FSW[0:2],THM1_JEITA_EN,ICHGCC_COOL,VCHGCV_COOL,ICHGCC_WARM,VCHGCV_WARM,SPR_7 |
| 3290 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3291 | #define MAX77779_CHG_CNFG_08 0xc4 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3292 | #define MAX77779_CHG_CNFG_08_FSW_SHIFT 0 |
| 3293 | #define MAX77779_CHG_CNFG_08_FSW_MASK (0x3 << 0) |
| 3294 | #define MAX77779_CHG_CNFG_08_FSW_CLEAR (~(0x3 << 0)) |
| 3295 | #define MAX77779_CHG_CNFG_08_THM1_JEITA_EN_SHIFT 2 |
| 3296 | #define MAX77779_CHG_CNFG_08_THM1_JEITA_EN_MASK (0x1 << 2) |
| 3297 | #define MAX77779_CHG_CNFG_08_THM1_JEITA_EN_CLEAR (~(0x1 << 2)) |
| 3298 | #define MAX77779_CHG_CNFG_08_ICHGCC_COOL_SHIFT 3 |
| 3299 | #define MAX77779_CHG_CNFG_08_ICHGCC_COOL_MASK (0x1 << 3) |
| 3300 | #define MAX77779_CHG_CNFG_08_ICHGCC_COOL_CLEAR (~(0x1 << 3)) |
| 3301 | #define MAX77779_CHG_CNFG_08_VCHGCV_COOL_SHIFT 4 |
| 3302 | #define MAX77779_CHG_CNFG_08_VCHGCV_COOL_MASK (0x1 << 4) |
| 3303 | #define MAX77779_CHG_CNFG_08_VCHGCV_COOL_CLEAR (~(0x1 << 4)) |
| 3304 | #define MAX77779_CHG_CNFG_08_ICHGCC_WARM_SHIFT 5 |
| 3305 | #define MAX77779_CHG_CNFG_08_ICHGCC_WARM_MASK (0x1 << 5) |
| 3306 | #define MAX77779_CHG_CNFG_08_ICHGCC_WARM_CLEAR (~(0x1 << 5)) |
| 3307 | #define MAX77779_CHG_CNFG_08_VCHGCV_WARM_SHIFT 6 |
| 3308 | #define MAX77779_CHG_CNFG_08_VCHGCV_WARM_MASK (0x1 << 6) |
| 3309 | #define MAX77779_CHG_CNFG_08_VCHGCV_WARM_CLEAR (~(0x1 << 6)) |
| 3310 | #define MAX77779_CHG_CNFG_08_SPR_7_SHIFT 7 |
| 3311 | #define MAX77779_CHG_CNFG_08_SPR_7_MASK (0x1 << 7) |
| 3312 | #define MAX77779_CHG_CNFG_08_SPR_7_CLEAR (~(0x1 << 7)) |
| 3313 | static inline const char * |
| 3314 | max77779_chg_cnfg_08_cstr(char *buff, size_t len, int val) |
| 3315 | { |
| 3316 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3317 | int i = 0; |
| 3318 | |
| 3319 | i += scnprintf(&buff[i], len - i, " FSW=%x", |
| 3320 | FIELD2VALUE(MAX77779_FSW, val)); |
| 3321 | i += scnprintf(&buff[i], len - i, " THM1_JEITA_EN=%x", |
| 3322 | FIELD2VALUE(MAX77779_THM1_JEITA_EN, val)); |
| 3323 | i += scnprintf(&buff[i], len - i, " ICHGCC_COOL=%x", |
| 3324 | FIELD2VALUE(MAX77779_ICHGCC_COOL, val)); |
| 3325 | i += scnprintf(&buff[i], len - i, " VCHGCV_COOL=%x", |
| 3326 | FIELD2VALUE(MAX77779_VCHGCV_COOL, val)); |
| 3327 | i += scnprintf(&buff[i], len - i, " ICHGCC_WARM=%x", |
| 3328 | FIELD2VALUE(MAX77779_ICHGCC_WARM, val)); |
| 3329 | i += scnprintf(&buff[i], len - i, " VCHGCV_WARM=%x", |
| 3330 | FIELD2VALUE(MAX77779_VCHGCV_WARM, val)); |
| 3331 | i += scnprintf(&buff[i], len - i, " SPR_7=%x", |
| 3332 | FIELD2VALUE(MAX77779_SPR_7, val)); |
| 3333 | #else |
| 3334 | buff[0] = 0; |
| 3335 | #endif |
| 3336 | return buff; |
| 3337 | } |
| 3338 | |
| 3339 | MAX77779_BFF(max77779_chg_cnfg_08_fsw,1,0) |
| 3340 | MAX77779_BFF(max77779_chg_cnfg_08_thm1_jeita_en,2,2) |
| 3341 | MAX77779_BFF(max77779_chg_cnfg_08_ichgcc_cool,3,3) |
| 3342 | MAX77779_BFF(max77779_chg_cnfg_08_vchgcv_cool,4,4) |
| 3343 | MAX77779_BFF(max77779_chg_cnfg_08_ichgcc_warm,5,5) |
| 3344 | MAX77779_BFF(max77779_chg_cnfg_08_vchgcv_warm,6,6) |
| 3345 | MAX77779_BFF(max77779_chg_cnfg_08_spr_7,7,7) |
| 3346 | |
| 3347 | /* |
| 3348 | * CHG_CNFG_09,0x15,0b00010011,0x13,OTP:SHADOW, Reset_Type:O |
| 3349 | * CHGIN_ILIM[0:7],NO_AUTOIBUS |
| 3350 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3351 | #define MAX77779_CHG_CNFG_09 0xc5 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3352 | #define MAX77779_CHG_CNFG_09_CHGIN_ILIM_SHIFT 0 |
| 3353 | #define MAX77779_CHG_CNFG_09_CHGIN_ILIM_MASK (0x7f << 0) |
| 3354 | #define MAX77779_CHG_CNFG_09_CHGIN_ILIM_CLEAR (~(0x7f << 0)) |
| 3355 | #define MAX77779_CHG_CNFG_09_NO_AUTOIBUS_SHIFT 7 |
| 3356 | #define MAX77779_CHG_CNFG_09_NO_AUTOIBUS_MASK (0x1 << 7) |
| 3357 | #define MAX77779_CHG_CNFG_09_NO_AUTOIBUS_CLEAR (~(0x1 << 7)) |
| 3358 | static inline const char * |
| 3359 | max77779_chg_cnfg_09_cstr(char *buff, size_t len, int val) |
| 3360 | { |
| 3361 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3362 | int i = 0; |
| 3363 | |
| 3364 | i += scnprintf(&buff[i], len - i, " CHGIN_ILIM=%x", |
| 3365 | FIELD2VALUE(MAX77779_CHGIN_ILIM, val)); |
| 3366 | i += scnprintf(&buff[i], len - i, " NO_AUTOIBUS=%x", |
| 3367 | FIELD2VALUE(MAX77779_NO_AUTOIBUS, val)); |
| 3368 | #else |
| 3369 | buff[0] = 0; |
| 3370 | #endif |
| 3371 | return buff; |
| 3372 | } |
| 3373 | |
| 3374 | MAX77779_BFF(max77779_chg_cnfg_09_chgin_ilim,6,0) |
| 3375 | MAX77779_BFF(max77779_chg_cnfg_09_no_autoibus,7,7) |
| 3376 | |
| 3377 | /* |
| 3378 | * CHG_CNFG_10,0x16,0b00010011,0x13,OTP:SHADOW, Reset_Type:O |
| 3379 | * WCIN_ILIM[0:7],CHGIN_ILIM_SPEED |
| 3380 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3381 | #define MAX77779_CHG_CNFG_10 0xc6 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3382 | #define MAX77779_CHG_CNFG_10_WCIN_ILIM_SHIFT 0 |
| 3383 | #define MAX77779_CHG_CNFG_10_WCIN_ILIM_MASK (0x7f << 0) |
| 3384 | #define MAX77779_CHG_CNFG_10_WCIN_ILIM_CLEAR (~(0x7f << 0)) |
| 3385 | #define MAX77779_CHG_CNFG_10_CHGIN_ILIM_SPEED_SHIFT 7 |
| 3386 | #define MAX77779_CHG_CNFG_10_CHGIN_ILIM_SPEED_MASK (0x1 << 7) |
| 3387 | #define MAX77779_CHG_CNFG_10_CHGIN_ILIM_SPEED_CLEAR (~(0x1 << 7)) |
| 3388 | static inline const char * |
| 3389 | max77779_chg_cnfg_10_cstr(char *buff, size_t len, int val) |
| 3390 | { |
| 3391 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3392 | int i = 0; |
| 3393 | |
| 3394 | i += scnprintf(&buff[i], len - i, " WCIN_ILIM=%x", |
| 3395 | FIELD2VALUE(MAX77779_WCIN_ILIM, val)); |
| 3396 | i += scnprintf(&buff[i], len - i, " CHGIN_ILIM_SPEED=%x", |
| 3397 | FIELD2VALUE(MAX77779_CHGIN_ILIM_SPEED, val)); |
| 3398 | #else |
| 3399 | buff[0] = 0; |
| 3400 | #endif |
| 3401 | return buff; |
| 3402 | } |
| 3403 | |
| 3404 | MAX77779_BFF(max77779_chg_cnfg_10_wcin_ilim,6,0) |
| 3405 | MAX77779_BFF(max77779_chg_cnfg_10_chgin_ilim_speed,7,7) |
| 3406 | |
| 3407 | /* |
| 3408 | * CHG_CNFG_11,0x17,0b00000000,0x0,OTP:SHADOW, Reset_Type:O |
| 3409 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3410 | #define MAX77779_CHG_CNFG_11 0xc7 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3411 | |
| 3412 | /* |
| 3413 | * CHG_CNFG_12,0x18,0b01101010,0x6a,OTP:SHADOW, Reset_Type:O |
| 3414 | * DISKIP,WCIN_REG[1:2],VCHGIN_REG[3:2],CHGINSEL,WCINSEL,CHG_EN |
| 3415 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3416 | #define MAX77779_CHG_CNFG_12 0xc8 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3417 | #define MAX77779_CHG_CNFG_12_DISKIP_SHIFT 0 |
| 3418 | #define MAX77779_CHG_CNFG_12_DISKIP_MASK (0x1 << 0) |
| 3419 | #define MAX77779_CHG_CNFG_12_DISKIP_CLEAR (~(0x1 << 0)) |
| 3420 | #define MAX77779_CHG_CNFG_12_WCIN_REG_SHIFT 1 |
| 3421 | #define MAX77779_CHG_CNFG_12_WCIN_REG_MASK (0x3 << 1) |
| 3422 | #define MAX77779_CHG_CNFG_12_WCIN_REG_CLEAR (~(0x3 << 1)) |
| 3423 | #define MAX77779_CHG_CNFG_12_VCHGIN_REG_SHIFT 3 |
| 3424 | #define MAX77779_CHG_CNFG_12_VCHGIN_REG_MASK (0x3 << 3) |
| 3425 | #define MAX77779_CHG_CNFG_12_VCHGIN_REG_CLEAR (~(0x3 << 3)) |
| 3426 | #define MAX77779_CHG_CNFG_12_CHGINSEL_SHIFT 5 |
| 3427 | #define MAX77779_CHG_CNFG_12_CHGINSEL_MASK (0x1 << 5) |
| 3428 | #define MAX77779_CHG_CNFG_12_CHGINSEL_CLEAR (~(0x1 << 5)) |
| 3429 | #define MAX77779_CHG_CNFG_12_WCINSEL_SHIFT 6 |
| 3430 | #define MAX77779_CHG_CNFG_12_WCINSEL_MASK (0x1 << 6) |
| 3431 | #define MAX77779_CHG_CNFG_12_WCINSEL_CLEAR (~(0x1 << 6)) |
| 3432 | #define MAX77779_CHG_CNFG_12_CHG_EN_SHIFT 7 |
| 3433 | #define MAX77779_CHG_CNFG_12_CHG_EN_MASK (0x1 << 7) |
| 3434 | #define MAX77779_CHG_CNFG_12_CHG_EN_CLEAR (~(0x1 << 7)) |
| 3435 | static inline const char * |
| 3436 | max77779_chg_cnfg_12_cstr(char *buff, size_t len, int val) |
| 3437 | { |
| 3438 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3439 | int i = 0; |
| 3440 | |
| 3441 | i += scnprintf(&buff[i], len - i, " DISKIP=%x", |
| 3442 | FIELD2VALUE(MAX77779_DISKIP, val)); |
| 3443 | i += scnprintf(&buff[i], len - i, " WCIN_REG=%x", |
| 3444 | FIELD2VALUE(MAX77779_WCIN_REG, val)); |
| 3445 | i += scnprintf(&buff[i], len - i, " VCHGIN_REG=%x", |
| 3446 | FIELD2VALUE(MAX77779_VCHGIN_REG, val)); |
| 3447 | i += scnprintf(&buff[i], len - i, " CHGINSEL=%x", |
| 3448 | FIELD2VALUE(MAX77779_CHGINSEL, val)); |
| 3449 | i += scnprintf(&buff[i], len - i, " WCINSEL=%x", |
| 3450 | FIELD2VALUE(MAX77779_WCINSEL, val)); |
| 3451 | i += scnprintf(&buff[i], len - i, " CHG_EN=%x", |
| 3452 | FIELD2VALUE(MAX77779_CHG_EN, val)); |
| 3453 | #else |
| 3454 | buff[0] = 0; |
| 3455 | #endif |
| 3456 | return buff; |
| 3457 | } |
| 3458 | |
| 3459 | MAX77779_BFF(max77779_chg_cnfg_12_diskip,0,0) |
| 3460 | MAX77779_BFF(max77779_chg_cnfg_12_wcin_reg,2,1) |
| 3461 | MAX77779_BFF(max77779_chg_cnfg_12_vchgin_reg,4,3) |
| 3462 | MAX77779_BFF(max77779_chg_cnfg_12_chginsel,5,5) |
| 3463 | MAX77779_BFF(max77779_chg_cnfg_12_wcinsel,6,6) |
| 3464 | MAX77779_BFF(max77779_chg_cnfg_12_chg_en,7,7) |
| 3465 | |
| 3466 | /* |
| 3467 | * CHG_CNFG_13,0x19,0b00000011,0x3,OTP:SHADOW, Reset_Type:O |
| 3468 | * USB_TEMP_THR[0:3],THM2_HW_CTRL,THM_BUCK_DIS,THM_CC_HZ,THM_CHR_RSTART,SPR_7 |
| 3469 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3470 | #define MAX77779_CHG_CNFG_13 0xc9 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3471 | #define MAX77779_CHG_CNFG_13_USB_TEMP_THR_SHIFT 0 |
| 3472 | #define MAX77779_CHG_CNFG_13_USB_TEMP_THR_MASK (0x7 << 0) |
| 3473 | #define MAX77779_CHG_CNFG_13_USB_TEMP_THR_CLEAR (~(0x7 << 0)) |
| 3474 | #define MAX77779_CHG_CNFG_13_THM2_HW_CTRL_SHIFT 3 |
| 3475 | #define MAX77779_CHG_CNFG_13_THM2_HW_CTRL_MASK (0x1 << 3) |
| 3476 | #define MAX77779_CHG_CNFG_13_THM2_HW_CTRL_CLEAR (~(0x1 << 3)) |
| 3477 | #define MAX77779_CHG_CNFG_13_THM_BUCK_DIS_SHIFT 4 |
| 3478 | #define MAX77779_CHG_CNFG_13_THM_BUCK_DIS_MASK (0x1 << 4) |
| 3479 | #define MAX77779_CHG_CNFG_13_THM_BUCK_DIS_CLEAR (~(0x1 << 4)) |
| 3480 | #define MAX77779_CHG_CNFG_13_THM_CC_HZ_SHIFT 5 |
| 3481 | #define MAX77779_CHG_CNFG_13_THM_CC_HZ_MASK (0x1 << 5) |
| 3482 | #define MAX77779_CHG_CNFG_13_THM_CC_HZ_CLEAR (~(0x1 << 5)) |
| 3483 | #define MAX77779_CHG_CNFG_13_THM_CHR_RSTART_SHIFT 6 |
| 3484 | #define MAX77779_CHG_CNFG_13_THM_CHR_RSTART_MASK (0x1 << 6) |
| 3485 | #define MAX77779_CHG_CNFG_13_THM_CHR_RSTART_CLEAR (~(0x1 << 6)) |
| 3486 | #define MAX77779_CHG_CNFG_13_SPR_7_SHIFT 7 |
| 3487 | #define MAX77779_CHG_CNFG_13_SPR_7_MASK (0x1 << 7) |
| 3488 | #define MAX77779_CHG_CNFG_13_SPR_7_CLEAR (~(0x1 << 7)) |
| 3489 | static inline const char * |
| 3490 | max77779_chg_cnfg_13_cstr(char *buff, size_t len, int val) |
| 3491 | { |
| 3492 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3493 | int i = 0; |
| 3494 | |
| 3495 | i += scnprintf(&buff[i], len - i, " USB_TEMP_THR=%x", |
| 3496 | FIELD2VALUE(MAX77779_USB_TEMP_THR, val)); |
| 3497 | i += scnprintf(&buff[i], len - i, " THM2_HW_CTRL=%x", |
| 3498 | FIELD2VALUE(MAX77779_THM2_HW_CTRL, val)); |
| 3499 | i += scnprintf(&buff[i], len - i, " THM_BUCK_DIS=%x", |
| 3500 | FIELD2VALUE(MAX77779_THM_BUCK_DIS, val)); |
| 3501 | i += scnprintf(&buff[i], len - i, " THM_CC_HZ=%x", |
| 3502 | FIELD2VALUE(MAX77779_THM_CC_HZ, val)); |
| 3503 | i += scnprintf(&buff[i], len - i, " THM_CHR_RSTART=%x", |
| 3504 | FIELD2VALUE(MAX77779_THM_CHR_RSTART, val)); |
| 3505 | i += scnprintf(&buff[i], len - i, " SPR_7=%x", |
| 3506 | FIELD2VALUE(MAX77779_SPR_7, val)); |
| 3507 | #else |
| 3508 | buff[0] = 0; |
| 3509 | #endif |
| 3510 | return buff; |
| 3511 | } |
| 3512 | |
| 3513 | MAX77779_BFF(max77779_chg_cnfg_13_usb_temp_thr,2,0) |
| 3514 | MAX77779_BFF(max77779_chg_cnfg_13_thm2_hw_ctrl,3,3) |
| 3515 | MAX77779_BFF(max77779_chg_cnfg_13_thm_buck_dis,4,4) |
| 3516 | MAX77779_BFF(max77779_chg_cnfg_13_thm_cc_hz,5,5) |
| 3517 | MAX77779_BFF(max77779_chg_cnfg_13_thm_chr_rstart,6,6) |
| 3518 | MAX77779_BFF(max77779_chg_cnfg_13_spr_7,7,7) |
| 3519 | |
| 3520 | /* |
| 3521 | * CHG_CNFG_14,0x1A,0b01001000,0x48,OTP:SHADOW, Reset_Type:O |
| 3522 | * SPR_2_0[0:3],TPWROUT[3:3],AICL[6:2] |
| 3523 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3524 | #define MAX77779_CHG_CNFG_14 0xca |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3525 | #define MAX77779_CHG_CNFG_14_SPR_2_0_SHIFT 0 |
| 3526 | #define MAX77779_CHG_CNFG_14_SPR_2_0_MASK (0x7 << 0) |
| 3527 | #define MAX77779_CHG_CNFG_14_SPR_2_0_CLEAR (~(0x7 << 0)) |
| 3528 | #define MAX77779_CHG_CNFG_14_TPWROUT_SHIFT 3 |
| 3529 | #define MAX77779_CHG_CNFG_14_TPWROUT_MASK (0x7 << 3) |
| 3530 | #define MAX77779_CHG_CNFG_14_TPWROUT_CLEAR (~(0x7 << 3)) |
| 3531 | #define MAX77779_CHG_CNFG_14_AICL_SHIFT 6 |
| 3532 | #define MAX77779_CHG_CNFG_14_AICL_MASK (0x3 << 6) |
| 3533 | #define MAX77779_CHG_CNFG_14_AICL_CLEAR (~(0x3 << 6)) |
| 3534 | static inline const char * |
| 3535 | max77779_chg_cnfg_14_cstr(char *buff, size_t len, int val) |
| 3536 | { |
| 3537 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3538 | int i = 0; |
| 3539 | |
| 3540 | i += scnprintf(&buff[i], len - i, " SPR_2_0=%x", |
| 3541 | FIELD2VALUE(MAX77779_SPR_2_0, val)); |
| 3542 | i += scnprintf(&buff[i], len - i, " TPWROUT=%x", |
| 3543 | FIELD2VALUE(MAX77779_TPWROUT, val)); |
| 3544 | i += scnprintf(&buff[i], len - i, " AICL=%x", |
| 3545 | FIELD2VALUE(MAX77779_AICL, val)); |
| 3546 | #else |
| 3547 | buff[0] = 0; |
| 3548 | #endif |
| 3549 | return buff; |
| 3550 | } |
| 3551 | |
| 3552 | MAX77779_BFF(max77779_chg_cnfg_14_spr_2_0,2,0) |
| 3553 | MAX77779_BFF(max77779_chg_cnfg_14_tpwrout,5,3) |
| 3554 | MAX77779_BFF(max77779_chg_cnfg_14_aicl,7,6) |
| 3555 | |
| 3556 | /* |
| 3557 | * CHG_CNFG_15,0x1B,0b00000000,0x0,OTP:SHADOW, Reset_Type:O |
| 3558 | * WDTEN,MASTER_DC,SPSN_DET_EN,OTG_V_PGM,MINVSYS[4:2],SPR_7_6[6:2] |
| 3559 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3560 | #define MAX77779_CHG_CNFG_15 0xcb |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3561 | #define MAX77779_CHG_CNFG_15_WDTEN_SHIFT 0 |
| 3562 | #define MAX77779_CHG_CNFG_15_WDTEN_MASK (0x1 << 0) |
| 3563 | #define MAX77779_CHG_CNFG_15_WDTEN_CLEAR (~(0x1 << 0)) |
| 3564 | #define MAX77779_CHG_CNFG_15_MASTER_DC_SHIFT 1 |
| 3565 | #define MAX77779_CHG_CNFG_15_MASTER_DC_MASK (0x1 << 1) |
| 3566 | #define MAX77779_CHG_CNFG_15_MASTER_DC_CLEAR (~(0x1 << 1)) |
| 3567 | #define MAX77779_CHG_CNFG_15_SPSN_DET_EN_SHIFT 2 |
| 3568 | #define MAX77779_CHG_CNFG_15_SPSN_DET_EN_MASK (0x1 << 2) |
| 3569 | #define MAX77779_CHG_CNFG_15_SPSN_DET_EN_CLEAR (~(0x1 << 2)) |
| 3570 | #define MAX77779_CHG_CNFG_15_OTG_V_PGM_SHIFT 3 |
| 3571 | #define MAX77779_CHG_CNFG_15_OTG_V_PGM_MASK (0x1 << 3) |
| 3572 | #define MAX77779_CHG_CNFG_15_OTG_V_PGM_CLEAR (~(0x1 << 3)) |
| 3573 | #define MAX77779_CHG_CNFG_15_MINVSYS_SHIFT 4 |
| 3574 | #define MAX77779_CHG_CNFG_15_MINVSYS_MASK (0x3 << 4) |
| 3575 | #define MAX77779_CHG_CNFG_15_MINVSYS_CLEAR (~(0x3 << 4)) |
| 3576 | #define MAX77779_CHG_CNFG_15_SPR_7_6_SHIFT 6 |
| 3577 | #define MAX77779_CHG_CNFG_15_SPR_7_6_MASK (0x3 << 6) |
| 3578 | #define MAX77779_CHG_CNFG_15_SPR_7_6_CLEAR (~(0x3 << 6)) |
| 3579 | static inline const char * |
| 3580 | max77779_chg_cnfg_15_cstr(char *buff, size_t len, int val) |
| 3581 | { |
| 3582 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3583 | int i = 0; |
| 3584 | |
| 3585 | i += scnprintf(&buff[i], len - i, " WDTEN=%x", |
| 3586 | FIELD2VALUE(MAX77779_WDTEN, val)); |
| 3587 | i += scnprintf(&buff[i], len - i, " MASTER_DC=%x", |
| 3588 | FIELD2VALUE(MAX77779_MASTER_DC, val)); |
| 3589 | i += scnprintf(&buff[i], len - i, " SPSN_DET_EN=%x", |
| 3590 | FIELD2VALUE(MAX77779_SPSN_DET_EN, val)); |
| 3591 | i += scnprintf(&buff[i], len - i, " OTG_V_PGM=%x", |
| 3592 | FIELD2VALUE(MAX77779_OTG_V_PGM, val)); |
| 3593 | i += scnprintf(&buff[i], len - i, " MINVSYS=%x", |
| 3594 | FIELD2VALUE(MAX77779_MINVSYS, val)); |
| 3595 | i += scnprintf(&buff[i], len - i, " SPR_7_6=%x", |
| 3596 | FIELD2VALUE(MAX77779_SPR_7_6, val)); |
| 3597 | #else |
| 3598 | buff[0] = 0; |
| 3599 | #endif |
| 3600 | return buff; |
| 3601 | } |
| 3602 | |
| 3603 | MAX77779_BFF(max77779_chg_cnfg_15_wdten,0,0) |
| 3604 | MAX77779_BFF(max77779_chg_cnfg_15_master_dc,1,1) |
| 3605 | MAX77779_BFF(max77779_chg_cnfg_15_spsn_det_en,2,2) |
| 3606 | MAX77779_BFF(max77779_chg_cnfg_15_otg_v_pgm,3,3) |
| 3607 | MAX77779_BFF(max77779_chg_cnfg_15_minvsys,5,4) |
| 3608 | MAX77779_BFF(max77779_chg_cnfg_15_spr_7_6,7,6) |
| 3609 | |
| 3610 | /* |
| 3611 | * CHG_CNFG_16,0x1C,0b10010000,0x90,OTP:SHADOW, Reset_Type:O |
| 3612 | * SLOWLX[0:2],DIS_IR_CTRL,INLIM_CLK[3:2],SPR_5,AUTO_FSHIP_TIME[6:2] |
| 3613 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3614 | #define MAX77779_CHG_CNFG_16 0xcc |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3615 | #define MAX77779_CHG_CNFG_16_SLOWLX_SHIFT 0 |
| 3616 | #define MAX77779_CHG_CNFG_16_SLOWLX_MASK (0x3 << 0) |
| 3617 | #define MAX77779_CHG_CNFG_16_SLOWLX_CLEAR (~(0x3 << 0)) |
| 3618 | #define MAX77779_CHG_CNFG_16_DIS_IR_CTRL_SHIFT 2 |
| 3619 | #define MAX77779_CHG_CNFG_16_DIS_IR_CTRL_MASK (0x1 << 2) |
| 3620 | #define MAX77779_CHG_CNFG_16_DIS_IR_CTRL_CLEAR (~(0x1 << 2)) |
| 3621 | #define MAX77779_CHG_CNFG_16_INLIM_CLK_SHIFT 3 |
| 3622 | #define MAX77779_CHG_CNFG_16_INLIM_CLK_MASK (0x3 << 3) |
| 3623 | #define MAX77779_CHG_CNFG_16_INLIM_CLK_CLEAR (~(0x3 << 3)) |
| 3624 | #define MAX77779_CHG_CNFG_16_SPR_5_SHIFT 5 |
| 3625 | #define MAX77779_CHG_CNFG_16_SPR_5_MASK (0x1 << 5) |
| 3626 | #define MAX77779_CHG_CNFG_16_SPR_5_CLEAR (~(0x1 << 5)) |
| 3627 | #define MAX77779_CHG_CNFG_16_AUTO_FSHIP_TIME_SHIFT 6 |
| 3628 | #define MAX77779_CHG_CNFG_16_AUTO_FSHIP_TIME_MASK (0x3 << 6) |
| 3629 | #define MAX77779_CHG_CNFG_16_AUTO_FSHIP_TIME_CLEAR (~(0x3 << 6)) |
| 3630 | static inline const char * |
| 3631 | max77779_chg_cnfg_16_cstr(char *buff, size_t len, int val) |
| 3632 | { |
| 3633 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3634 | int i = 0; |
| 3635 | |
| 3636 | i += scnprintf(&buff[i], len - i, " SLOWLX=%x", |
| 3637 | FIELD2VALUE(MAX77779_SLOWLX, val)); |
| 3638 | i += scnprintf(&buff[i], len - i, " DIS_IR_CTRL=%x", |
| 3639 | FIELD2VALUE(MAX77779_DIS_IR_CTRL, val)); |
| 3640 | i += scnprintf(&buff[i], len - i, " INLIM_CLK=%x", |
| 3641 | FIELD2VALUE(MAX77779_INLIM_CLK, val)); |
| 3642 | i += scnprintf(&buff[i], len - i, " SPR_5=%x", |
| 3643 | FIELD2VALUE(MAX77779_SPR_5, val)); |
| 3644 | i += scnprintf(&buff[i], len - i, " AUTO_FSHIP_TIME=%x", |
| 3645 | FIELD2VALUE(MAX77779_AUTO_FSHIP_TIME, val)); |
| 3646 | #else |
| 3647 | buff[0] = 0; |
| 3648 | #endif |
| 3649 | return buff; |
| 3650 | } |
| 3651 | |
| 3652 | MAX77779_BFF(max77779_chg_cnfg_16_slowlx,1,0) |
| 3653 | MAX77779_BFF(max77779_chg_cnfg_16_dis_ir_ctrl,2,2) |
| 3654 | MAX77779_BFF(max77779_chg_cnfg_16_inlim_clk,4,3) |
| 3655 | MAX77779_BFF(max77779_chg_cnfg_16_spr_5,5,5) |
| 3656 | MAX77779_BFF(max77779_chg_cnfg_16_auto_fship_time,7,6) |
| 3657 | |
| 3658 | /* |
| 3659 | * CHG_CNFG_17,0x1D,0b11000011,0xc3,OTP:SHADOW, Reset_Type:O |
| 3660 | * THM3_JEITA_EN,JEITA_AUX_EN,JEITA_AUX_ZONE,ICHGCC_JAUX,VCHGCV_JAUX, |
| 3661 | * SPR_5,VDP1_STP_BST,VDP2_STP_BST |
| 3662 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3663 | #define MAX77779_CHG_CNFG_17 0xcd |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3664 | #define MAX77779_CHG_CNFG_17_THM3_JEITA_EN_SHIFT 0 |
| 3665 | #define MAX77779_CHG_CNFG_17_THM3_JEITA_EN_MASK (0x1 << 0) |
| 3666 | #define MAX77779_CHG_CNFG_17_THM3_JEITA_EN_CLEAR (~(0x1 << 0)) |
| 3667 | #define MAX77779_CHG_CNFG_17_JEITA_AUX_EN_SHIFT 1 |
| 3668 | #define MAX77779_CHG_CNFG_17_JEITA_AUX_EN_MASK (0x1 << 1) |
| 3669 | #define MAX77779_CHG_CNFG_17_JEITA_AUX_EN_CLEAR (~(0x1 << 1)) |
| 3670 | #define MAX77779_CHG_CNFG_17_JEITA_AUX_ZONE_SHIFT 2 |
| 3671 | #define MAX77779_CHG_CNFG_17_JEITA_AUX_ZONE_MASK (0x1 << 2) |
| 3672 | #define MAX77779_CHG_CNFG_17_JEITA_AUX_ZONE_CLEAR (~(0x1 << 2)) |
| 3673 | #define MAX77779_CHG_CNFG_17_ICHGCC_JAUX_SHIFT 3 |
| 3674 | #define MAX77779_CHG_CNFG_17_ICHGCC_JAUX_MASK (0x1 << 3) |
| 3675 | #define MAX77779_CHG_CNFG_17_ICHGCC_JAUX_CLEAR (~(0x1 << 3)) |
| 3676 | #define MAX77779_CHG_CNFG_17_VCHGCV_JAUX_SHIFT 4 |
| 3677 | #define MAX77779_CHG_CNFG_17_VCHGCV_JAUX_MASK (0x1 << 4) |
| 3678 | #define MAX77779_CHG_CNFG_17_VCHGCV_JAUX_CLEAR (~(0x1 << 4)) |
| 3679 | #define MAX77779_CHG_CNFG_17_SPR_5_SHIFT 5 |
| 3680 | #define MAX77779_CHG_CNFG_17_SPR_5_MASK (0x1 << 5) |
| 3681 | #define MAX77779_CHG_CNFG_17_SPR_5_CLEAR (~(0x1 << 5)) |
| 3682 | #define MAX77779_CHG_CNFG_17_VDP1_STP_BST_SHIFT 6 |
| 3683 | #define MAX77779_CHG_CNFG_17_VDP1_STP_BST_MASK (0x1 << 6) |
| 3684 | #define MAX77779_CHG_CNFG_17_VDP1_STP_BST_CLEAR (~(0x1 << 6)) |
| 3685 | #define MAX77779_CHG_CNFG_17_VDP2_STP_BST_SHIFT 7 |
| 3686 | #define MAX77779_CHG_CNFG_17_VDP2_STP_BST_MASK (0x1 << 7) |
| 3687 | #define MAX77779_CHG_CNFG_17_VDP2_STP_BST_CLEAR (~(0x1 << 7)) |
| 3688 | static inline const char * |
| 3689 | max77779_chg_cnfg_17_cstr(char *buff, size_t len, int val) |
| 3690 | { |
| 3691 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3692 | int i = 0; |
| 3693 | |
| 3694 | i += scnprintf(&buff[i], len - i, " THM3_JEITA_EN=%x", |
| 3695 | FIELD2VALUE(MAX77779_THM3_JEITA_EN, val)); |
| 3696 | i += scnprintf(&buff[i], len - i, " JEITA_AUX_EN=%x", |
| 3697 | FIELD2VALUE(MAX77779_JEITA_AUX_EN, val)); |
| 3698 | i += scnprintf(&buff[i], len - i, " JEITA_AUX_ZONE=%x", |
| 3699 | FIELD2VALUE(MAX77779_JEITA_AUX_ZONE, val)); |
| 3700 | i += scnprintf(&buff[i], len - i, " ICHGCC_JAUX=%x", |
| 3701 | FIELD2VALUE(MAX77779_ICHGCC_JAUX, val)); |
| 3702 | i += scnprintf(&buff[i], len - i, " VCHGCV_JAUX=%x", |
| 3703 | FIELD2VALUE(MAX77779_VCHGCV_JAUX, val)); |
| 3704 | i += scnprintf(&buff[i], len - i, " SPR_5=%x", |
| 3705 | FIELD2VALUE(MAX77779_SPR_5, val)); |
| 3706 | i += scnprintf(&buff[i], len - i, " VDP1_STP_BST=%x", |
| 3707 | FIELD2VALUE(MAX77779_VDP1_STP_BST, val)); |
| 3708 | i += scnprintf(&buff[i], len - i, " VDP2_STP_BST=%x", |
| 3709 | FIELD2VALUE(MAX77779_VDP2_STP_BST, val)); |
| 3710 | #else |
| 3711 | buff[0] = 0; |
| 3712 | #endif |
| 3713 | return buff; |
| 3714 | } |
| 3715 | |
| 3716 | MAX77779_BFF(max77779_chg_cnfg_17_thm3_jeita_en,0,0) |
| 3717 | MAX77779_BFF(max77779_chg_cnfg_17_jeita_aux_en,1,1) |
| 3718 | MAX77779_BFF(max77779_chg_cnfg_17_jeita_aux_zone,2,2) |
| 3719 | MAX77779_BFF(max77779_chg_cnfg_17_ichgcc_jaux,3,3) |
| 3720 | MAX77779_BFF(max77779_chg_cnfg_17_vchgcv_jaux,4,4) |
| 3721 | MAX77779_BFF(max77779_chg_cnfg_17_spr_5,5,5) |
| 3722 | MAX77779_BFF(max77779_chg_cnfg_17_vdp1_stp_bst,6,6) |
| 3723 | MAX77779_BFF(max77779_chg_cnfg_17_vdp2_stp_bst,7,7) |
| 3724 | |
| 3725 | /* |
| 3726 | * SYS_UVLO1_CNFG_0,0x1E,0b00001000,0x8,OTP:SHADOW, Reset_Type:O |
| 3727 | * SYS_UVLO1[0:4],SYS_UVLO1_HYST[4:2],SPR_7_6[6:2] |
| 3728 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3729 | #define MAX77779_SYS_UVLO1_CNFG_0 0xce |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3730 | #define MAX77779_SYS_UVLO1_CNFG_0_SYS_UVLO1_SHIFT 0 |
| 3731 | #define MAX77779_SYS_UVLO1_CNFG_0_SYS_UVLO1_MASK (0xf << 0) |
| 3732 | #define MAX77779_SYS_UVLO1_CNFG_0_SYS_UVLO1_CLEAR (~(0xf << 0)) |
| 3733 | #define MAX77779_SYS_UVLO1_CNFG_0_SYS_UVLO1_HYST_SHIFT 4 |
| 3734 | #define MAX77779_SYS_UVLO1_CNFG_0_SYS_UVLO1_HYST_MASK (0x3 << 4) |
| 3735 | #define MAX77779_SYS_UVLO1_CNFG_0_SYS_UVLO1_HYST_CLEAR (~(0x3 << 4)) |
| 3736 | #define MAX77779_SYS_UVLO1_CNFG_0_SPR_7_6_SHIFT 6 |
| 3737 | #define MAX77779_SYS_UVLO1_CNFG_0_SPR_7_6_MASK (0x3 << 6) |
| 3738 | #define MAX77779_SYS_UVLO1_CNFG_0_SPR_7_6_CLEAR (~(0x3 << 6)) |
| 3739 | static inline const char * |
| 3740 | max77779_sys_uvlo1_cnfg_0_cstr(char *buff, size_t len, int val) |
| 3741 | { |
| 3742 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3743 | int i = 0; |
| 3744 | |
| 3745 | i += scnprintf(&buff[i], len - i, " SYS_UVLO1=%x", |
| 3746 | FIELD2VALUE(MAX77779_SYS_UVLO1, val)); |
| 3747 | i += scnprintf(&buff[i], len - i, " SYS_UVLO1_HYST=%x", |
| 3748 | FIELD2VALUE(MAX77779_SYS_UVLO1_HYST, val)); |
| 3749 | i += scnprintf(&buff[i], len - i, " SPR_7_6=%x", |
| 3750 | FIELD2VALUE(MAX77779_SPR_7_6, val)); |
| 3751 | #else |
| 3752 | buff[0] = 0; |
| 3753 | #endif |
| 3754 | return buff; |
| 3755 | } |
| 3756 | |
| 3757 | MAX77779_BFF(max77779_sys_uvlo1_cnfg_0_sys_uvlo1,3,0) |
| 3758 | MAX77779_BFF(max77779_sys_uvlo1_cnfg_0_sys_uvlo1_hyst,5,4) |
| 3759 | MAX77779_BFF(max77779_sys_uvlo1_cnfg_0_spr_7_6,7,6) |
| 3760 | |
| 3761 | /* |
| 3762 | * SYS_UVLO1_CNFG_1,0x1F,0b10000000,0x80,OTP:SHADOW, Reset_Type:O |
| 3763 | * SYS_UVLO1_REL[0:2],SPR_3_2[2:2],SYS_UVLO1_DET,SPR_6_5[5:2],SYS_UVLO1_VDRP1_EN |
| 3764 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3765 | #define MAX77779_SYS_UVLO1_CNFG_1 0xcf |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3766 | #define MAX77779_SYS_UVLO1_CNFG_1_SYS_UVLO1_REL_SHIFT 0 |
| 3767 | #define MAX77779_SYS_UVLO1_CNFG_1_SYS_UVLO1_REL_MASK (0x3 << 0) |
| 3768 | #define MAX77779_SYS_UVLO1_CNFG_1_SYS_UVLO1_REL_CLEAR (~(0x3 << 0)) |
| 3769 | #define MAX77779_SYS_UVLO1_CNFG_1_SPR_3_2_SHIFT 2 |
| 3770 | #define MAX77779_SYS_UVLO1_CNFG_1_SPR_3_2_MASK (0x3 << 2) |
| 3771 | #define MAX77779_SYS_UVLO1_CNFG_1_SPR_3_2_CLEAR (~(0x3 << 2)) |
| 3772 | #define MAX77779_SYS_UVLO1_CNFG_1_SYS_UVLO1_DET_SHIFT 4 |
| 3773 | #define MAX77779_SYS_UVLO1_CNFG_1_SYS_UVLO1_DET_MASK (0x1 << 4) |
| 3774 | #define MAX77779_SYS_UVLO1_CNFG_1_SYS_UVLO1_DET_CLEAR (~(0x1 << 4)) |
| 3775 | #define MAX77779_SYS_UVLO1_CNFG_1_SPR_6_5_SHIFT 5 |
| 3776 | #define MAX77779_SYS_UVLO1_CNFG_1_SPR_6_5_MASK (0x3 << 5) |
| 3777 | #define MAX77779_SYS_UVLO1_CNFG_1_SPR_6_5_CLEAR (~(0x3 << 5)) |
| 3778 | #define MAX77779_SYS_UVLO1_CNFG_1_SYS_UVLO1_VDRP1_EN_SHIFT 7 |
| 3779 | #define MAX77779_SYS_UVLO1_CNFG_1_SYS_UVLO1_VDRP1_EN_MASK (0x1 << 7) |
| 3780 | #define MAX77779_SYS_UVLO1_CNFG_1_SYS_UVLO1_VDRP1_EN_CLEAR (~(0x1 << 7)) |
| 3781 | static inline const char * |
| 3782 | max77779_sys_uvlo1_cnfg_1_cstr(char *buff, size_t len, int val) |
| 3783 | { |
| 3784 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3785 | int i = 0; |
| 3786 | |
| 3787 | i += scnprintf(&buff[i], len - i, " SYS_UVLO1_REL=%x", |
| 3788 | FIELD2VALUE(MAX77779_SYS_UVLO1_REL, val)); |
| 3789 | i += scnprintf(&buff[i], len - i, " SPR_3_2=%x", |
| 3790 | FIELD2VALUE(MAX77779_SPR_3_2, val)); |
| 3791 | i += scnprintf(&buff[i], len - i, " SYS_UVLO1_DET=%x", |
| 3792 | FIELD2VALUE(MAX77779_SYS_UVLO1_DET, val)); |
| 3793 | i += scnprintf(&buff[i], len - i, " SPR_6_5=%x", |
| 3794 | FIELD2VALUE(MAX77779_SPR_6_5, val)); |
| 3795 | i += scnprintf(&buff[i], len - i, " SYS_UVLO1_VDRP1_EN=%x", |
| 3796 | FIELD2VALUE(MAX77779_SYS_UVLO1_VDRP1_EN, val)); |
| 3797 | #else |
| 3798 | buff[0] = 0; |
| 3799 | #endif |
| 3800 | return buff; |
| 3801 | } |
| 3802 | |
| 3803 | MAX77779_BFF(max77779_sys_uvlo1_cnfg_1_sys_uvlo1_rel,1,0) |
| 3804 | MAX77779_BFF(max77779_sys_uvlo1_cnfg_1_spr_3_2,3,2) |
| 3805 | MAX77779_BFF(max77779_sys_uvlo1_cnfg_1_sys_uvlo1_det,4,4) |
| 3806 | MAX77779_BFF(max77779_sys_uvlo1_cnfg_1_spr_6_5,6,5) |
| 3807 | MAX77779_BFF(max77779_sys_uvlo1_cnfg_1_sys_uvlo1_vdrp1_en,7,7) |
| 3808 | |
| 3809 | /* |
| 3810 | * SYS_UVLO2_CNFG_0,0x20,0b00000100,0x4,OTP:SHADOW, Reset_Type:O |
| 3811 | * SYS_UVLO2[0:4],SYS_UVLO2_HYST[4:2],SPR_7_6[6:2] |
| 3812 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3813 | #define MAX77779_SYS_UVLO2_CNFG_0 0xd0 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3814 | #define MAX77779_SYS_UVLO2_CNFG_0_SYS_UVLO2_SHIFT 0 |
| 3815 | #define MAX77779_SYS_UVLO2_CNFG_0_SYS_UVLO2_MASK (0xf << 0) |
| 3816 | #define MAX77779_SYS_UVLO2_CNFG_0_SYS_UVLO2_CLEAR (~(0xf << 0)) |
| 3817 | #define MAX77779_SYS_UVLO2_CNFG_0_SYS_UVLO2_HYST_SHIFT 4 |
| 3818 | #define MAX77779_SYS_UVLO2_CNFG_0_SYS_UVLO2_HYST_MASK (0x3 << 4) |
| 3819 | #define MAX77779_SYS_UVLO2_CNFG_0_SYS_UVLO2_HYST_CLEAR (~(0x3 << 4)) |
| 3820 | #define MAX77779_SYS_UVLO2_CNFG_0_SPR_7_6_SHIFT 6 |
| 3821 | #define MAX77779_SYS_UVLO2_CNFG_0_SPR_7_6_MASK (0x3 << 6) |
| 3822 | #define MAX77779_SYS_UVLO2_CNFG_0_SPR_7_6_CLEAR (~(0x3 << 6)) |
| 3823 | static inline const char * |
| 3824 | max77779_sys_uvlo2_cnfg_0_cstr(char *buff, size_t len, int val) |
| 3825 | { |
| 3826 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3827 | int i = 0; |
| 3828 | |
| 3829 | i += scnprintf(&buff[i], len - i, " SYS_UVLO2=%x", |
| 3830 | FIELD2VALUE(MAX77779_SYS_UVLO2, val)); |
| 3831 | i += scnprintf(&buff[i], len - i, " SYS_UVLO2_HYST=%x", |
| 3832 | FIELD2VALUE(MAX77779_SYS_UVLO2_HYST, val)); |
| 3833 | i += scnprintf(&buff[i], len - i, " SPR_7_6=%x", |
| 3834 | FIELD2VALUE(MAX77779_SPR_7_6, val)); |
| 3835 | #else |
| 3836 | buff[0] = 0; |
| 3837 | #endif |
| 3838 | return buff; |
| 3839 | } |
| 3840 | |
| 3841 | MAX77779_BFF(max77779_sys_uvlo2_cnfg_0_sys_uvlo2,3,0) |
| 3842 | MAX77779_BFF(max77779_sys_uvlo2_cnfg_0_sys_uvlo2_hyst,5,4) |
| 3843 | MAX77779_BFF(max77779_sys_uvlo2_cnfg_0_spr_7_6,7,6) |
| 3844 | |
| 3845 | /* |
| 3846 | * SYS_UVLO2_CNFG_1,0x21,0b10000000,0x80,OTP:SHADOW, Reset_Type:O |
| 3847 | * SYS_UVLO2_REL[0:2],SPR_3_2[2:2],SYS_UVLO2_DET,SPR_6_5[5:2],SYS_UVLO2_VDRP2_EN |
| 3848 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3849 | #define MAX77779_SYS_UVLO2_CNFG_1 0xd1 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3850 | #define MAX77779_SYS_UVLO2_CNFG_1_SYS_UVLO2_REL_SHIFT 0 |
| 3851 | #define MAX77779_SYS_UVLO2_CNFG_1_SYS_UVLO2_REL_MASK (0x3 << 0) |
| 3852 | #define MAX77779_SYS_UVLO2_CNFG_1_SYS_UVLO2_REL_CLEAR (~(0x3 << 0)) |
| 3853 | #define MAX77779_SYS_UVLO2_CNFG_1_SPR_3_2_SHIFT 2 |
| 3854 | #define MAX77779_SYS_UVLO2_CNFG_1_SPR_3_2_MASK (0x3 << 2) |
| 3855 | #define MAX77779_SYS_UVLO2_CNFG_1_SPR_3_2_CLEAR (~(0x3 << 2)) |
| 3856 | #define MAX77779_SYS_UVLO2_CNFG_1_SYS_UVLO2_DET_SHIFT 4 |
| 3857 | #define MAX77779_SYS_UVLO2_CNFG_1_SYS_UVLO2_DET_MASK (0x1 << 4) |
| 3858 | #define MAX77779_SYS_UVLO2_CNFG_1_SYS_UVLO2_DET_CLEAR (~(0x1 << 4)) |
| 3859 | #define MAX77779_SYS_UVLO2_CNFG_1_SPR_6_5_SHIFT 5 |
| 3860 | #define MAX77779_SYS_UVLO2_CNFG_1_SPR_6_5_MASK (0x3 << 5) |
| 3861 | #define MAX77779_SYS_UVLO2_CNFG_1_SPR_6_5_CLEAR (~(0x3 << 5)) |
| 3862 | #define MAX77779_SYS_UVLO2_CNFG_1_SYS_UVLO2_VDRP2_EN_SHIFT 7 |
| 3863 | #define MAX77779_SYS_UVLO2_CNFG_1_SYS_UVLO2_VDRP2_EN_MASK (0x1 << 7) |
| 3864 | #define MAX77779_SYS_UVLO2_CNFG_1_SYS_UVLO2_VDRP2_EN_CLEAR (~(0x1 << 7)) |
| 3865 | static inline const char * |
| 3866 | max77779_sys_uvlo2_cnfg_1_cstr(char *buff, size_t len, int val) |
| 3867 | { |
| 3868 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3869 | int i = 0; |
| 3870 | |
| 3871 | i += scnprintf(&buff[i], len - i, " SYS_UVLO2_REL=%x", |
| 3872 | FIELD2VALUE(MAX77779_SYS_UVLO2_REL, val)); |
| 3873 | i += scnprintf(&buff[i], len - i, " SPR_3_2=%x", |
| 3874 | FIELD2VALUE(MAX77779_SPR_3_2, val)); |
| 3875 | i += scnprintf(&buff[i], len - i, " SYS_UVLO2_DET=%x", |
| 3876 | FIELD2VALUE(MAX77779_SYS_UVLO2_DET, val)); |
| 3877 | i += scnprintf(&buff[i], len - i, " SPR_6_5=%x", |
| 3878 | FIELD2VALUE(MAX77779_SPR_6_5, val)); |
| 3879 | i += scnprintf(&buff[i], len - i, " SYS_UVLO2_VDRP2_EN=%x", |
| 3880 | FIELD2VALUE(MAX77779_SYS_UVLO2_VDRP2_EN, val)); |
| 3881 | #else |
| 3882 | buff[0] = 0; |
| 3883 | #endif |
| 3884 | return buff; |
| 3885 | } |
| 3886 | |
| 3887 | MAX77779_BFF(max77779_sys_uvlo2_cnfg_1_sys_uvlo2_rel,1,0) |
| 3888 | MAX77779_BFF(max77779_sys_uvlo2_cnfg_1_spr_3_2,3,2) |
| 3889 | MAX77779_BFF(max77779_sys_uvlo2_cnfg_1_sys_uvlo2_det,4,4) |
| 3890 | MAX77779_BFF(max77779_sys_uvlo2_cnfg_1_spr_6_5,6,5) |
| 3891 | MAX77779_BFF(max77779_sys_uvlo2_cnfg_1_sys_uvlo2_vdrp2_en,7,7) |
| 3892 | |
| 3893 | /* |
| 3894 | * BAT_OILO1_CNFG_0,0x22,0b00010000,0x10,OTP:SHADOW, Reset_Type:O |
| 3895 | * BAT_OILO1[0:5],SPR_7_5[5:3] |
| 3896 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3897 | #define MAX77779_BAT_OILO1_CNFG_0 0xd2 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3898 | #define MAX77779_BAT_OILO1_CNFG_0_BAT_OILO1_SHIFT 0 |
| 3899 | #define MAX77779_BAT_OILO1_CNFG_0_BAT_OILO1_MASK (0x1f << 0) |
| 3900 | #define MAX77779_BAT_OILO1_CNFG_0_BAT_OILO1_CLEAR (~(0x1f << 0)) |
| 3901 | #define MAX77779_BAT_OILO1_CNFG_0_SPR_7_5_SHIFT 5 |
| 3902 | #define MAX77779_BAT_OILO1_CNFG_0_SPR_7_5_MASK (0x7 << 5) |
| 3903 | #define MAX77779_BAT_OILO1_CNFG_0_SPR_7_5_CLEAR (~(0x7 << 5)) |
| 3904 | static inline const char * |
| 3905 | max77779_bat_oilo1_cnfg_0_cstr(char *buff, size_t len, int val) |
| 3906 | { |
| 3907 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3908 | int i = 0; |
| 3909 | |
| 3910 | i += scnprintf(&buff[i], len - i, " BAT_OILO1=%x", |
| 3911 | FIELD2VALUE(MAX77779_BAT_OILO1, val)); |
| 3912 | i += scnprintf(&buff[i], len - i, " SPR_7_5=%x", |
| 3913 | FIELD2VALUE(MAX77779_SPR_7_5, val)); |
| 3914 | #else |
| 3915 | buff[0] = 0; |
| 3916 | #endif |
| 3917 | return buff; |
| 3918 | } |
| 3919 | |
| 3920 | MAX77779_BFF(max77779_bat_oilo1_cnfg_0_bat_oilo1,4,0) |
| 3921 | MAX77779_BFF(max77779_bat_oilo1_cnfg_0_spr_7_5,7,5) |
| 3922 | |
| 3923 | /* |
| 3924 | * BAT_OILO1_CNFG_1,0x23,0b00000000,0x0,OTP:SHADOW, Reset_Type:O |
| 3925 | * BAT_OILO1_DET[0:5],BAT_OILO1_REL[5:3] |
| 3926 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3927 | #define MAX77779_BAT_OILO1_CNFG_1 0xd3 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3928 | #define MAX77779_BAT_OILO1_CNFG_1_BAT_OILO1_DET_SHIFT 0 |
| 3929 | #define MAX77779_BAT_OILO1_CNFG_1_BAT_OILO1_DET_MASK (0x1f << 0) |
| 3930 | #define MAX77779_BAT_OILO1_CNFG_1_BAT_OILO1_DET_CLEAR (~(0x1f << 0)) |
| 3931 | #define MAX77779_BAT_OILO1_CNFG_1_BAT_OILO1_REL_SHIFT 5 |
| 3932 | #define MAX77779_BAT_OILO1_CNFG_1_BAT_OILO1_REL_MASK (0x7 << 5) |
| 3933 | #define MAX77779_BAT_OILO1_CNFG_1_BAT_OILO1_REL_CLEAR (~(0x7 << 5)) |
| 3934 | static inline const char * |
| 3935 | max77779_bat_oilo1_cnfg_1_cstr(char *buff, size_t len, int val) |
| 3936 | { |
| 3937 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3938 | int i = 0; |
| 3939 | |
| 3940 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_DET=%x", |
| 3941 | FIELD2VALUE(MAX77779_BAT_OILO1_DET, val)); |
| 3942 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_REL=%x", |
| 3943 | FIELD2VALUE(MAX77779_BAT_OILO1_REL, val)); |
| 3944 | #else |
| 3945 | buff[0] = 0; |
| 3946 | #endif |
| 3947 | return buff; |
| 3948 | } |
| 3949 | |
| 3950 | MAX77779_BFF(max77779_bat_oilo1_cnfg_1_bat_oilo1_det,4,0) |
| 3951 | MAX77779_BFF(max77779_bat_oilo1_cnfg_1_bat_oilo1_rel,7,5) |
| 3952 | |
| 3953 | /* |
| 3954 | * BAT_OILO1_CNFG_2,0x24,0b00000000,0x0,OTP:SHADOW, Reset_Type:O |
| 3955 | * BAT_OILO1_INT_DET[0:5],BAT_OILO1_INT_REL[5:3] |
| 3956 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3957 | #define MAX77779_BAT_OILO1_CNFG_2 0xd4 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3958 | #define MAX77779_BAT_OILO1_CNFG_2_BAT_OILO1_INT_DET_SHIFT 0 |
| 3959 | #define MAX77779_BAT_OILO1_CNFG_2_BAT_OILO1_INT_DET_MASK (0x1f << 0) |
| 3960 | #define MAX77779_BAT_OILO1_CNFG_2_BAT_OILO1_INT_DET_CLEAR (~(0x1f << 0)) |
| 3961 | #define MAX77779_BAT_OILO1_CNFG_2_BAT_OILO1_INT_REL_SHIFT 5 |
| 3962 | #define MAX77779_BAT_OILO1_CNFG_2_BAT_OILO1_INT_REL_MASK (0x7 << 5) |
| 3963 | #define MAX77779_BAT_OILO1_CNFG_2_BAT_OILO1_INT_REL_CLEAR (~(0x7 << 5)) |
| 3964 | static inline const char * |
| 3965 | max77779_bat_oilo1_cnfg_2_cstr(char *buff, size_t len, int val) |
| 3966 | { |
| 3967 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 3968 | int i = 0; |
| 3969 | |
| 3970 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_INT_DET=%x", |
| 3971 | FIELD2VALUE(MAX77779_BAT_OILO1_INT_DET, val)); |
| 3972 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_INT_REL=%x", |
| 3973 | FIELD2VALUE(MAX77779_BAT_OILO1_INT_REL, val)); |
| 3974 | #else |
| 3975 | buff[0] = 0; |
| 3976 | #endif |
| 3977 | return buff; |
| 3978 | } |
| 3979 | |
| 3980 | MAX77779_BFF(max77779_bat_oilo1_cnfg_2_bat_oilo1_int_det,4,0) |
| 3981 | MAX77779_BFF(max77779_bat_oilo1_cnfg_2_bat_oilo1_int_rel,7,5) |
| 3982 | |
| 3983 | /* |
| 3984 | * BAT_OILO1_CNFG_3,0x25,0b10000010,0x82,OTP:SHADOW, Reset_Type:O |
| 3985 | * BAT_OPEN_TO_1[0:4],SPR_3,BAT_OILO_INT_CLR,BAT_OILO1_VDRP1_EN,BAT_OILO1_VDRP2_EN |
| 3986 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 3987 | #define MAX77779_BAT_OILO1_CNFG_3 0xd5 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 3988 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OPEN_TO_1_SHIFT 0 |
| 3989 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OPEN_TO_1_MASK (0xf << 0) |
| 3990 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OPEN_TO_1_CLEAR (~(0xf << 0)) |
| 3991 | #define MAX77779_BAT_OILO1_CNFG_3_SPR_3_SHIFT 4 |
| 3992 | #define MAX77779_BAT_OILO1_CNFG_3_SPR_3_MASK (0x1 << 4) |
| 3993 | #define MAX77779_BAT_OILO1_CNFG_3_SPR_3_CLEAR (~(0x1 << 4)) |
| 3994 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OILO_INT_CLR_SHIFT 5 |
| 3995 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OILO_INT_CLR_MASK (0x1 << 5) |
| 3996 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OILO_INT_CLR_CLEAR (~(0x1 << 5)) |
| 3997 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OILO1_VDRP1_EN_SHIFT 6 |
| 3998 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OILO1_VDRP1_EN_MASK (0x1 << 6) |
| 3999 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OILO1_VDRP1_EN_CLEAR (~(0x1 << 6)) |
| 4000 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OILO1_VDRP2_EN_SHIFT 7 |
| 4001 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OILO1_VDRP2_EN_MASK (0x1 << 7) |
| 4002 | #define MAX77779_BAT_OILO1_CNFG_3_BAT_OILO1_VDRP2_EN_CLEAR (~(0x1 << 7)) |
| 4003 | static inline const char * |
| 4004 | max77779_bat_oilo1_cnfg_3_cstr(char *buff, size_t len, int val) |
| 4005 | { |
| 4006 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4007 | int i = 0; |
| 4008 | |
| 4009 | i += scnprintf(&buff[i], len - i, " BAT_OPEN_TO_1=%x", |
| 4010 | FIELD2VALUE(MAX77779_BAT_OPEN_TO_1, val)); |
| 4011 | i += scnprintf(&buff[i], len - i, " SPR_3=%x", |
| 4012 | FIELD2VALUE(MAX77779_SPR_3, val)); |
| 4013 | i += scnprintf(&buff[i], len - i, " BAT_OILO_INT_CLR=%x", |
| 4014 | FIELD2VALUE(MAX77779_BAT_OILO_INT_CLR, val)); |
| 4015 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_VDRP1_EN=%x", |
| 4016 | FIELD2VALUE(MAX77779_BAT_OILO1_VDRP1_EN, val)); |
| 4017 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_VDRP2_EN=%x", |
| 4018 | FIELD2VALUE(MAX77779_BAT_OILO1_VDRP2_EN, val)); |
| 4019 | #else |
| 4020 | buff[0] = 0; |
| 4021 | #endif |
| 4022 | return buff; |
| 4023 | } |
| 4024 | |
| 4025 | MAX77779_BFF(max77779_bat_oilo1_cnfg_3_bat_open_to_1,3,0) |
| 4026 | MAX77779_BFF(max77779_bat_oilo1_cnfg_3_spr_3,4,4) |
| 4027 | MAX77779_BFF(max77779_bat_oilo1_cnfg_3_bat_oilo_int_clr,5,5) |
| 4028 | MAX77779_BFF(max77779_bat_oilo1_cnfg_3_bat_oilo1_vdrp1_en,6,6) |
| 4029 | MAX77779_BFF(max77779_bat_oilo1_cnfg_3_bat_oilo1_vdrp2_en,7,7) |
| 4030 | |
| 4031 | /* |
| 4032 | * BAT_OILO2_CNFG_0,0x26,0b00010000,0x10,OTP:SHADOW, Reset_Type:O |
| 4033 | * BAT_OILO2[0:5],SPR_7_5[5:3] |
| 4034 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4035 | #define MAX77779_BAT_OILO2_CNFG_0 0xd6 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4036 | #define MAX77779_BAT_OILO2_CNFG_0_BAT_OILO2_SHIFT 0 |
| 4037 | #define MAX77779_BAT_OILO2_CNFG_0_BAT_OILO2_MASK (0x1f << 0) |
| 4038 | #define MAX77779_BAT_OILO2_CNFG_0_BAT_OILO2_CLEAR (~(0x1f << 0)) |
| 4039 | #define MAX77779_BAT_OILO2_CNFG_0_SPR_7_5_SHIFT 5 |
| 4040 | #define MAX77779_BAT_OILO2_CNFG_0_SPR_7_5_MASK (0x7 << 5) |
| 4041 | #define MAX77779_BAT_OILO2_CNFG_0_SPR_7_5_CLEAR (~(0x7 << 5)) |
| 4042 | static inline const char * |
| 4043 | max77779_bat_oilo2_cnfg_0_cstr(char *buff, size_t len, int val) |
| 4044 | { |
| 4045 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4046 | int i = 0; |
| 4047 | |
| 4048 | i += scnprintf(&buff[i], len - i, " BAT_OILO2=%x", |
| 4049 | FIELD2VALUE(MAX77779_BAT_OILO2, val)); |
| 4050 | i += scnprintf(&buff[i], len - i, " SPR_7_5=%x", |
| 4051 | FIELD2VALUE(MAX77779_SPR_7_5, val)); |
| 4052 | #else |
| 4053 | buff[0] = 0; |
| 4054 | #endif |
| 4055 | return buff; |
| 4056 | } |
| 4057 | |
| 4058 | MAX77779_BFF(max77779_bat_oilo2_cnfg_0_bat_oilo2,4,0) |
| 4059 | MAX77779_BFF(max77779_bat_oilo2_cnfg_0_spr_7_5,7,5) |
| 4060 | |
| 4061 | /* |
| 4062 | * BAT_OILO2_CNFG_1,0x27,0b00000000,0x0,OTP:SHADOW, Reset_Type:O |
| 4063 | * BAT_OILO2_DET[0:5],BAT_OILO2_REL[5:3] |
| 4064 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4065 | #define MAX77779_BAT_OILO2_CNFG_1 0xd7 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4066 | #define MAX77779_BAT_OILO2_CNFG_1_BAT_OILO2_DET_SHIFT 0 |
| 4067 | #define MAX77779_BAT_OILO2_CNFG_1_BAT_OILO2_DET_MASK (0x1f << 0) |
| 4068 | #define MAX77779_BAT_OILO2_CNFG_1_BAT_OILO2_DET_CLEAR (~(0x1f << 0)) |
| 4069 | #define MAX77779_BAT_OILO2_CNFG_1_BAT_OILO2_REL_SHIFT 5 |
| 4070 | #define MAX77779_BAT_OILO2_CNFG_1_BAT_OILO2_REL_MASK (0x7 << 5) |
| 4071 | #define MAX77779_BAT_OILO2_CNFG_1_BAT_OILO2_REL_CLEAR (~(0x7 << 5)) |
| 4072 | static inline const char * |
| 4073 | max77779_bat_oilo2_cnfg_1_cstr(char *buff, size_t len, int val) |
| 4074 | { |
| 4075 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4076 | int i = 0; |
| 4077 | |
| 4078 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_DET=%x", |
| 4079 | FIELD2VALUE(MAX77779_BAT_OILO2_DET, val)); |
| 4080 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_REL=%x", |
| 4081 | FIELD2VALUE(MAX77779_BAT_OILO2_REL, val)); |
| 4082 | #else |
| 4083 | buff[0] = 0; |
| 4084 | #endif |
| 4085 | return buff; |
| 4086 | } |
| 4087 | |
| 4088 | MAX77779_BFF(max77779_bat_oilo2_cnfg_1_bat_oilo2_det,4,0) |
| 4089 | MAX77779_BFF(max77779_bat_oilo2_cnfg_1_bat_oilo2_rel,7,5) |
| 4090 | |
| 4091 | /* |
| 4092 | * BAT_OILO2_CNFG_2,0x28,0b00000000,0x0,OTP:SHADOW, Reset_Type:O |
| 4093 | * BAT_OILO2_INT_DET[0:5],BAT_OILO2_INT_REL[5:3] |
| 4094 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4095 | #define MAX77779_BAT_OILO2_CNFG_2 0xd8 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4096 | #define MAX77779_BAT_OILO2_CNFG_2_BAT_OILO2_INT_DET_SHIFT 0 |
| 4097 | #define MAX77779_BAT_OILO2_CNFG_2_BAT_OILO2_INT_DET_MASK (0x1f << 0) |
| 4098 | #define MAX77779_BAT_OILO2_CNFG_2_BAT_OILO2_INT_DET_CLEAR (~(0x1f << 0)) |
| 4099 | #define MAX77779_BAT_OILO2_CNFG_2_BAT_OILO2_INT_REL_SHIFT 5 |
| 4100 | #define MAX77779_BAT_OILO2_CNFG_2_BAT_OILO2_INT_REL_MASK (0x7 << 5) |
| 4101 | #define MAX77779_BAT_OILO2_CNFG_2_BAT_OILO2_INT_REL_CLEAR (~(0x7 << 5)) |
| 4102 | static inline const char * |
| 4103 | max77779_bat_oilo2_cnfg_2_cstr(char *buff, size_t len, int val) |
| 4104 | { |
| 4105 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4106 | int i = 0; |
| 4107 | |
| 4108 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_INT_DET=%x", |
| 4109 | FIELD2VALUE(MAX77779_BAT_OILO2_INT_DET, val)); |
| 4110 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_INT_REL=%x", |
| 4111 | FIELD2VALUE(MAX77779_BAT_OILO2_INT_REL, val)); |
| 4112 | #else |
| 4113 | buff[0] = 0; |
| 4114 | #endif |
| 4115 | return buff; |
| 4116 | } |
| 4117 | |
| 4118 | MAX77779_BFF(max77779_bat_oilo2_cnfg_2_bat_oilo2_int_det,4,0) |
| 4119 | MAX77779_BFF(max77779_bat_oilo2_cnfg_2_bat_oilo2_int_rel,7,5) |
| 4120 | |
| 4121 | /* |
| 4122 | * BAT_OILO2_CNFG_3,0x29,0b00000010,0x2,OTP:SHADOW, Reset_Type:O |
| 4123 | * BAT_OPEN_TO_2[0:4],SPR_5_4[4:2],BAT_OILO2_VDRP1_EN,BAT_OILO2_VDRP2_EN |
| 4124 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4125 | #define MAX77779_BAT_OILO2_CNFG_3 0xd9 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4126 | #define MAX77779_BAT_OILO2_CNFG_3_BAT_OPEN_TO_2_SHIFT 0 |
| 4127 | #define MAX77779_BAT_OILO2_CNFG_3_BAT_OPEN_TO_2_MASK (0xf << 0) |
| 4128 | #define MAX77779_BAT_OILO2_CNFG_3_BAT_OPEN_TO_2_CLEAR (~(0xf << 0)) |
| 4129 | #define MAX77779_BAT_OILO2_CNFG_3_SPR_5_4_SHIFT 4 |
| 4130 | #define MAX77779_BAT_OILO2_CNFG_3_SPR_5_4_MASK (0x3 << 4) |
| 4131 | #define MAX77779_BAT_OILO2_CNFG_3_SPR_5_4_CLEAR (~(0x3 << 4)) |
| 4132 | #define MAX77779_BAT_OILO2_CNFG_3_BAT_OILO2_VDRP1_EN_SHIFT 6 |
| 4133 | #define MAX77779_BAT_OILO2_CNFG_3_BAT_OILO2_VDRP1_EN_MASK (0x1 << 6) |
| 4134 | #define MAX77779_BAT_OILO2_CNFG_3_BAT_OILO2_VDRP1_EN_CLEAR (~(0x1 << 6)) |
| 4135 | #define MAX77779_BAT_OILO2_CNFG_3_BAT_OILO2_VDRP2_EN_SHIFT 7 |
| 4136 | #define MAX77779_BAT_OILO2_CNFG_3_BAT_OILO2_VDRP2_EN_MASK (0x1 << 7) |
| 4137 | #define MAX77779_BAT_OILO2_CNFG_3_BAT_OILO2_VDRP2_EN_CLEAR (~(0x1 << 7)) |
| 4138 | static inline const char * |
| 4139 | max77779_bat_oilo2_cnfg_3_cstr(char *buff, size_t len, int val) |
| 4140 | { |
| 4141 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4142 | int i = 0; |
| 4143 | |
| 4144 | i += scnprintf(&buff[i], len - i, " BAT_OPEN_TO_2=%x", |
| 4145 | FIELD2VALUE(MAX77779_BAT_OPEN_TO_2, val)); |
| 4146 | i += scnprintf(&buff[i], len - i, " SPR_5_4=%x", |
| 4147 | FIELD2VALUE(MAX77779_SPR_5_4, val)); |
| 4148 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_VDRP1_EN=%x", |
| 4149 | FIELD2VALUE(MAX77779_BAT_OILO2_VDRP1_EN, val)); |
| 4150 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_VDRP2_EN=%x", |
| 4151 | FIELD2VALUE(MAX77779_BAT_OILO2_VDRP2_EN, val)); |
| 4152 | #else |
| 4153 | buff[0] = 0; |
| 4154 | #endif |
| 4155 | return buff; |
| 4156 | } |
| 4157 | |
| 4158 | MAX77779_BFF(max77779_bat_oilo2_cnfg_3_bat_open_to_2,3,0) |
| 4159 | MAX77779_BFF(max77779_bat_oilo2_cnfg_3_spr_5_4,5,4) |
| 4160 | MAX77779_BFF(max77779_bat_oilo2_cnfg_3_bat_oilo2_vdrp1_en,6,6) |
| 4161 | MAX77779_BFF(max77779_bat_oilo2_cnfg_3_bat_oilo2_vdrp2_en,7,7) |
| 4162 | |
| 4163 | /* |
| 4164 | * CHG_CUST_TM,0x2E,0b00000000,0x0,Reset_Type:O |
| 4165 | * BAT_OILO2_CTM,BAT_OILO1_CTM,SYS_UVLO2_CTM,SYS_UVLO1_CTM,SPR_7_4[4:4] |
| 4166 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4167 | #define MAX77779_CHG_CUST_TM 0xde |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4168 | #define MAX77779_CHG_CUST_TM_BAT_OILO2_CTM_SHIFT 0 |
| 4169 | #define MAX77779_CHG_CUST_TM_BAT_OILO2_CTM_MASK (0x1 << 0) |
| 4170 | #define MAX77779_CHG_CUST_TM_BAT_OILO2_CTM_CLEAR (~(0x1 << 0)) |
| 4171 | #define MAX77779_CHG_CUST_TM_BAT_OILO1_CTM_SHIFT 1 |
| 4172 | #define MAX77779_CHG_CUST_TM_BAT_OILO1_CTM_MASK (0x1 << 1) |
| 4173 | #define MAX77779_CHG_CUST_TM_BAT_OILO1_CTM_CLEAR (~(0x1 << 1)) |
| 4174 | #define MAX77779_CHG_CUST_TM_SYS_UVLO2_CTM_SHIFT 2 |
| 4175 | #define MAX77779_CHG_CUST_TM_SYS_UVLO2_CTM_MASK (0x1 << 2) |
| 4176 | #define MAX77779_CHG_CUST_TM_SYS_UVLO2_CTM_CLEAR (~(0x1 << 2)) |
| 4177 | #define MAX77779_CHG_CUST_TM_SYS_UVLO1_CTM_SHIFT 3 |
| 4178 | #define MAX77779_CHG_CUST_TM_SYS_UVLO1_CTM_MASK (0x1 << 3) |
| 4179 | #define MAX77779_CHG_CUST_TM_SYS_UVLO1_CTM_CLEAR (~(0x1 << 3)) |
| 4180 | #define MAX77779_CHG_CUST_TM_SPR_7_4_SHIFT 4 |
| 4181 | #define MAX77779_CHG_CUST_TM_SPR_7_4_MASK (0xf << 4) |
| 4182 | #define MAX77779_CHG_CUST_TM_SPR_7_4_CLEAR (~(0xf << 4)) |
| 4183 | static inline const char * |
| 4184 | max77779_chg_cust_tm_cstr(char *buff, size_t len, int val) |
| 4185 | { |
| 4186 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4187 | int i = 0; |
| 4188 | |
| 4189 | i += scnprintf(&buff[i], len - i, " BAT_OILO2_CTM=%x", |
| 4190 | FIELD2VALUE(MAX77779_BAT_OILO2_CTM, val)); |
| 4191 | i += scnprintf(&buff[i], len - i, " BAT_OILO1_CTM=%x", |
| 4192 | FIELD2VALUE(MAX77779_BAT_OILO1_CTM, val)); |
| 4193 | i += scnprintf(&buff[i], len - i, " SYS_UVLO2_CTM=%x", |
| 4194 | FIELD2VALUE(MAX77779_SYS_UVLO2_CTM, val)); |
| 4195 | i += scnprintf(&buff[i], len - i, " SYS_UVLO1_CTM=%x", |
| 4196 | FIELD2VALUE(MAX77779_SYS_UVLO1_CTM, val)); |
| 4197 | i += scnprintf(&buff[i], len - i, " SPR_7_4=%x", |
| 4198 | FIELD2VALUE(MAX77779_SPR_7_4, val)); |
| 4199 | #else |
| 4200 | buff[0] = 0; |
| 4201 | #endif |
| 4202 | return buff; |
| 4203 | } |
| 4204 | |
| 4205 | MAX77779_BFF(max77779_chg_cust_tm_bat_oilo2_ctm,0,0) |
| 4206 | MAX77779_BFF(max77779_chg_cust_tm_bat_oilo1_ctm,1,1) |
| 4207 | MAX77779_BFF(max77779_chg_cust_tm_sys_uvlo2_ctm,2,2) |
| 4208 | MAX77779_BFF(max77779_chg_cust_tm_sys_uvlo1_ctm,3,3) |
| 4209 | MAX77779_BFF(max77779_chg_cust_tm_spr_7_4,7,4) |
| 4210 | /* |
| 4211 | * Section: FG_RAM 0x00 16 |
| 4212 | */ |
| 4213 | |
| 4214 | /* |
| 4215 | * Section: FG_FUNC 0xE0 16 |
| 4216 | */ |
| 4217 | |
| 4218 | |
| 4219 | /* |
| 4220 | * FG_INT_STS,0x00,0b00000010,0x2,Reset_Type:F |
| 4221 | * Spare_int_0,PONR,Imn,Bst,CmdFwDone,ThmHot,Imx,dSOCi,Vmn,Tmn,Smn,Bi, |
| 4222 | * Vmx,Tmx,Smx,Br |
| 4223 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4224 | #define MAX77779_M5_FG_INT_STS 0xe0 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4225 | #define MAX77779_M5_FG_INT_STS_Spare_int_0_SHIFT 0 |
| 4226 | #define MAX77779_M5_FG_INT_STS_Spare_int_0_MASK (0x1 << 0) |
| 4227 | #define MAX77779_M5_FG_INT_STS_Spare_int_0_CLEAR (~(0x1 << 0)) |
| 4228 | #define MAX77779_M5_FG_INT_STS_PONR_SHIFT 1 |
| 4229 | #define MAX77779_M5_FG_INT_STS_PONR_MASK (0x1 << 1) |
| 4230 | #define MAX77779_M5_FG_INT_STS_PONR_CLEAR (~(0x1 << 1)) |
| 4231 | #define MAX77779_M5_FG_INT_STS_Imn_SHIFT 2 |
| 4232 | #define MAX77779_M5_FG_INT_STS_Imn_MASK (0x1 << 2) |
| 4233 | #define MAX77779_M5_FG_INT_STS_Imn_CLEAR (~(0x1 << 2)) |
| 4234 | #define MAX77779_M5_FG_INT_STS_Bst_SHIFT 3 |
| 4235 | #define MAX77779_M5_FG_INT_STS_Bst_MASK (0x1 << 3) |
| 4236 | #define MAX77779_M5_FG_INT_STS_Bst_CLEAR (~(0x1 << 3)) |
| 4237 | #define MAX77779_M5_FG_INT_STS_CmdFwDone_SHIFT 4 |
| 4238 | #define MAX77779_M5_FG_INT_STS_CmdFwDone_MASK (0x1 << 4) |
| 4239 | #define MAX77779_M5_FG_INT_STS_CmdFwDone_CLEAR (~(0x1 << 4)) |
| 4240 | #define MAX77779_M5_FG_INT_STS_ThmHot_SHIFT 5 |
| 4241 | #define MAX77779_M5_FG_INT_STS_ThmHot_MASK (0x1 << 5) |
| 4242 | #define MAX77779_M5_FG_INT_STS_ThmHot_CLEAR (~(0x1 << 5)) |
| 4243 | #define MAX77779_M5_FG_INT_STS_Imx_SHIFT 6 |
| 4244 | #define MAX77779_M5_FG_INT_STS_Imx_MASK (0x1 << 6) |
| 4245 | #define MAX77779_M5_FG_INT_STS_Imx_CLEAR (~(0x1 << 6)) |
| 4246 | #define MAX77779_M5_FG_INT_STS_dSOCi_SHIFT 7 |
| 4247 | #define MAX77779_M5_FG_INT_STS_dSOCi_MASK (0x1 << 7) |
| 4248 | #define MAX77779_M5_FG_INT_STS_dSOCi_CLEAR (~(0x1 << 7)) |
| 4249 | #define MAX77779_M5_FG_INT_STS_Vmn_SHIFT 8 |
| 4250 | #define MAX77779_M5_FG_INT_STS_Vmn_MASK (0x1 << 8) |
| 4251 | #define MAX77779_M5_FG_INT_STS_Vmn_CLEAR (~(0x1 << 8)) |
| 4252 | #define MAX77779_M5_FG_INT_STS_Tmn_SHIFT 9 |
| 4253 | #define MAX77779_M5_FG_INT_STS_Tmn_MASK (0x1 << 9) |
| 4254 | #define MAX77779_M5_FG_INT_STS_Tmn_CLEAR (~(0x1 << 9)) |
| 4255 | #define MAX77779_M5_FG_INT_STS_Smn_SHIFT 10 |
| 4256 | #define MAX77779_M5_FG_INT_STS_Smn_MASK (0x1 << 10) |
| 4257 | #define MAX77779_M5_FG_INT_STS_Smn_CLEAR (~(0x1 << 10)) |
| 4258 | #define MAX77779_M5_FG_INT_STS_Bi_SHIFT 11 |
| 4259 | #define MAX77779_M5_FG_INT_STS_Bi_MASK (0x1 << 11) |
| 4260 | #define MAX77779_M5_FG_INT_STS_Bi_CLEAR (~(0x1 << 11)) |
| 4261 | #define MAX77779_M5_FG_INT_STS_Vmx_SHIFT 12 |
| 4262 | #define MAX77779_M5_FG_INT_STS_Vmx_MASK (0x1 << 12) |
| 4263 | #define MAX77779_M5_FG_INT_STS_Vmx_CLEAR (~(0x1 << 12)) |
| 4264 | #define MAX77779_M5_FG_INT_STS_Tmx_SHIFT 13 |
| 4265 | #define MAX77779_M5_FG_INT_STS_Tmx_MASK (0x1 << 13) |
| 4266 | #define MAX77779_M5_FG_INT_STS_Tmx_CLEAR (~(0x1 << 13)) |
| 4267 | #define MAX77779_M5_FG_INT_STS_Smx_SHIFT 14 |
| 4268 | #define MAX77779_M5_FG_INT_STS_Smx_MASK (0x1 << 14) |
| 4269 | #define MAX77779_M5_FG_INT_STS_Smx_CLEAR (~(0x1 << 14)) |
| 4270 | #define MAX77779_M5_FG_INT_STS_Br_SHIFT 15 |
| 4271 | #define MAX77779_M5_FG_INT_STS_Br_MASK (0x1 << 15) |
| 4272 | #define MAX77779_M5_FG_INT_STS_Br_CLEAR (~(0x1 << 15)) |
| 4273 | static inline const char * |
| 4274 | max77779_m5_fg_int_sts_cstr(char *buff, size_t len, int val) |
| 4275 | { |
| 4276 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4277 | int i = 0; |
| 4278 | |
| 4279 | i += scnprintf(&buff[i], len - i, " Spare_int_0=%x", |
| 4280 | FIELD2VALUE(MAX77779_Spare_int_0, val)); |
| 4281 | i += scnprintf(&buff[i], len - i, " PONR=%x", |
| 4282 | FIELD2VALUE(MAX77779_PONR, val)); |
| 4283 | i += scnprintf(&buff[i], len - i, " Imn=%x", |
| 4284 | FIELD2VALUE(MAX77779_Imn, val)); |
| 4285 | i += scnprintf(&buff[i], len - i, " Bst=%x", |
| 4286 | FIELD2VALUE(MAX77779_Bst, val)); |
| 4287 | i += scnprintf(&buff[i], len - i, " CmdFwDone=%x", |
| 4288 | FIELD2VALUE(MAX77779_CmdFwDone, val)); |
| 4289 | i += scnprintf(&buff[i], len - i, " ThmHot=%x", |
| 4290 | FIELD2VALUE(MAX77779_ThmHot, val)); |
| 4291 | i += scnprintf(&buff[i], len - i, " Imx=%x", |
| 4292 | FIELD2VALUE(MAX77779_Imx, val)); |
| 4293 | i += scnprintf(&buff[i], len - i, " dSOCi=%x", |
| 4294 | FIELD2VALUE(MAX77779_dSOCi, val)); |
| 4295 | i += scnprintf(&buff[i], len - i, " Vmn=%x", |
| 4296 | FIELD2VALUE(MAX77779_Vmn, val)); |
| 4297 | i += scnprintf(&buff[i], len - i, " Tmn=%x", |
| 4298 | FIELD2VALUE(MAX77779_Tmn, val)); |
| 4299 | i += scnprintf(&buff[i], len - i, " Smn=%x", |
| 4300 | FIELD2VALUE(MAX77779_Smn, val)); |
| 4301 | i += scnprintf(&buff[i], len - i, " Bi=%x", |
| 4302 | FIELD2VALUE(MAX77779_Bi, val)); |
| 4303 | i += scnprintf(&buff[i], len - i, " Vmx=%x", |
| 4304 | FIELD2VALUE(MAX77779_Vmx, val)); |
| 4305 | i += scnprintf(&buff[i], len - i, " Tmx=%x", |
| 4306 | FIELD2VALUE(MAX77779_Tmx, val)); |
| 4307 | i += scnprintf(&buff[i], len - i, " Smx=%x", |
| 4308 | FIELD2VALUE(MAX77779_Smx, val)); |
| 4309 | i += scnprintf(&buff[i], len - i, " Br=%x", |
| 4310 | FIELD2VALUE(MAX77779_Br, val)); |
| 4311 | #else |
| 4312 | buff[0] = 0; |
| 4313 | #endif |
| 4314 | return buff; |
| 4315 | } |
| 4316 | |
| 4317 | MAX77779_BFF(max77779_m5_fg_int_sts_spare_int_0,0,0) |
| 4318 | MAX77779_BFF(max77779_m5_fg_int_sts_ponr,1,1) |
| 4319 | MAX77779_BFF(max77779_m5_fg_int_sts_imn,2,2) |
| 4320 | MAX77779_BFF(max77779_m5_fg_int_sts_bst,3,3) |
| 4321 | MAX77779_BFF(max77779_m5_fg_int_sts_cmdfwdone,4,4) |
| 4322 | MAX77779_BFF(max77779_m5_fg_int_sts_thmhot,5,5) |
| 4323 | MAX77779_BFF(max77779_m5_fg_int_sts_imx,6,6) |
| 4324 | MAX77779_BFF(max77779_m5_fg_int_sts_dsoci,7,7) |
| 4325 | MAX77779_BFF(max77779_m5_fg_int_sts_vmn,8,8) |
| 4326 | MAX77779_BFF(max77779_m5_fg_int_sts_tmn,9,9) |
| 4327 | MAX77779_BFF(max77779_m5_fg_int_sts_smn,10,10) |
| 4328 | MAX77779_BFF(max77779_m5_fg_int_sts_bi,11,11) |
| 4329 | MAX77779_BFF(max77779_m5_fg_int_sts_vmx,12,12) |
| 4330 | MAX77779_BFF(max77779_m5_fg_int_sts_tmx,13,13) |
| 4331 | MAX77779_BFF(max77779_m5_fg_int_sts_smx,14,14) |
| 4332 | MAX77779_BFF(max77779_m5_fg_int_sts_br,15,15) |
| 4333 | |
| 4334 | /* |
| 4335 | * Mask,0x01,0b00000010,0x2,Reset_Type:F |
| 4336 | * Spare_int_0_m,POR_m,Imn_m,Bst_m,CmdFwDone_m,ThmHot_m,Imx_m,dSOCi_m, |
| 4337 | * Vmn_m,Tmn_m,Smn_m,Bi_m,Vmx_m,Tmx_m,Smx_m,Br_m |
| 4338 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4339 | #define MAX77779_M5_Mask 0xe1 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4340 | #define MAX77779_M5_Mask_Spare_int_0_m_SHIFT 0 |
| 4341 | #define MAX77779_M5_Mask_Spare_int_0_m_MASK (0x1 << 0) |
| 4342 | #define MAX77779_M5_Mask_Spare_int_0_m_CLEAR (~(0x1 << 0)) |
| 4343 | #define MAX77779_M5_Mask_POR_m_SHIFT 1 |
| 4344 | #define MAX77779_M5_Mask_POR_m_MASK (0x1 << 1) |
| 4345 | #define MAX77779_M5_Mask_POR_m_CLEAR (~(0x1 << 1)) |
| 4346 | #define MAX77779_M5_Mask_Imn_m_SHIFT 2 |
| 4347 | #define MAX77779_M5_Mask_Imn_m_MASK (0x1 << 2) |
| 4348 | #define MAX77779_M5_Mask_Imn_m_CLEAR (~(0x1 << 2)) |
| 4349 | #define MAX77779_M5_Mask_Bst_m_SHIFT 3 |
| 4350 | #define MAX77779_M5_Mask_Bst_m_MASK (0x1 << 3) |
| 4351 | #define MAX77779_M5_Mask_Bst_m_CLEAR (~(0x1 << 3)) |
| 4352 | #define MAX77779_M5_Mask_CmdFwDone_m_SHIFT 4 |
| 4353 | #define MAX77779_M5_Mask_CmdFwDone_m_MASK (0x1 << 4) |
| 4354 | #define MAX77779_M5_Mask_CmdFwDone_m_CLEAR (~(0x1 << 4)) |
| 4355 | #define MAX77779_M5_Mask_ThmHot_m_SHIFT 5 |
| 4356 | #define MAX77779_M5_Mask_ThmHot_m_MASK (0x1 << 5) |
| 4357 | #define MAX77779_M5_Mask_ThmHot_m_CLEAR (~(0x1 << 5)) |
| 4358 | #define MAX77779_M5_Mask_Imx_m_SHIFT 6 |
| 4359 | #define MAX77779_M5_Mask_Imx_m_MASK (0x1 << 6) |
| 4360 | #define MAX77779_M5_Mask_Imx_m_CLEAR (~(0x1 << 6)) |
| 4361 | #define MAX77779_M5_Mask_dSOCi_m_SHIFT 7 |
| 4362 | #define MAX77779_M5_Mask_dSOCi_m_MASK (0x1 << 7) |
| 4363 | #define MAX77779_M5_Mask_dSOCi_m_CLEAR (~(0x1 << 7)) |
| 4364 | #define MAX77779_M5_Mask_Vmn_m_SHIFT 8 |
| 4365 | #define MAX77779_M5_Mask_Vmn_m_MASK (0x1 << 8) |
| 4366 | #define MAX77779_M5_Mask_Vmn_m_CLEAR (~(0x1 << 8)) |
| 4367 | #define MAX77779_M5_Mask_Tmn_m_SHIFT 9 |
| 4368 | #define MAX77779_M5_Mask_Tmn_m_MASK (0x1 << 9) |
| 4369 | #define MAX77779_M5_Mask_Tmn_m_CLEAR (~(0x1 << 9)) |
| 4370 | #define MAX77779_M5_Mask_Smn_m_SHIFT 10 |
| 4371 | #define MAX77779_M5_Mask_Smn_m_MASK (0x1 << 10) |
| 4372 | #define MAX77779_M5_Mask_Smn_m_CLEAR (~(0x1 << 10)) |
| 4373 | #define MAX77779_M5_Mask_Bi_m_SHIFT 11 |
| 4374 | #define MAX77779_M5_Mask_Bi_m_MASK (0x1 << 11) |
| 4375 | #define MAX77779_M5_Mask_Bi_m_CLEAR (~(0x1 << 11)) |
| 4376 | #define MAX77779_M5_Mask_Vmx_m_SHIFT 12 |
| 4377 | #define MAX77779_M5_Mask_Vmx_m_MASK (0x1 << 12) |
| 4378 | #define MAX77779_M5_Mask_Vmx_m_CLEAR (~(0x1 << 12)) |
| 4379 | #define MAX77779_M5_Mask_Tmx_m_SHIFT 13 |
| 4380 | #define MAX77779_M5_Mask_Tmx_m_MASK (0x1 << 13) |
| 4381 | #define MAX77779_M5_Mask_Tmx_m_CLEAR (~(0x1 << 13)) |
| 4382 | #define MAX77779_M5_Mask_Smx_m_SHIFT 14 |
| 4383 | #define MAX77779_M5_Mask_Smx_m_MASK (0x1 << 14) |
| 4384 | #define MAX77779_M5_Mask_Smx_m_CLEAR (~(0x1 << 14)) |
| 4385 | #define MAX77779_M5_Mask_Br_m_SHIFT 15 |
| 4386 | #define MAX77779_M5_Mask_Br_m_MASK (0x1 << 15) |
| 4387 | #define MAX77779_M5_Mask_Br_m_CLEAR (~(0x1 << 15)) |
| 4388 | static inline const char * |
| 4389 | max77779_m5_mask_cstr(char *buff, size_t len, int val) |
| 4390 | { |
| 4391 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4392 | int i = 0; |
| 4393 | |
| 4394 | i += scnprintf(&buff[i], len - i, " Spare_int_0_m=%x", |
| 4395 | FIELD2VALUE(MAX77779_Spare_int_0_m, val)); |
| 4396 | i += scnprintf(&buff[i], len - i, " POR_m=%x", |
| 4397 | FIELD2VALUE(MAX77779_POR_m, val)); |
| 4398 | i += scnprintf(&buff[i], len - i, " Imn_m=%x", |
| 4399 | FIELD2VALUE(MAX77779_Imn_m, val)); |
| 4400 | i += scnprintf(&buff[i], len - i, " Bst_m=%x", |
| 4401 | FIELD2VALUE(MAX77779_Bst_m, val)); |
| 4402 | i += scnprintf(&buff[i], len - i, " CmdFwDone_m=%x", |
| 4403 | FIELD2VALUE(MAX77779_CmdFwDone_m, val)); |
| 4404 | i += scnprintf(&buff[i], len - i, " ThmHot_m=%x", |
| 4405 | FIELD2VALUE(MAX77779_ThmHot_m, val)); |
| 4406 | i += scnprintf(&buff[i], len - i, " Imx_m=%x", |
| 4407 | FIELD2VALUE(MAX77779_Imx_m, val)); |
| 4408 | i += scnprintf(&buff[i], len - i, " dSOCi_m=%x", |
| 4409 | FIELD2VALUE(MAX77779_dSOCi_m, val)); |
| 4410 | i += scnprintf(&buff[i], len - i, " Vmn_m=%x", |
| 4411 | FIELD2VALUE(MAX77779_Vmn_m, val)); |
| 4412 | i += scnprintf(&buff[i], len - i, " Tmn_m=%x", |
| 4413 | FIELD2VALUE(MAX77779_Tmn_m, val)); |
| 4414 | i += scnprintf(&buff[i], len - i, " Smn_m=%x", |
| 4415 | FIELD2VALUE(MAX77779_Smn_m, val)); |
| 4416 | i += scnprintf(&buff[i], len - i, " Bi_m=%x", |
| 4417 | FIELD2VALUE(MAX77779_Bi_m, val)); |
| 4418 | i += scnprintf(&buff[i], len - i, " Vmx_m=%x", |
| 4419 | FIELD2VALUE(MAX77779_Vmx_m, val)); |
| 4420 | i += scnprintf(&buff[i], len - i, " Tmx_m=%x", |
| 4421 | FIELD2VALUE(MAX77779_Tmx_m, val)); |
| 4422 | i += scnprintf(&buff[i], len - i, " Smx_m=%x", |
| 4423 | FIELD2VALUE(MAX77779_Smx_m, val)); |
| 4424 | i += scnprintf(&buff[i], len - i, " Br_m=%x", |
| 4425 | FIELD2VALUE(MAX77779_Br_m, val)); |
| 4426 | #else |
| 4427 | buff[0] = 0; |
| 4428 | #endif |
| 4429 | return buff; |
| 4430 | } |
| 4431 | |
| 4432 | MAX77779_BFF(max77779_m5_mask_spare_int_0_m,0,0) |
| 4433 | MAX77779_BFF(max77779_m5_mask_por_m,1,1) |
| 4434 | MAX77779_BFF(max77779_m5_mask_imn_m,2,2) |
| 4435 | MAX77779_BFF(max77779_m5_mask_bst_m,3,3) |
| 4436 | MAX77779_BFF(max77779_m5_mask_cmdfwdone_m,4,4) |
| 4437 | MAX77779_BFF(max77779_m5_mask_thmhot_m,5,5) |
| 4438 | MAX77779_BFF(max77779_m5_mask_imx_m,6,6) |
| 4439 | MAX77779_BFF(max77779_m5_mask_dsoci_m,7,7) |
| 4440 | MAX77779_BFF(max77779_m5_mask_vmn_m,8,8) |
| 4441 | MAX77779_BFF(max77779_m5_mask_tmn_m,9,9) |
| 4442 | MAX77779_BFF(max77779_m5_mask_smn_m,10,10) |
| 4443 | MAX77779_BFF(max77779_m5_mask_bi_m,11,11) |
| 4444 | MAX77779_BFF(max77779_m5_mask_vmx_m,12,12) |
| 4445 | MAX77779_BFF(max77779_m5_mask_tmx_m,13,13) |
| 4446 | MAX77779_BFF(max77779_m5_mask_smx_m,14,14) |
| 4447 | MAX77779_BFF(max77779_m5_mask_br_m,15,15) |
| 4448 | |
| 4449 | /* |
| 4450 | * Command_fw,0x09,0b00000000,0x0,Reset_Type:F |
| 4451 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4452 | #define MAX77779_M5_Command_fw 0xe9 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4453 | |
| 4454 | /* |
| 4455 | * Command_ack,0x0A,0b00000000,0x0,Reset_Type:F |
| 4456 | * CMD_FW_BUSY |
| 4457 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4458 | #define MAX77779_M5_Command_ack 0xea |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4459 | #define MAX77779_M5_Command_ack_CMD_FW_BUSY_SHIFT 0 |
| 4460 | #define MAX77779_M5_Command_ack_CMD_FW_BUSY_MASK (0x1 << 0) |
| 4461 | #define MAX77779_M5_Command_ack_CMD_FW_BUSY_CLEAR (~(0x1 << 0)) |
| 4462 | static inline const char * |
| 4463 | max77779_m5_command_ack_cstr(char *buff, size_t len, int val) |
| 4464 | { |
| 4465 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4466 | int i = 0; |
| 4467 | |
| 4468 | i += scnprintf(&buff[i], len - i, " CMD_FW_BUSY=%x", |
| 4469 | FIELD2VALUE(MAX77779_CMD_FW_BUSY, val)); |
| 4470 | #else |
| 4471 | buff[0] = 0; |
| 4472 | #endif |
| 4473 | return buff; |
| 4474 | } |
| 4475 | |
| 4476 | MAX77779_BFF(max77779_m5_command_ack_cmd_fw_busy,0,0) |
| 4477 | |
| 4478 | /* |
| 4479 | * USR,0x1F,0b00001110,0xe,Reset_Type:F |
| 4480 | * NLOCK,VLOCK,RLOCK,SPR_USR_0[4:12] |
| 4481 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4482 | #define MAX77779_M5_USR 0xff |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4483 | #define MAX77779_M5_USR_NLOCK_SHIFT 1 |
| 4484 | #define MAX77779_M5_USR_NLOCK_MASK (0x1 << 1) |
| 4485 | #define MAX77779_M5_USR_NLOCK_CLEAR (~(0x1 << 1)) |
| 4486 | #define MAX77779_M5_USR_VLOCK_SHIFT 2 |
| 4487 | #define MAX77779_M5_USR_VLOCK_MASK (0x1 << 2) |
| 4488 | #define MAX77779_M5_USR_VLOCK_CLEAR (~(0x1 << 2)) |
| 4489 | #define MAX77779_M5_USR_RLOCK_SHIFT 3 |
| 4490 | #define MAX77779_M5_USR_RLOCK_MASK (0x1 << 3) |
| 4491 | #define MAX77779_M5_USR_RLOCK_CLEAR (~(0x1 << 3)) |
| 4492 | #define MAX77779_M5_USR_SPR_USR_0_SHIFT 4 |
| 4493 | #define MAX77779_M5_USR_SPR_USR_0_MASK (0xfff << 4) |
| 4494 | #define MAX77779_M5_USR_SPR_USR_0_CLEAR (~(0xfff << 4)) |
| 4495 | static inline const char * |
| 4496 | max77779_m5_usr_cstr(char *buff, size_t len, int val) |
| 4497 | { |
| 4498 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4499 | int i = 0; |
| 4500 | |
| 4501 | i += scnprintf(&buff[i], len - i, " NLOCK=%x", |
| 4502 | FIELD2VALUE(MAX77779_NLOCK, val)); |
| 4503 | i += scnprintf(&buff[i], len - i, " VLOCK=%x", |
| 4504 | FIELD2VALUE(MAX77779_VLOCK, val)); |
| 4505 | i += scnprintf(&buff[i], len - i, " RLOCK=%x", |
| 4506 | FIELD2VALUE(MAX77779_RLOCK, val)); |
| 4507 | i += scnprintf(&buff[i], len - i, " SPR_USR_0=%x", |
| 4508 | FIELD2VALUE(MAX77779_SPR_USR_0, val)); |
| 4509 | #else |
| 4510 | buff[0] = 0; |
| 4511 | #endif |
| 4512 | return buff; |
| 4513 | } |
| 4514 | |
| 4515 | MAX77779_BFF(max77779_m5_usr_nlock,1,1) |
| 4516 | MAX77779_BFF(max77779_m5_usr_vlock,2,2) |
| 4517 | MAX77779_BFF(max77779_m5_usr_rlock,3,3) |
| 4518 | MAX77779_BFF(max77779_m5_usr_spr_usr_0,15,4) |
| 4519 | /* |
| 4520 | * Section: I2C_Master 0x00 8 |
| 4521 | */ |
| 4522 | |
| 4523 | |
| 4524 | /* |
| 4525 | * I2CM_INTERRUPT,0x00,0b00000000,0x0,Reset_Type:IM |
| 4526 | * DONEI,SPR_6_1[1:6],ERRI |
| 4527 | */ |
| 4528 | #define MAX77779_I2CM_INTERRUPT 0x00 |
| 4529 | #define MAX77779_I2CM_INTERRUPT_DONEI_SHIFT 0 |
| 4530 | #define MAX77779_I2CM_INTERRUPT_DONEI_MASK (0x1 << 0) |
| 4531 | #define MAX77779_I2CM_INTERRUPT_DONEI_CLEAR (~(0x1 << 0)) |
| 4532 | #define MAX77779_I2CM_INTERRUPT_SPR_6_1_SHIFT 1 |
| 4533 | #define MAX77779_I2CM_INTERRUPT_SPR_6_1_MASK (0x3f << 1) |
| 4534 | #define MAX77779_I2CM_INTERRUPT_SPR_6_1_CLEAR (~(0x3f << 1)) |
| 4535 | #define MAX77779_I2CM_INTERRUPT_ERRI_SHIFT 7 |
| 4536 | #define MAX77779_I2CM_INTERRUPT_ERRI_MASK (0x1 << 7) |
| 4537 | #define MAX77779_I2CM_INTERRUPT_ERRI_CLEAR (~(0x1 << 7)) |
| 4538 | static inline const char * |
| 4539 | max77779_i2cm_interrupt_cstr(char *buff, size_t len, int val) |
| 4540 | { |
| 4541 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4542 | int i = 0; |
| 4543 | |
| 4544 | i += scnprintf(&buff[i], len - i, " DONEI=%x", |
| 4545 | FIELD2VALUE(MAX77779_DONEI, val)); |
| 4546 | i += scnprintf(&buff[i], len - i, " SPR_6_1=%x", |
| 4547 | FIELD2VALUE(MAX77779_SPR_6_1, val)); |
| 4548 | i += scnprintf(&buff[i], len - i, " ERRI=%x", |
| 4549 | FIELD2VALUE(MAX77779_ERRI, val)); |
| 4550 | #else |
| 4551 | buff[0] = 0; |
| 4552 | #endif |
| 4553 | return buff; |
| 4554 | } |
| 4555 | |
| 4556 | MAX77779_BFF(max77779_i2cm_interrupt_donei,0,0) |
| 4557 | MAX77779_BFF(max77779_i2cm_interrupt_spr_6_1,6,1) |
| 4558 | MAX77779_BFF(max77779_i2cm_interrupt_erri,7,7) |
| 4559 | |
| 4560 | /* |
| 4561 | * I2CM_INTMASK,0x01,0b00000000,0x0,Reset_Type:IM |
| 4562 | * DONEIM,SPR_6_1[1:6],ERRIM |
| 4563 | */ |
| 4564 | #define MAX77779_I2CM_INTMASK 0x01 |
| 4565 | #define MAX77779_I2CM_INTMASK_DONEIM_SHIFT 0 |
| 4566 | #define MAX77779_I2CM_INTMASK_DONEIM_MASK (0x1 << 0) |
| 4567 | #define MAX77779_I2CM_INTMASK_DONEIM_CLEAR (~(0x1 << 0)) |
| 4568 | #define MAX77779_I2CM_INTMASK_SPR_6_1_SHIFT 1 |
| 4569 | #define MAX77779_I2CM_INTMASK_SPR_6_1_MASK (0x3f << 1) |
| 4570 | #define MAX77779_I2CM_INTMASK_SPR_6_1_CLEAR (~(0x3f << 1)) |
| 4571 | #define MAX77779_I2CM_INTMASK_ERRIM_SHIFT 7 |
| 4572 | #define MAX77779_I2CM_INTMASK_ERRIM_MASK (0x1 << 7) |
| 4573 | #define MAX77779_I2CM_INTMASK_ERRIM_CLEAR (~(0x1 << 7)) |
| 4574 | static inline const char * |
| 4575 | max77779_i2cm_intmask_cstr(char *buff, size_t len, int val) |
| 4576 | { |
| 4577 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4578 | int i = 0; |
| 4579 | |
| 4580 | i += scnprintf(&buff[i], len - i, " DONEIM=%x", |
| 4581 | FIELD2VALUE(MAX77779_DONEIM, val)); |
| 4582 | i += scnprintf(&buff[i], len - i, " SPR_6_1=%x", |
| 4583 | FIELD2VALUE(MAX77779_SPR_6_1, val)); |
| 4584 | i += scnprintf(&buff[i], len - i, " ERRIM=%x", |
| 4585 | FIELD2VALUE(MAX77779_ERRIM, val)); |
| 4586 | #else |
| 4587 | buff[0] = 0; |
| 4588 | #endif |
| 4589 | return buff; |
| 4590 | } |
| 4591 | |
| 4592 | MAX77779_BFF(max77779_i2cm_intmask_doneim,0,0) |
| 4593 | MAX77779_BFF(max77779_i2cm_intmask_spr_6_1,6,1) |
| 4594 | MAX77779_BFF(max77779_i2cm_intmask_errim,7,7) |
| 4595 | |
| 4596 | /* |
| 4597 | * I2CM_STATUS,0x02,0b00000000,0x0,Reset_Type:IM |
| 4598 | * ERROR[0:7],BUS |
| 4599 | */ |
| 4600 | #define MAX77779_I2CM_STATUS 0x02 |
| 4601 | #define MAX77779_I2CM_STATUS_ERROR_SHIFT 0 |
| 4602 | #define MAX77779_I2CM_STATUS_ERROR_MASK (0x7f << 0) |
| 4603 | #define MAX77779_I2CM_STATUS_ERROR_CLEAR (~(0x7f << 0)) |
| 4604 | #define MAX77779_I2CM_STATUS_BUS_SHIFT 7 |
| 4605 | #define MAX77779_I2CM_STATUS_BUS_MASK (0x1 << 7) |
| 4606 | #define MAX77779_I2CM_STATUS_BUS_CLEAR (~(0x1 << 7)) |
| 4607 | static inline const char * |
| 4608 | max77779_i2cm_status_cstr(char *buff, size_t len, int val) |
| 4609 | { |
| 4610 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4611 | int i = 0; |
| 4612 | |
| 4613 | i += scnprintf(&buff[i], len - i, " ERROR=%x", |
| 4614 | FIELD2VALUE(MAX77779_ERROR, val)); |
| 4615 | i += scnprintf(&buff[i], len - i, " BUS=%x", |
| 4616 | FIELD2VALUE(MAX77779_BUS, val)); |
| 4617 | #else |
| 4618 | buff[0] = 0; |
| 4619 | #endif |
| 4620 | return buff; |
| 4621 | } |
| 4622 | |
| 4623 | MAX77779_BFF(max77779_i2cm_status_error,6,0) |
| 4624 | MAX77779_BFF(max77779_i2cm_status_bus,7,7) |
| 4625 | |
| 4626 | /* |
| 4627 | * I2CM_TIMEOUT,0x03,0b00000000,0x0,Reset_Type:IM |
| 4628 | */ |
| 4629 | #define MAX77779_I2CM_TIMEOUT 0x03 |
| 4630 | |
| 4631 | /* |
| 4632 | * I2CM_CONTROL,0x04,0b11000000,0xc0,Reset_Type:IM |
| 4633 | * I2CEN,CLOCK_SPEED[1:2],OEN,SDA,SCL,SCLO,SDAO |
| 4634 | */ |
| 4635 | #define MAX77779_I2CM_CONTROL 0x04 |
| 4636 | #define MAX77779_I2CM_CONTROL_I2CEN_SHIFT 0 |
| 4637 | #define MAX77779_I2CM_CONTROL_I2CEN_MASK (0x1 << 0) |
| 4638 | #define MAX77779_I2CM_CONTROL_I2CEN_CLEAR (~(0x1 << 0)) |
| 4639 | #define MAX77779_I2CM_CONTROL_CLOCK_SPEED_SHIFT 1 |
| 4640 | #define MAX77779_I2CM_CONTROL_CLOCK_SPEED_MASK (0x3 << 1) |
| 4641 | #define MAX77779_I2CM_CONTROL_CLOCK_SPEED_CLEAR (~(0x3 << 1)) |
| 4642 | #define MAX77779_I2CM_CONTROL_OEN_SHIFT 3 |
| 4643 | #define MAX77779_I2CM_CONTROL_OEN_MASK (0x1 << 3) |
| 4644 | #define MAX77779_I2CM_CONTROL_OEN_CLEAR (~(0x1 << 3)) |
| 4645 | #define MAX77779_I2CM_CONTROL_SDA_SHIFT 4 |
| 4646 | #define MAX77779_I2CM_CONTROL_SDA_MASK (0x1 << 4) |
| 4647 | #define MAX77779_I2CM_CONTROL_SDA_CLEAR (~(0x1 << 4)) |
| 4648 | #define MAX77779_I2CM_CONTROL_SCL_SHIFT 5 |
| 4649 | #define MAX77779_I2CM_CONTROL_SCL_MASK (0x1 << 5) |
| 4650 | #define MAX77779_I2CM_CONTROL_SCL_CLEAR (~(0x1 << 5)) |
| 4651 | #define MAX77779_I2CM_CONTROL_SCLO_SHIFT 6 |
| 4652 | #define MAX77779_I2CM_CONTROL_SCLO_MASK (0x1 << 6) |
| 4653 | #define MAX77779_I2CM_CONTROL_SCLO_CLEAR (~(0x1 << 6)) |
| 4654 | #define MAX77779_I2CM_CONTROL_SDAO_SHIFT 7 |
| 4655 | #define MAX77779_I2CM_CONTROL_SDAO_MASK (0x1 << 7) |
| 4656 | #define MAX77779_I2CM_CONTROL_SDAO_CLEAR (~(0x1 << 7)) |
| 4657 | static inline const char * |
| 4658 | max77779_i2cm_control_cstr(char *buff, size_t len, int val) |
| 4659 | { |
| 4660 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4661 | int i = 0; |
| 4662 | |
| 4663 | i += scnprintf(&buff[i], len - i, " I2CEN=%x", |
| 4664 | FIELD2VALUE(MAX77779_I2CEN, val)); |
| 4665 | i += scnprintf(&buff[i], len - i, " CLOCK_SPEED=%x", |
| 4666 | FIELD2VALUE(MAX77779_CLOCK_SPEED, val)); |
| 4667 | i += scnprintf(&buff[i], len - i, " OEN=%x", |
| 4668 | FIELD2VALUE(MAX77779_OEN, val)); |
| 4669 | i += scnprintf(&buff[i], len - i, " SDA=%x", |
| 4670 | FIELD2VALUE(MAX77779_SDA, val)); |
| 4671 | i += scnprintf(&buff[i], len - i, " SCL=%x", |
| 4672 | FIELD2VALUE(MAX77779_SCL, val)); |
| 4673 | i += scnprintf(&buff[i], len - i, " SCLO=%x", |
| 4674 | FIELD2VALUE(MAX77779_SCLO, val)); |
| 4675 | i += scnprintf(&buff[i], len - i, " SDAO=%x", |
| 4676 | FIELD2VALUE(MAX77779_SDAO, val)); |
| 4677 | #else |
| 4678 | buff[0] = 0; |
| 4679 | #endif |
| 4680 | return buff; |
| 4681 | } |
| 4682 | |
| 4683 | MAX77779_BFF(max77779_i2cm_control_i2cen,0,0) |
| 4684 | MAX77779_BFF(max77779_i2cm_control_clock_speed,2,1) |
| 4685 | MAX77779_BFF(max77779_i2cm_control_oen,3,3) |
| 4686 | MAX77779_BFF(max77779_i2cm_control_sda,4,4) |
| 4687 | MAX77779_BFF(max77779_i2cm_control_scl,5,5) |
| 4688 | MAX77779_BFF(max77779_i2cm_control_sclo,6,6) |
| 4689 | MAX77779_BFF(max77779_i2cm_control_sdao,7,7) |
| 4690 | |
| 4691 | /* |
| 4692 | * I2CM_SLADD,0x05,0b00000000,0x0,Reset_Type:IM |
| 4693 | * SPR_0,SLAVE_ID[1:7] |
| 4694 | */ |
| 4695 | #define MAX77779_I2CM_SLADD 0x05 |
| 4696 | #define MAX77779_I2CM_SLADD_SPR_0_SHIFT 0 |
| 4697 | #define MAX77779_I2CM_SLADD_SPR_0_MASK (0x1 << 0) |
| 4698 | #define MAX77779_I2CM_SLADD_SPR_0_CLEAR (~(0x1 << 0)) |
| 4699 | #define MAX77779_I2CM_SLADD_SLAVE_ID_SHIFT 1 |
| 4700 | #define MAX77779_I2CM_SLADD_SLAVE_ID_MASK (0x7f << 1) |
| 4701 | #define MAX77779_I2CM_SLADD_SLAVE_ID_CLEAR (~(0x7f << 1)) |
| 4702 | static inline const char * |
| 4703 | max77779_i2cm_sladd_cstr(char *buff, size_t len, int val) |
| 4704 | { |
| 4705 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4706 | int i = 0; |
| 4707 | |
| 4708 | i += scnprintf(&buff[i], len - i, " SPR_0=%x", |
| 4709 | FIELD2VALUE(MAX77779_SPR_0, val)); |
| 4710 | i += scnprintf(&buff[i], len - i, " SLAVE_ID=%x", |
| 4711 | FIELD2VALUE(MAX77779_SLAVE_ID, val)); |
| 4712 | #else |
| 4713 | buff[0] = 0; |
| 4714 | #endif |
| 4715 | return buff; |
| 4716 | } |
| 4717 | |
| 4718 | MAX77779_BFF(max77779_i2cm_sladd_spr_0,0,0) |
| 4719 | MAX77779_BFF(max77779_i2cm_sladd_slave_id,7,1) |
| 4720 | |
| 4721 | /* |
| 4722 | * I2CM_TXDATA_CNT,0x06,0b00000000,0x0,Reset_Type:IM |
| 4723 | * TXCNT[0:6],SPR_7_6[6:2] |
| 4724 | */ |
| 4725 | #define MAX77779_I2CM_TXDATA_CNT 0x06 |
| 4726 | #define MAX77779_I2CM_TXDATA_CNT_TXCNT_SHIFT 0 |
| 4727 | #define MAX77779_I2CM_TXDATA_CNT_TXCNT_MASK (0x3f << 0) |
| 4728 | #define MAX77779_I2CM_TXDATA_CNT_TXCNT_CLEAR (~(0x3f << 0)) |
| 4729 | #define MAX77779_I2CM_TXDATA_CNT_SPR_7_6_SHIFT 6 |
| 4730 | #define MAX77779_I2CM_TXDATA_CNT_SPR_7_6_MASK (0x3 << 6) |
| 4731 | #define MAX77779_I2CM_TXDATA_CNT_SPR_7_6_CLEAR (~(0x3 << 6)) |
| 4732 | static inline const char * |
| 4733 | max77779_i2cm_txdata_cnt_cstr(char *buff, size_t len, int val) |
| 4734 | { |
| 4735 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4736 | int i = 0; |
| 4737 | |
| 4738 | i += scnprintf(&buff[i], len - i, " TXCNT=%x", |
| 4739 | FIELD2VALUE(MAX77779_TXCNT, val)); |
| 4740 | i += scnprintf(&buff[i], len - i, " SPR_7_6=%x", |
| 4741 | FIELD2VALUE(MAX77779_SPR_7_6, val)); |
| 4742 | #else |
| 4743 | buff[0] = 0; |
| 4744 | #endif |
| 4745 | return buff; |
| 4746 | } |
| 4747 | |
| 4748 | MAX77779_BFF(max77779_i2cm_txdata_cnt_txcnt,5,0) |
| 4749 | MAX77779_BFF(max77779_i2cm_txdata_cnt_spr_7_6,7,6) |
| 4750 | |
| 4751 | /* |
| 4752 | * I2CM_TX_BUFFER_0,0x07,0b00000000,0x0,Reset_Type:IM |
| 4753 | */ |
| 4754 | #define MAX77779_I2CM_TX_BUFFER_0 0x07 |
| 4755 | |
| 4756 | /* |
| 4757 | * I2CM_TX_BUFFER_1,0x08,0b00000000,0x0,Reset_Type:IM |
| 4758 | */ |
| 4759 | #define MAX77779_I2CM_TX_BUFFER_1 0x08 |
| 4760 | |
| 4761 | /* |
| 4762 | * I2CM_TX_BUFFER_2,0x09,0b00000000,0x0,Reset_Type:IM |
| 4763 | */ |
| 4764 | #define MAX77779_I2CM_TX_BUFFER_2 0x09 |
| 4765 | |
| 4766 | /* |
| 4767 | * I2CM_TX_BUFFER_3,0x0A,0b00000000,0x0,Reset_Type:IM |
| 4768 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4769 | #define MAX77779_I2CM_TX_BUFFER_3 0x0a |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4770 | |
| 4771 | /* |
| 4772 | * I2CM_TX_BUFFER_4,0x0B,0b00000000,0x0,Reset_Type:IM |
| 4773 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4774 | #define MAX77779_I2CM_TX_BUFFER_4 0x0b |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4775 | |
| 4776 | /* |
| 4777 | * I2CM_TX_BUFFER_5,0x0C,0b00000000,0x0,Reset_Type:IM |
| 4778 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4779 | #define MAX77779_I2CM_TX_BUFFER_5 0x0c |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4780 | |
| 4781 | /* |
| 4782 | * I2CM_TX_BUFFER_6,0x0D,0b00000000,0x0,Reset_Type:IM |
| 4783 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4784 | #define MAX77779_I2CM_TX_BUFFER_6 0x0d |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4785 | |
| 4786 | /* |
| 4787 | * I2CM_TX_BUFFER_7,0x0E,0b00000000,0x0,Reset_Type:IM |
| 4788 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4789 | #define MAX77779_I2CM_TX_BUFFER_7 0x0e |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4790 | |
| 4791 | /* |
| 4792 | * I2CM_TX_BUFFER_8,0x0F,0b00000000,0x0,Reset_Type:IM |
| 4793 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4794 | #define MAX77779_I2CM_TX_BUFFER_8 0x0f |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4795 | |
| 4796 | /* |
| 4797 | * I2CM_TX_BUFFER_9,0x10,0b00000000,0x0,Reset_Type:IM |
| 4798 | */ |
| 4799 | #define MAX77779_I2CM_TX_BUFFER_9 0x10 |
| 4800 | |
| 4801 | /* |
| 4802 | * I2CM_TX_BUFFER_10,0x11,0b00000000,0x0,Reset_Type:IM |
| 4803 | */ |
| 4804 | #define MAX77779_I2CM_TX_BUFFER_10 0x11 |
| 4805 | |
| 4806 | /* |
| 4807 | * I2CM_TX_BUFFER_11,0x12,0b00000000,0x0,Reset_Type:IM |
| 4808 | */ |
| 4809 | #define MAX77779_I2CM_TX_BUFFER_11 0x12 |
| 4810 | |
| 4811 | /* |
| 4812 | * I2CM_TX_BUFFER_12,0x13,0b00000000,0x0,Reset_Type:IM |
| 4813 | */ |
| 4814 | #define MAX77779_I2CM_TX_BUFFER_12 0x13 |
| 4815 | |
| 4816 | /* |
| 4817 | * I2CM_TX_BUFFER_13,0x14,0b00000000,0x0,Reset_Type:IM |
| 4818 | */ |
| 4819 | #define MAX77779_I2CM_TX_BUFFER_13 0x14 |
| 4820 | |
| 4821 | /* |
| 4822 | * I2CM_TX_BUFFER_14,0x15,0b00000000,0x0,Reset_Type:IM |
| 4823 | */ |
| 4824 | #define MAX77779_I2CM_TX_BUFFER_14 0x15 |
| 4825 | |
| 4826 | /* |
| 4827 | * I2CM_TX_BUFFER_15,0x16,0b00000000,0x0,Reset_Type:IM |
| 4828 | */ |
| 4829 | #define MAX77779_I2CM_TX_BUFFER_15 0x16 |
| 4830 | |
| 4831 | /* |
| 4832 | * I2CM_TX_BUFFER_16,0x17,0b00000000,0x0,Reset_Type:IM |
| 4833 | */ |
| 4834 | #define MAX77779_I2CM_TX_BUFFER_16 0x17 |
| 4835 | |
| 4836 | /* |
| 4837 | * I2CM_TX_BUFFER_17,0x18,0b00000000,0x0,Reset_Type:IM |
| 4838 | */ |
| 4839 | #define MAX77779_I2CM_TX_BUFFER_17 0x18 |
| 4840 | |
| 4841 | /* |
| 4842 | * I2CM_TX_BUFFER_18,0x19,0b00000000,0x0,Reset_Type:IM |
| 4843 | */ |
| 4844 | #define MAX77779_I2CM_TX_BUFFER_18 0x19 |
| 4845 | |
| 4846 | /* |
| 4847 | * I2CM_TX_BUFFER_19,0x1A,0b00000000,0x0,Reset_Type:IM |
| 4848 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4849 | #define MAX77779_I2CM_TX_BUFFER_19 0x1a |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4850 | |
| 4851 | /* |
| 4852 | * I2CM_TX_BUFFER_20,0x1B,0b00000000,0x0,Reset_Type:IM |
| 4853 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4854 | #define MAX77779_I2CM_TX_BUFFER_20 0x1b |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4855 | |
| 4856 | /* |
| 4857 | * I2CM_TX_BUFFER_21,0x1C,0b00000000,0x0,Reset_Type:IM |
| 4858 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4859 | #define MAX77779_I2CM_TX_BUFFER_21 0x1c |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4860 | |
| 4861 | /* |
| 4862 | * I2CM_TX_BUFFER_22,0x1D,0b00000000,0x0,Reset_Type:IM |
| 4863 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4864 | #define MAX77779_I2CM_TX_BUFFER_22 0x1d |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4865 | |
| 4866 | /* |
| 4867 | * I2CM_TX_BUFFER_23,0x1E,0b00000000,0x0,Reset_Type:IM |
| 4868 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4869 | #define MAX77779_I2CM_TX_BUFFER_23 0x1e |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4870 | |
| 4871 | /* |
| 4872 | * I2CM_TX_BUFFER_24,0x1F,0b00000000,0x0,Reset_Type:IM |
| 4873 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4874 | #define MAX77779_I2CM_TX_BUFFER_24 0x1f |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4875 | |
| 4876 | /* |
| 4877 | * I2CM_TX_BUFFER_25,0x20,0b00000000,0x0,Reset_Type:IM |
| 4878 | */ |
| 4879 | #define MAX77779_I2CM_TX_BUFFER_25 0x20 |
| 4880 | |
| 4881 | /* |
| 4882 | * I2CM_TX_BUFFER_26,0x21,0b00000000,0x0,Reset_Type:IM |
| 4883 | */ |
| 4884 | #define MAX77779_I2CM_TX_BUFFER_26 0x21 |
| 4885 | |
| 4886 | /* |
| 4887 | * I2CM_TX_BUFFER_27,0x22,0b00000000,0x0,Reset_Type:IM |
| 4888 | */ |
| 4889 | #define MAX77779_I2CM_TX_BUFFER_27 0x22 |
| 4890 | |
| 4891 | /* |
| 4892 | * I2CM_TX_BUFFER_28,0x23,0b00000000,0x0,Reset_Type:IM |
| 4893 | */ |
| 4894 | #define MAX77779_I2CM_TX_BUFFER_28 0x23 |
| 4895 | |
| 4896 | /* |
| 4897 | * I2CM_TX_BUFFER_29,0x24,0b00000000,0x0,Reset_Type:IM |
| 4898 | */ |
| 4899 | #define MAX77779_I2CM_TX_BUFFER_29 0x24 |
| 4900 | |
| 4901 | /* |
| 4902 | * I2CM_TX_BUFFER_30,0x25,0b00000000,0x0,Reset_Type:IM |
| 4903 | */ |
| 4904 | #define MAX77779_I2CM_TX_BUFFER_30 0x25 |
| 4905 | |
| 4906 | /* |
| 4907 | * I2CM_TX_BUFFER_31,0x26,0b00000000,0x0,Reset_Type:IM |
| 4908 | */ |
| 4909 | #define MAX77779_I2CM_TX_BUFFER_31 0x26 |
| 4910 | |
| 4911 | /* |
| 4912 | * I2CM_TX_BUFFER_32,0x27,0b00000000,0x0,Reset_Type:IM |
| 4913 | */ |
| 4914 | #define MAX77779_I2CM_TX_BUFFER_32 0x27 |
| 4915 | |
| 4916 | /* |
| 4917 | * I2CM_TX_BUFFER_33,0x28,0b00000000,0x0,Reset_Type:IM |
| 4918 | */ |
| 4919 | #define MAX77779_I2CM_TX_BUFFER_33 0x28 |
| 4920 | |
| 4921 | /* |
| 4922 | * I2CM_RXDATA_CNT,0x29,0b00000000,0x0,Reset_Type:IM |
| 4923 | * RXCNT[0:5],SPR_7_5[5:3] |
| 4924 | */ |
| 4925 | #define MAX77779_I2CM_RXDATA_CNT 0x29 |
| 4926 | #define MAX77779_I2CM_RXDATA_CNT_RXCNT_SHIFT 0 |
| 4927 | #define MAX77779_I2CM_RXDATA_CNT_RXCNT_MASK (0x1f << 0) |
| 4928 | #define MAX77779_I2CM_RXDATA_CNT_RXCNT_CLEAR (~(0x1f << 0)) |
| 4929 | #define MAX77779_I2CM_RXDATA_CNT_SPR_7_5_SHIFT 5 |
| 4930 | #define MAX77779_I2CM_RXDATA_CNT_SPR_7_5_MASK (0x7 << 5) |
| 4931 | #define MAX77779_I2CM_RXDATA_CNT_SPR_7_5_CLEAR (~(0x7 << 5)) |
| 4932 | static inline const char * |
| 4933 | max77779_i2cm_rxdata_cnt_cstr(char *buff, size_t len, int val) |
| 4934 | { |
| 4935 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4936 | int i = 0; |
| 4937 | |
| 4938 | i += scnprintf(&buff[i], len - i, " RXCNT=%x", |
| 4939 | FIELD2VALUE(MAX77779_RXCNT, val)); |
| 4940 | i += scnprintf(&buff[i], len - i, " SPR_7_5=%x", |
| 4941 | FIELD2VALUE(MAX77779_SPR_7_5, val)); |
| 4942 | #else |
| 4943 | buff[0] = 0; |
| 4944 | #endif |
| 4945 | return buff; |
| 4946 | } |
| 4947 | |
| 4948 | MAX77779_BFF(max77779_i2cm_rxdata_cnt_rxcnt,4,0) |
| 4949 | MAX77779_BFF(max77779_i2cm_rxdata_cnt_spr_7_5,7,5) |
| 4950 | |
| 4951 | /* |
| 4952 | * I2CM_CMD,0x2A,0b00000000,0x0,Reset_Type:IM |
| 4953 | * I2CMWRITE,I2CMREAD,SPR_7_2[2:6] |
| 4954 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4955 | #define MAX77779_I2CM_CMD 0x2a |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4956 | #define MAX77779_I2CM_CMD_I2CMWRITE_SHIFT 0 |
| 4957 | #define MAX77779_I2CM_CMD_I2CMWRITE_MASK (0x1 << 0) |
| 4958 | #define MAX77779_I2CM_CMD_I2CMWRITE_CLEAR (~(0x1 << 0)) |
| 4959 | #define MAX77779_I2CM_CMD_I2CMREAD_SHIFT 1 |
| 4960 | #define MAX77779_I2CM_CMD_I2CMREAD_MASK (0x1 << 1) |
| 4961 | #define MAX77779_I2CM_CMD_I2CMREAD_CLEAR (~(0x1 << 1)) |
| 4962 | #define MAX77779_I2CM_CMD_SPR_7_2_SHIFT 2 |
| 4963 | #define MAX77779_I2CM_CMD_SPR_7_2_MASK (0x3f << 2) |
| 4964 | #define MAX77779_I2CM_CMD_SPR_7_2_CLEAR (~(0x3f << 2)) |
| 4965 | static inline const char * |
| 4966 | max77779_i2cm_cmd_cstr(char *buff, size_t len, int val) |
| 4967 | { |
| 4968 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 4969 | int i = 0; |
| 4970 | |
| 4971 | i += scnprintf(&buff[i], len - i, " I2CMWRITE=%x", |
| 4972 | FIELD2VALUE(MAX77779_I2CMWRITE, val)); |
| 4973 | i += scnprintf(&buff[i], len - i, " I2CMREAD=%x", |
| 4974 | FIELD2VALUE(MAX77779_I2CMREAD, val)); |
| 4975 | i += scnprintf(&buff[i], len - i, " SPR_7_2=%x", |
| 4976 | FIELD2VALUE(MAX77779_SPR_7_2, val)); |
| 4977 | #else |
| 4978 | buff[0] = 0; |
| 4979 | #endif |
| 4980 | return buff; |
| 4981 | } |
| 4982 | |
| 4983 | MAX77779_BFF(max77779_i2cm_cmd_i2cmwrite,0,0) |
| 4984 | MAX77779_BFF(max77779_i2cm_cmd_i2cmread,1,1) |
| 4985 | MAX77779_BFF(max77779_i2cm_cmd_spr_7_2,7,2) |
| 4986 | |
| 4987 | /* |
| 4988 | * I2CM_RX_BUFFER_0,0x2B,0b00000000,0x0,Reset_Type:IM |
| 4989 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4990 | #define MAX77779_I2CM_RX_BUFFER_0 0x2b |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4991 | |
| 4992 | /* |
| 4993 | * I2CM_RX_BUFFER_1,0x2C,0b00000000,0x0,Reset_Type:IM |
| 4994 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 4995 | #define MAX77779_I2CM_RX_BUFFER_1 0x2c |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 4996 | |
| 4997 | /* |
| 4998 | * I2CM_RX_BUFFER_2,0x2D,0b00000000,0x0,Reset_Type:IM |
| 4999 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5000 | #define MAX77779_I2CM_RX_BUFFER_2 0x2d |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5001 | |
| 5002 | /* |
| 5003 | * I2CM_RX_BUFFER_3,0x2E,0b00000000,0x0,Reset_Type:IM |
| 5004 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5005 | #define MAX77779_I2CM_RX_BUFFER_3 0x2e |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5006 | |
| 5007 | /* |
| 5008 | * I2CM_RX_BUFFER_4,0x2F,0b00000000,0x0,Reset_Type:IM |
| 5009 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5010 | #define MAX77779_I2CM_RX_BUFFER_4 0x2f |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5011 | |
| 5012 | /* |
| 5013 | * I2CM_RX_BUFFER_5,0x30,0b00000000,0x0,Reset_Type:IM |
| 5014 | */ |
| 5015 | #define MAX77779_I2CM_RX_BUFFER_5 0x30 |
| 5016 | |
| 5017 | /* |
| 5018 | * I2CM_RX_BUFFER_6,0x31,0b00000000,0x0,Reset_Type:IM |
| 5019 | */ |
| 5020 | #define MAX77779_I2CM_RX_BUFFER_6 0x31 |
| 5021 | |
| 5022 | /* |
| 5023 | * I2CM_RX_BUFFER_7,0x32,0b00000000,0x0,Reset_Type:IM |
| 5024 | */ |
| 5025 | #define MAX77779_I2CM_RX_BUFFER_7 0x32 |
| 5026 | |
| 5027 | /* |
| 5028 | * I2CM_RX_BUFFER_8,0x33,0b00000000,0x0,Reset_Type:IM |
| 5029 | */ |
| 5030 | #define MAX77779_I2CM_RX_BUFFER_8 0x33 |
| 5031 | |
| 5032 | /* |
| 5033 | * I2CM_RX_BUFFER_9,0x34,0b00000000,0x0,Reset_Type:IM |
| 5034 | */ |
| 5035 | #define MAX77779_I2CM_RX_BUFFER_9 0x34 |
| 5036 | |
| 5037 | /* |
| 5038 | * I2CM_RX_BUFFER_10,0x35,0b00000000,0x0,Reset_Type:IM |
| 5039 | */ |
| 5040 | #define MAX77779_I2CM_RX_BUFFER_10 0x35 |
| 5041 | |
| 5042 | /* |
| 5043 | * I2CM_RX_BUFFER_11,0x36,0b00000000,0x0,Reset_Type:IM |
| 5044 | */ |
| 5045 | #define MAX77779_I2CM_RX_BUFFER_11 0x36 |
| 5046 | |
| 5047 | /* |
| 5048 | * I2CM_RX_BUFFER_12,0x37,0b00000000,0x0,Reset_Type:IM |
| 5049 | */ |
| 5050 | #define MAX77779_I2CM_RX_BUFFER_12 0x37 |
| 5051 | |
| 5052 | /* |
| 5053 | * I2CM_RX_BUFFER_13,0x38,0b00000000,0x0,Reset_Type:IM |
| 5054 | */ |
| 5055 | #define MAX77779_I2CM_RX_BUFFER_13 0x38 |
| 5056 | |
| 5057 | /* |
| 5058 | * I2CM_RX_BUFFER_14,0x39,0b00000000,0x0,Reset_Type:IM |
| 5059 | */ |
| 5060 | #define MAX77779_I2CM_RX_BUFFER_14 0x39 |
| 5061 | |
| 5062 | /* |
| 5063 | * I2CM_RX_BUFFER_15,0x3A,0b00000000,0x0,Reset_Type:IM |
| 5064 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5065 | #define MAX77779_I2CM_RX_BUFFER_15 0x3a |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5066 | |
| 5067 | /* |
| 5068 | * I2CM_RX_BUFFER_16,0x3B,0b00000000,0x0,Reset_Type:IM |
| 5069 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5070 | #define MAX77779_I2CM_RX_BUFFER_16 0x3b |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5071 | |
| 5072 | /* |
| 5073 | * I2CM_RX_BUFFER_17,0x3C,0b00000000,0x0,Reset_Type:IM |
| 5074 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5075 | #define MAX77779_I2CM_RX_BUFFER_17 0x3c |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5076 | |
| 5077 | /* |
| 5078 | * I2CM_RX_BUFFER_18,0x3D,0b00000000,0x0,Reset_Type:IM |
| 5079 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5080 | #define MAX77779_I2CM_RX_BUFFER_18 0x3d |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5081 | |
| 5082 | /* |
| 5083 | * I2CM_RX_BUFFER_19,0x3E,0b00000000,0x0,Reset_Type:IM |
| 5084 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5085 | #define MAX77779_I2CM_RX_BUFFER_19 0x3e |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5086 | |
| 5087 | /* |
| 5088 | * I2CM_RX_BUFFER_20,0x3F,0b00000000,0x0,Reset_Type:IM |
| 5089 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5090 | #define MAX77779_I2CM_RX_BUFFER_20 0x3f |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5091 | |
| 5092 | /* |
| 5093 | * I2CM_RX_BUFFER_21,0x40,0b00000000,0x0,Reset_Type:IM |
| 5094 | */ |
| 5095 | #define MAX77779_I2CM_RX_BUFFER_21 0x40 |
| 5096 | |
| 5097 | /* |
| 5098 | * I2CM_RX_BUFFER_22,0x41,0b00000000,0x0,Reset_Type:IM |
| 5099 | */ |
| 5100 | #define MAX77779_I2CM_RX_BUFFER_22 0x41 |
| 5101 | |
| 5102 | /* |
| 5103 | * I2CM_RX_BUFFER_23,0x42,0b00000000,0x0,Reset_Type:IM |
| 5104 | */ |
| 5105 | #define MAX77779_I2CM_RX_BUFFER_23 0x42 |
| 5106 | |
| 5107 | /* |
| 5108 | * I2CM_RX_BUFFER_24,0x43,0b00000000,0x0,Reset_Type:IM |
| 5109 | */ |
| 5110 | #define MAX77779_I2CM_RX_BUFFER_24 0x43 |
| 5111 | |
| 5112 | /* |
| 5113 | * I2CM_RX_BUFFER_25,0x44,0b00000000,0x0,Reset_Type:IM |
| 5114 | */ |
| 5115 | #define MAX77779_I2CM_RX_BUFFER_25 0x44 |
| 5116 | |
| 5117 | /* |
| 5118 | * I2CM_RX_BUFFER_26,0x45,0b00000000,0x0,Reset_Type:IM |
| 5119 | */ |
| 5120 | #define MAX77779_I2CM_RX_BUFFER_26 0x45 |
| 5121 | |
| 5122 | /* |
| 5123 | * I2CM_RX_BUFFER_27,0x46,0b00000000,0x0,Reset_Type:IM |
| 5124 | */ |
| 5125 | #define MAX77779_I2CM_RX_BUFFER_27 0x46 |
| 5126 | |
| 5127 | /* |
| 5128 | * I2CM_RX_BUFFER_28,0x47,0b00000000,0x0,Reset_Type:IM |
| 5129 | */ |
| 5130 | #define MAX77779_I2CM_RX_BUFFER_28 0x47 |
| 5131 | |
| 5132 | /* |
| 5133 | * I2CM_RX_BUFFER_29,0x48,0b00000000,0x0,Reset_Type:IM |
| 5134 | */ |
| 5135 | #define MAX77779_I2CM_RX_BUFFER_29 0x48 |
| 5136 | |
| 5137 | /* |
| 5138 | * I2CM_RX_BUFFER_30,0x49,0b00000000,0x0,Reset_Type:IM |
| 5139 | */ |
| 5140 | #define MAX77779_I2CM_RX_BUFFER_30 0x49 |
| 5141 | |
| 5142 | /* |
| 5143 | * I2CM_RX_BUFFER_31,0x4A,0b00000000,0x0,Reset_Type:IM |
| 5144 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5145 | #define MAX77779_I2CM_RX_BUFFER_31 0x4a |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5146 | /* |
| 5147 | * Section: BATTVIMON_FUNC 0x00 16 |
| 5148 | */ |
| 5149 | |
| 5150 | |
| 5151 | /* |
| 5152 | * BVIM_INT_STS,0x00,0b00000000,0x0,Reset_Type:F |
| 5153 | * BVIM_Samples_Rdy |
| 5154 | */ |
| 5155 | #define MAX77779_BVIMBVIM_INT_STS 0x00 |
| 5156 | #define MAX77779_BVIMBVIM_INT_STS_BVIM_Samples_Rdy_SHIFT 0 |
| 5157 | #define MAX77779_BVIMBVIM_INT_STS_BVIM_Samples_Rdy_MASK (0x1 << 0) |
| 5158 | #define MAX77779_BVIMBVIM_INT_STS_BVIM_Samples_Rdy_CLEAR (~(0x1 << 0)) |
| 5159 | static inline const char * |
| 5160 | max77779_bvimbvim_int_sts_cstr(char *buff, size_t len, int val) |
| 5161 | { |
| 5162 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 5163 | int i = 0; |
| 5164 | |
| 5165 | i += scnprintf(&buff[i], len - i, " BVIM_Samples_Rdy=%x", |
| 5166 | FIELD2VALUE(MAX77779_BVIM_Samples_Rdy, val)); |
| 5167 | #else |
| 5168 | buff[0] = 0; |
| 5169 | #endif |
| 5170 | return buff; |
| 5171 | } |
| 5172 | |
| 5173 | MAX77779_BFF(max77779_bvimbvim_int_sts_bvim_samples_rdy,0,0) |
| 5174 | |
| 5175 | /* |
| 5176 | * BVIM_MASK,0x01,0b00000001,0x1,Reset_Type:F |
| 5177 | * BVIM_Samples_Rdy_m |
| 5178 | */ |
| 5179 | #define MAX77779_BVIMBVIM_MASK 0x01 |
| 5180 | #define MAX77779_BVIMBVIM_MASK_BVIM_Samples_Rdy_m_SHIFT 0 |
| 5181 | #define MAX77779_BVIMBVIM_MASK_BVIM_Samples_Rdy_m_MASK (0x1 << 0) |
| 5182 | #define MAX77779_BVIMBVIM_MASK_BVIM_Samples_Rdy_m_CLEAR (~(0x1 << 0)) |
| 5183 | static inline const char * |
| 5184 | max77779_bvimbvim_mask_cstr(char *buff, size_t len, int val) |
| 5185 | { |
| 5186 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 5187 | int i = 0; |
| 5188 | |
| 5189 | i += scnprintf(&buff[i], len - i, " BVIM_Samples_Rdy_m=%x", |
| 5190 | FIELD2VALUE(MAX77779_BVIM_Samples_Rdy_m, val)); |
| 5191 | #else |
| 5192 | buff[0] = 0; |
| 5193 | #endif |
| 5194 | return buff; |
| 5195 | } |
| 5196 | |
| 5197 | MAX77779_BFF(max77779_bvimbvim_mask_bvim_samples_rdy_m,0,0) |
| 5198 | |
| 5199 | /* |
| 5200 | * BVIM_CTRL,0x10,0b00000000,0x0,Reset_Type:F |
| 5201 | * BVIMON_TRIG |
| 5202 | */ |
| 5203 | #define MAX77779_BVIMBVIM_CTRL 0x10 |
| 5204 | #define MAX77779_BVIMBVIM_CTRL_BVIMON_TRIG_SHIFT 0 |
| 5205 | #define MAX77779_BVIMBVIM_CTRL_BVIMON_TRIG_MASK (0x1 << 0) |
| 5206 | #define MAX77779_BVIMBVIM_CTRL_BVIMON_TRIG_CLEAR (~(0x1 << 0)) |
| 5207 | static inline const char * |
| 5208 | max77779_bvimbvim_ctrl_cstr(char *buff, size_t len, int val) |
| 5209 | { |
| 5210 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 5211 | int i = 0; |
| 5212 | |
| 5213 | i += scnprintf(&buff[i], len - i, " BVIMON_TRIG=%x", |
| 5214 | FIELD2VALUE(MAX77779_BVIMON_TRIG, val)); |
| 5215 | #else |
| 5216 | buff[0] = 0; |
| 5217 | #endif |
| 5218 | return buff; |
| 5219 | } |
| 5220 | |
| 5221 | MAX77779_BFF(max77779_bvimbvim_ctrl_bvimon_trig,0,0) |
| 5222 | /* |
| 5223 | * Section: BVIM_CONTROL 0x60 16 |
| 5224 | */ |
| 5225 | |
| 5226 | |
| 5227 | /* |
| 5228 | * bvim_cfg,0x00,0b00000000,0x0,Reset_Type:S |
| 5229 | * smpl_n[0:8],smpl_m[8:3],cnt_run |
| 5230 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5231 | #define MAX77779_BVIMbvim_cfg 0x60 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5232 | #define MAX77779_BVIMbvim_cfg_smpl_n_SHIFT 0 |
| 5233 | #define MAX77779_BVIMbvim_cfg_smpl_n_MASK (0xff << 0) |
| 5234 | #define MAX77779_BVIMbvim_cfg_smpl_n_CLEAR (~(0xff << 0)) |
| 5235 | #define MAX77779_BVIMbvim_cfg_smpl_m_SHIFT 8 |
| 5236 | #define MAX77779_BVIMbvim_cfg_smpl_m_MASK (0x7 << 8) |
| 5237 | #define MAX77779_BVIMbvim_cfg_smpl_m_CLEAR (~(0x7 << 8)) |
| 5238 | #define MAX77779_BVIMbvim_cfg_cnt_run_SHIFT 11 |
| 5239 | #define MAX77779_BVIMbvim_cfg_cnt_run_MASK (0x1 << 11) |
| 5240 | #define MAX77779_BVIMbvim_cfg_cnt_run_CLEAR (~(0x1 << 11)) |
| 5241 | static inline const char * |
| 5242 | max77779_bvimbvim_cfg_cstr(char *buff, size_t len, int val) |
| 5243 | { |
| 5244 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 5245 | int i = 0; |
| 5246 | |
| 5247 | i += scnprintf(&buff[i], len - i, " smpl_n=%x", |
| 5248 | FIELD2VALUE(MAX77779_smpl_n, val)); |
| 5249 | i += scnprintf(&buff[i], len - i, " smpl_m=%x", |
| 5250 | FIELD2VALUE(MAX77779_smpl_m, val)); |
| 5251 | i += scnprintf(&buff[i], len - i, " cnt_run=%x", |
| 5252 | FIELD2VALUE(MAX77779_cnt_run, val)); |
| 5253 | #else |
| 5254 | buff[0] = 0; |
| 5255 | #endif |
| 5256 | return buff; |
| 5257 | } |
| 5258 | |
| 5259 | MAX77779_BFF(max77779_bvimbvim_cfg_smpl_n,7,0) |
| 5260 | MAX77779_BFF(max77779_bvimbvim_cfg_smpl_m,10,8) |
| 5261 | MAX77779_BFF(max77779_bvimbvim_cfg_cnt_run,11,11) |
| 5262 | |
| 5263 | /* |
| 5264 | * smpl_math,0x01,0b00000000,0x0,Reset_Type:S |
| 5265 | * math_avg,math_min,math_max,smpl_start_add[7:9] |
| 5266 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5267 | #define MAX77779_BVIMsmpl_math 0x61 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5268 | #define MAX77779_BVIMsmpl_math_math_avg_SHIFT 0 |
| 5269 | #define MAX77779_BVIMsmpl_math_math_avg_MASK (0x1 << 0) |
| 5270 | #define MAX77779_BVIMsmpl_math_math_avg_CLEAR (~(0x1 << 0)) |
| 5271 | #define MAX77779_BVIMsmpl_math_math_min_SHIFT 1 |
| 5272 | #define MAX77779_BVIMsmpl_math_math_min_MASK (0x1 << 1) |
| 5273 | #define MAX77779_BVIMsmpl_math_math_min_CLEAR (~(0x1 << 1)) |
| 5274 | #define MAX77779_BVIMsmpl_math_math_max_SHIFT 2 |
| 5275 | #define MAX77779_BVIMsmpl_math_math_max_MASK (0x1 << 2) |
| 5276 | #define MAX77779_BVIMsmpl_math_math_max_CLEAR (~(0x1 << 2)) |
| 5277 | #define MAX77779_BVIMsmpl_math_smpl_start_add_SHIFT 7 |
| 5278 | #define MAX77779_BVIMsmpl_math_smpl_start_add_MASK (0x1ff << 7) |
| 5279 | #define MAX77779_BVIMsmpl_math_smpl_start_add_CLEAR (~(0x1ff << 7)) |
| 5280 | static inline const char * |
| 5281 | max77779_bvimsmpl_math_cstr(char *buff, size_t len, int val) |
| 5282 | { |
| 5283 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 5284 | int i = 0; |
| 5285 | |
| 5286 | i += scnprintf(&buff[i], len - i, " math_avg=%x", |
| 5287 | FIELD2VALUE(MAX77779_math_avg, val)); |
| 5288 | i += scnprintf(&buff[i], len - i, " math_min=%x", |
| 5289 | FIELD2VALUE(MAX77779_math_min, val)); |
| 5290 | i += scnprintf(&buff[i], len - i, " math_max=%x", |
| 5291 | FIELD2VALUE(MAX77779_math_max, val)); |
| 5292 | i += scnprintf(&buff[i], len - i, " smpl_start_add=%x", |
| 5293 | FIELD2VALUE(MAX77779_smpl_start_add, val)); |
| 5294 | #else |
| 5295 | buff[0] = 0; |
| 5296 | #endif |
| 5297 | return buff; |
| 5298 | } |
| 5299 | |
| 5300 | MAX77779_BFF(max77779_bvimsmpl_math_math_avg,0,0) |
| 5301 | MAX77779_BFF(max77779_bvimsmpl_math_math_min,1,1) |
| 5302 | MAX77779_BFF(max77779_bvimsmpl_math_math_max,2,2) |
| 5303 | MAX77779_BFF(max77779_bvimsmpl_math_smpl_start_add,15,7) |
| 5304 | |
| 5305 | /* |
| 5306 | * bvim_trig,0x02,0b00000000,0x0,Reset_Type:S |
| 5307 | * trig_now,batoilo_tr,sysuvlo1_tr,sysuvlo2_tr,vbatt_tr,ibatt_tr,vbatt, |
| 5308 | * vbatt_avg_tr,vbatt_min_tr,vbatt_max_tr,ibatt_avg_tr,ibatt_min_tr,ibatt_max_tr |
| 5309 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5310 | #define MAX77779_BVIMbvim_trig 0x62 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5311 | #define MAX77779_BVIMbvim_trig_trig_now_SHIFT 0 |
| 5312 | #define MAX77779_BVIMbvim_trig_trig_now_MASK (0x1 << 0) |
| 5313 | #define MAX77779_BVIMbvim_trig_trig_now_CLEAR (~(0x1 << 0)) |
| 5314 | #define MAX77779_BVIMbvim_trig_batoilo_tr_SHIFT 1 |
| 5315 | #define MAX77779_BVIMbvim_trig_batoilo_tr_MASK (0x1 << 1) |
| 5316 | #define MAX77779_BVIMbvim_trig_batoilo_tr_CLEAR (~(0x1 << 1)) |
| 5317 | #define MAX77779_BVIMbvim_trig_sysuvlo1_tr_SHIFT 2 |
| 5318 | #define MAX77779_BVIMbvim_trig_sysuvlo1_tr_MASK (0x1 << 2) |
| 5319 | #define MAX77779_BVIMbvim_trig_sysuvlo1_tr_CLEAR (~(0x1 << 2)) |
| 5320 | #define MAX77779_BVIMbvim_trig_sysuvlo2_tr_SHIFT 3 |
| 5321 | #define MAX77779_BVIMbvim_trig_sysuvlo2_tr_MASK (0x1 << 3) |
| 5322 | #define MAX77779_BVIMbvim_trig_sysuvlo2_tr_CLEAR (~(0x1 << 3)) |
| 5323 | #define MAX77779_BVIMbvim_trig_vbatt_tr_SHIFT 4 |
| 5324 | #define MAX77779_BVIMbvim_trig_vbatt_tr_MASK (0x1 << 4) |
| 5325 | #define MAX77779_BVIMbvim_trig_vbatt_tr_CLEAR (~(0x1 << 4)) |
| 5326 | #define MAX77779_BVIMbvim_trig_ibatt_tr_SHIFT 5 |
| 5327 | #define MAX77779_BVIMbvim_trig_ibatt_tr_MASK (0x1 << 5) |
| 5328 | #define MAX77779_BVIMbvim_trig_ibatt_tr_CLEAR (~(0x1 << 5)) |
| 5329 | #define MAX77779_BVIMbvim_trig_vbatt_SHIFT 6 |
| 5330 | #define MAX77779_BVIMbvim_trig_vbatt_MASK (0x1 << 6) |
| 5331 | #define MAX77779_BVIMbvim_trig_vbatt_CLEAR (~(0x1 << 6)) |
| 5332 | #define MAX77779_BVIMbvim_trig_vbatt_avg_tr_SHIFT 7 |
| 5333 | #define MAX77779_BVIMbvim_trig_vbatt_avg_tr_MASK (0x1 << 7) |
| 5334 | #define MAX77779_BVIMbvim_trig_vbatt_avg_tr_CLEAR (~(0x1 << 7)) |
| 5335 | #define MAX77779_BVIMbvim_trig_vbatt_min_tr_SHIFT 8 |
| 5336 | #define MAX77779_BVIMbvim_trig_vbatt_min_tr_MASK (0x1 << 8) |
| 5337 | #define MAX77779_BVIMbvim_trig_vbatt_min_tr_CLEAR (~(0x1 << 8)) |
| 5338 | #define MAX77779_BVIMbvim_trig_vbatt_max_tr_SHIFT 9 |
| 5339 | #define MAX77779_BVIMbvim_trig_vbatt_max_tr_MASK (0x1 << 9) |
| 5340 | #define MAX77779_BVIMbvim_trig_vbatt_max_tr_CLEAR (~(0x1 << 9)) |
| 5341 | #define MAX77779_BVIMbvim_trig_ibatt_avg_tr_SHIFT 10 |
| 5342 | #define MAX77779_BVIMbvim_trig_ibatt_avg_tr_MASK (0x1 << 10) |
| 5343 | #define MAX77779_BVIMbvim_trig_ibatt_avg_tr_CLEAR (~(0x1 << 10)) |
| 5344 | #define MAX77779_BVIMbvim_trig_ibatt_min_tr_SHIFT 11 |
| 5345 | #define MAX77779_BVIMbvim_trig_ibatt_min_tr_MASK (0x1 << 11) |
| 5346 | #define MAX77779_BVIMbvim_trig_ibatt_min_tr_CLEAR (~(0x1 << 11)) |
| 5347 | #define MAX77779_BVIMbvim_trig_ibatt_max_tr_SHIFT 12 |
| 5348 | #define MAX77779_BVIMbvim_trig_ibatt_max_tr_MASK (0x1 << 12) |
| 5349 | #define MAX77779_BVIMbvim_trig_ibatt_max_tr_CLEAR (~(0x1 << 12)) |
| 5350 | static inline const char * |
| 5351 | max77779_bvimbvim_trig_cstr(char *buff, size_t len, int val) |
| 5352 | { |
| 5353 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 5354 | int i = 0; |
| 5355 | |
| 5356 | i += scnprintf(&buff[i], len - i, " trig_now=%x", |
| 5357 | FIELD2VALUE(MAX77779_trig_now, val)); |
| 5358 | i += scnprintf(&buff[i], len - i, " batoilo_tr=%x", |
| 5359 | FIELD2VALUE(MAX77779_batoilo_tr, val)); |
| 5360 | i += scnprintf(&buff[i], len - i, " sysuvlo1_tr=%x", |
| 5361 | FIELD2VALUE(MAX77779_sysuvlo1_tr, val)); |
| 5362 | i += scnprintf(&buff[i], len - i, " sysuvlo2_tr=%x", |
| 5363 | FIELD2VALUE(MAX77779_sysuvlo2_tr, val)); |
| 5364 | i += scnprintf(&buff[i], len - i, " vbatt_tr=%x", |
| 5365 | FIELD2VALUE(MAX77779_vbatt_tr, val)); |
| 5366 | i += scnprintf(&buff[i], len - i, " ibatt_tr=%x", |
| 5367 | FIELD2VALUE(MAX77779_ibatt_tr, val)); |
| 5368 | i += scnprintf(&buff[i], len - i, " vbatt=%x", |
| 5369 | FIELD2VALUE(MAX77779_vbatt, val)); |
| 5370 | i += scnprintf(&buff[i], len - i, " vbatt_avg_tr=%x", |
| 5371 | FIELD2VALUE(MAX77779_vbatt_avg_tr, val)); |
| 5372 | i += scnprintf(&buff[i], len - i, " vbatt_min_tr=%x", |
| 5373 | FIELD2VALUE(MAX77779_vbatt_min_tr, val)); |
| 5374 | i += scnprintf(&buff[i], len - i, " vbatt_max_tr=%x", |
| 5375 | FIELD2VALUE(MAX77779_vbatt_max_tr, val)); |
| 5376 | i += scnprintf(&buff[i], len - i, " ibatt_avg_tr=%x", |
| 5377 | FIELD2VALUE(MAX77779_ibatt_avg_tr, val)); |
| 5378 | i += scnprintf(&buff[i], len - i, " ibatt_min_tr=%x", |
| 5379 | FIELD2VALUE(MAX77779_ibatt_min_tr, val)); |
| 5380 | i += scnprintf(&buff[i], len - i, " ibatt_max_tr=%x", |
| 5381 | FIELD2VALUE(MAX77779_ibatt_max_tr, val)); |
| 5382 | #else |
| 5383 | buff[0] = 0; |
| 5384 | #endif |
| 5385 | return buff; |
| 5386 | } |
| 5387 | |
| 5388 | MAX77779_BFF(max77779_bvimbvim_trig_trig_now,0,0) |
| 5389 | MAX77779_BFF(max77779_bvimbvim_trig_batoilo_tr,1,1) |
| 5390 | MAX77779_BFF(max77779_bvimbvim_trig_sysuvlo1_tr,2,2) |
| 5391 | MAX77779_BFF(max77779_bvimbvim_trig_sysuvlo2_tr,3,3) |
| 5392 | MAX77779_BFF(max77779_bvimbvim_trig_vbatt_tr,4,4) |
| 5393 | MAX77779_BFF(max77779_bvimbvim_trig_ibatt_tr,5,5) |
| 5394 | MAX77779_BFF(max77779_bvimbvim_trig_vbatt,6,6) |
| 5395 | MAX77779_BFF(max77779_bvimbvim_trig_vbatt_avg_tr,7,7) |
| 5396 | MAX77779_BFF(max77779_bvimbvim_trig_vbatt_min_tr,8,8) |
| 5397 | MAX77779_BFF(max77779_bvimbvim_trig_vbatt_max_tr,9,9) |
| 5398 | MAX77779_BFF(max77779_bvimbvim_trig_ibatt_avg_tr,10,10) |
| 5399 | MAX77779_BFF(max77779_bvimbvim_trig_ibatt_min_tr,11,11) |
| 5400 | MAX77779_BFF(max77779_bvimbvim_trig_ibatt_max_tr,12,12) |
| 5401 | |
| 5402 | /* |
| 5403 | * bvimtr,0x03,0b00000000,0x0,Reset_Type:S |
| 5404 | * v_md[0:2],i_md[2:2],v_savg_md[4:2],v_smin_md[6:2],v_smax_md[8:2],i_savg_md[10:2], |
| 5405 | * i_smin_md[12:2],i_smax_md[14:2] |
| 5406 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5407 | #define MAX77779_BVIMbvimtr 0x63 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5408 | #define MAX77779_BVIMbvimtr_v_md_SHIFT 0 |
| 5409 | #define MAX77779_BVIMbvimtr_v_md_MASK (0x3 << 0) |
| 5410 | #define MAX77779_BVIMbvimtr_v_md_CLEAR (~(0x3 << 0)) |
| 5411 | #define MAX77779_BVIMbvimtr_i_md_SHIFT 2 |
| 5412 | #define MAX77779_BVIMbvimtr_i_md_MASK (0x3 << 2) |
| 5413 | #define MAX77779_BVIMbvimtr_i_md_CLEAR (~(0x3 << 2)) |
| 5414 | #define MAX77779_BVIMbvimtr_v_savg_md_SHIFT 4 |
| 5415 | #define MAX77779_BVIMbvimtr_v_savg_md_MASK (0x3 << 4) |
| 5416 | #define MAX77779_BVIMbvimtr_v_savg_md_CLEAR (~(0x3 << 4)) |
| 5417 | #define MAX77779_BVIMbvimtr_v_smin_md_SHIFT 6 |
| 5418 | #define MAX77779_BVIMbvimtr_v_smin_md_MASK (0x3 << 6) |
| 5419 | #define MAX77779_BVIMbvimtr_v_smin_md_CLEAR (~(0x3 << 6)) |
| 5420 | #define MAX77779_BVIMbvimtr_v_smax_md_SHIFT 8 |
| 5421 | #define MAX77779_BVIMbvimtr_v_smax_md_MASK (0x3 << 8) |
| 5422 | #define MAX77779_BVIMbvimtr_v_smax_md_CLEAR (~(0x3 << 8)) |
| 5423 | #define MAX77779_BVIMbvimtr_i_savg_md_SHIFT 10 |
| 5424 | #define MAX77779_BVIMbvimtr_i_savg_md_MASK (0x3 << 10) |
| 5425 | #define MAX77779_BVIMbvimtr_i_savg_md_CLEAR (~(0x3 << 10)) |
| 5426 | #define MAX77779_BVIMbvimtr_i_smin_md_SHIFT 12 |
| 5427 | #define MAX77779_BVIMbvimtr_i_smin_md_MASK (0x3 << 12) |
| 5428 | #define MAX77779_BVIMbvimtr_i_smin_md_CLEAR (~(0x3 << 12)) |
| 5429 | #define MAX77779_BVIMbvimtr_i_smax_md_SHIFT 14 |
| 5430 | #define MAX77779_BVIMbvimtr_i_smax_md_MASK (0x3 << 14) |
| 5431 | #define MAX77779_BVIMbvimtr_i_smax_md_CLEAR (~(0x3 << 14)) |
| 5432 | static inline const char * |
| 5433 | max77779_bvimbvimtr_cstr(char *buff, size_t len, int val) |
| 5434 | { |
| 5435 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 5436 | int i = 0; |
| 5437 | |
| 5438 | i += scnprintf(&buff[i], len - i, " v_md=%x", |
| 5439 | FIELD2VALUE(MAX77779_v_md, val)); |
| 5440 | i += scnprintf(&buff[i], len - i, " i_md=%x", |
| 5441 | FIELD2VALUE(MAX77779_i_md, val)); |
| 5442 | i += scnprintf(&buff[i], len - i, " v_savg_md=%x", |
| 5443 | FIELD2VALUE(MAX77779_v_savg_md, val)); |
| 5444 | i += scnprintf(&buff[i], len - i, " v_smin_md=%x", |
| 5445 | FIELD2VALUE(MAX77779_v_smin_md, val)); |
| 5446 | i += scnprintf(&buff[i], len - i, " v_smax_md=%x", |
| 5447 | FIELD2VALUE(MAX77779_v_smax_md, val)); |
| 5448 | i += scnprintf(&buff[i], len - i, " i_savg_md=%x", |
| 5449 | FIELD2VALUE(MAX77779_i_savg_md, val)); |
| 5450 | i += scnprintf(&buff[i], len - i, " i_smin_md=%x", |
| 5451 | FIELD2VALUE(MAX77779_i_smin_md, val)); |
| 5452 | i += scnprintf(&buff[i], len - i, " i_smax_md=%x", |
| 5453 | FIELD2VALUE(MAX77779_i_smax_md, val)); |
| 5454 | #else |
| 5455 | buff[0] = 0; |
| 5456 | #endif |
| 5457 | return buff; |
| 5458 | } |
| 5459 | |
| 5460 | MAX77779_BFF(max77779_bvimbvimtr_v_md,1,0) |
| 5461 | MAX77779_BFF(max77779_bvimbvimtr_i_md,3,2) |
| 5462 | MAX77779_BFF(max77779_bvimbvimtr_v_savg_md,5,4) |
| 5463 | MAX77779_BFF(max77779_bvimbvimtr_v_smin_md,7,6) |
| 5464 | MAX77779_BFF(max77779_bvimbvimtr_v_smax_md,9,8) |
| 5465 | MAX77779_BFF(max77779_bvimbvimtr_i_savg_md,11,10) |
| 5466 | MAX77779_BFF(max77779_bvimbvimtr_i_smin_md,13,12) |
| 5467 | MAX77779_BFF(max77779_bvimbvimtr_i_smax_md,15,14) |
| 5468 | |
| 5469 | /* |
| 5470 | * bvim_vtr_mth,0x04,0b00000000,0x0,Reset_Type:S |
| 5471 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5472 | #define MAX77779_BVIMbvim_vtr_mth 0x64 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5473 | |
| 5474 | /* |
| 5475 | * bvim_itr_mth,0x05,0b00000000,0x0,Reset_Type:S |
| 5476 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5477 | #define MAX77779_BVIMbvim_itr_mth 0x65 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5478 | |
| 5479 | /* |
| 5480 | * bvim_vtr_smin_th,0x06,0b00000000,0x0,Reset_Type:S |
| 5481 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5482 | #define MAX77779_BVIMbvim_vtr_smin_th 0x66 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5483 | |
| 5484 | /* |
| 5485 | * bvim_vtr_smax_th,0x07,0b00000000,0x0,Reset_Type:S |
| 5486 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5487 | #define MAX77779_BVIMbvim_vtr_smax_th 0x67 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5488 | |
| 5489 | /* |
| 5490 | * bvim_vtr_savg_th,0x08,0b00000000,0x0,Reset_Type:S |
| 5491 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5492 | #define MAX77779_BVIMbvim_vtr_savg_th 0x68 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5493 | |
| 5494 | /* |
| 5495 | * bvim_itr_smin_th,0x09,0b00000000,0x0,Reset_Type:S |
| 5496 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5497 | #define MAX77779_BVIMbvim_itr_smin_th 0x69 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5498 | |
| 5499 | /* |
| 5500 | * bvim_itr_smax_th,0x0A,0b00000000,0x0,Reset_Type:S |
| 5501 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5502 | #define MAX77779_BVIMbvim_itr_smax_th 0x6a |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5503 | |
| 5504 | /* |
| 5505 | * bvim_itr_savg_th,0x0B,0b00000000,0x0,Reset_Type:S |
| 5506 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5507 | #define MAX77779_BVIMbvim_itr_savg_th 0x6b |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5508 | |
| 5509 | /* |
| 5510 | * bvim_sts,0x0C,0b00000000,0x0,Reset_Type:S |
| 5511 | * bvim_osc[0:9],tr_sts[9:2] |
| 5512 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5513 | #define MAX77779_BVIMbvim_sts 0x6c |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5514 | #define MAX77779_BVIMbvim_sts_bvim_osc_SHIFT 0 |
| 5515 | #define MAX77779_BVIMbvim_sts_bvim_osc_MASK (0x1ff << 0) |
| 5516 | #define MAX77779_BVIMbvim_sts_bvim_osc_CLEAR (~(0x1ff << 0)) |
| 5517 | #define MAX77779_BVIMbvim_sts_tr_sts_SHIFT 9 |
| 5518 | #define MAX77779_BVIMbvim_sts_tr_sts_MASK (0x3 << 9) |
| 5519 | #define MAX77779_BVIMbvim_sts_tr_sts_CLEAR (~(0x3 << 9)) |
| 5520 | static inline const char * |
| 5521 | max77779_bvimbvim_sts_cstr(char *buff, size_t len, int val) |
| 5522 | { |
| 5523 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 5524 | int i = 0; |
| 5525 | |
| 5526 | i += scnprintf(&buff[i], len - i, " bvim_osc=%x", |
| 5527 | FIELD2VALUE(MAX77779_bvim_osc, val)); |
| 5528 | i += scnprintf(&buff[i], len - i, " tr_sts=%x", |
| 5529 | FIELD2VALUE(MAX77779_tr_sts, val)); |
| 5530 | #else |
| 5531 | buff[0] = 0; |
| 5532 | #endif |
| 5533 | return buff; |
| 5534 | } |
| 5535 | |
| 5536 | MAX77779_BFF(max77779_bvimbvim_sts_bvim_osc,8,0) |
| 5537 | MAX77779_BFF(max77779_bvimbvim_sts_tr_sts,10,9) |
| 5538 | |
| 5539 | /* |
| 5540 | * bvim_rs,0x0D,0b00000000,0x0,Reset_Type:S |
| 5541 | * rsc[0:9],bvim_rts[9:4] |
| 5542 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5543 | #define MAX77779_BVIMbvim_rs 0x6d |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5544 | #define MAX77779_BVIMbvim_rs_rsc_SHIFT 0 |
| 5545 | #define MAX77779_BVIMbvim_rs_rsc_MASK (0x1ff << 0) |
| 5546 | #define MAX77779_BVIMbvim_rs_rsc_CLEAR (~(0x1ff << 0)) |
| 5547 | #define MAX77779_BVIMbvim_rs_bvim_rts_SHIFT 9 |
| 5548 | #define MAX77779_BVIMbvim_rs_bvim_rts_MASK (0xf << 9) |
| 5549 | #define MAX77779_BVIMbvim_rs_bvim_rts_CLEAR (~(0xf << 9)) |
| 5550 | static inline const char * |
| 5551 | max77779_bvimbvim_rs_cstr(char *buff, size_t len, int val) |
| 5552 | { |
| 5553 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 5554 | int i = 0; |
| 5555 | |
| 5556 | i += scnprintf(&buff[i], len - i, " rsc=%x", |
| 5557 | FIELD2VALUE(MAX77779_rsc, val)); |
| 5558 | i += scnprintf(&buff[i], len - i, " bvim_rts=%x", |
| 5559 | FIELD2VALUE(MAX77779_bvim_rts, val)); |
| 5560 | #else |
| 5561 | buff[0] = 0; |
| 5562 | #endif |
| 5563 | return buff; |
| 5564 | } |
| 5565 | |
| 5566 | MAX77779_BFF(max77779_bvimbvim_rs_rsc,8,0) |
| 5567 | MAX77779_BFF(max77779_bvimbvim_rs_bvim_rts,12,9) |
| 5568 | |
| 5569 | /* |
| 5570 | * bvim_rlap,0x0E,0b00000000,0x0,Reset_Type:S |
| 5571 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5572 | #define MAX77779_BVIMbvim_rlap 0x6e |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5573 | |
| 5574 | /* |
| 5575 | * bvim_rfap,0x0F,0b00000000,0x0,Reset_Type:S |
| 5576 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5577 | #define MAX77779_BVIMbvim_rfap 0x6f |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5578 | /* |
| 5579 | * Section: BVIM_PAGE 0x70 16 |
| 5580 | */ |
| 5581 | |
| 5582 | |
| 5583 | /* |
| 5584 | * BVIM_PAGE_CTRL,0x00,0b00000000,0x0,Reset_Type:F |
| 5585 | * BVIM_DATA_PAGE[0:2] |
| 5586 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5587 | #define MAX77779_BVIMBVIM_PAGE_CTRL 0x70 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5588 | #define MAX77779_BVIMBVIM_PAGE_CTRL_BVIM_DATA_PAGE_SHIFT 0 |
| 5589 | #define MAX77779_BVIMBVIM_PAGE_CTRL_BVIM_DATA_PAGE_MASK (0x3 << 0) |
| 5590 | #define MAX77779_BVIMBVIM_PAGE_CTRL_BVIM_DATA_PAGE_CLEAR (~(0x3 << 0)) |
| 5591 | static inline const char * |
| 5592 | max77779_bvimbvim_page_ctrl_cstr(char *buff, size_t len, int val) |
| 5593 | { |
| 5594 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 5595 | int i = 0; |
| 5596 | |
| 5597 | i += scnprintf(&buff[i], len - i, " BVIM_DATA_PAGE=%x", |
| 5598 | FIELD2VALUE(MAX77779_BVIM_DATA_PAGE, val)); |
| 5599 | #else |
| 5600 | buff[0] = 0; |
| 5601 | #endif |
| 5602 | return buff; |
| 5603 | } |
| 5604 | |
| 5605 | MAX77779_BFF(max77779_bvimbvim_page_ctrl_bvim_data_page,1,0) |
| 5606 | /* |
| 5607 | * Section: BVIM_DATA 0x80 16 |
| 5608 | */ |
| 5609 | |
| 5610 | /* |
| 5611 | * Section: SP_PAGE 0x70 16 |
| 5612 | */ |
| 5613 | |
| 5614 | |
| 5615 | /* |
| 5616 | * SP_PAGE_CTRL,0x00,0b00000000,0x0,Reset_Type:SP |
| 5617 | * SP_DATA_PAGE[0:2] |
| 5618 | */ |
AleX Pelosi | 5525a81 | 2023-02-14 22:49:17 +0000 | [diff] [blame] | 5619 | #define MAX77779_SP_PAGE_CTRL 0x70 |
AleX Pelosi | af4a8e3 | 2023-01-18 16:31:38 +0000 | [diff] [blame] | 5620 | #define MAX77779_SP_PAGE_CTRL_SP_DATA_PAGE_SHIFT 0 |
| 5621 | #define MAX77779_SP_PAGE_CTRL_SP_DATA_PAGE_MASK (0x3 << 0) |
| 5622 | #define MAX77779_SP_PAGE_CTRL_SP_DATA_PAGE_CLEAR (~(0x3 << 0)) |
| 5623 | static inline const char * |
| 5624 | max77779_sp_page_ctrl_cstr(char *buff, size_t len, int val) |
| 5625 | { |
| 5626 | #ifdef CONFIG_SCNPRINTF_DEBUG |
| 5627 | int i = 0; |
| 5628 | |
| 5629 | i += scnprintf(&buff[i], len - i, " SP_DATA_PAGE=%x", |
| 5630 | FIELD2VALUE(MAX77779_SP_DATA_PAGE, val)); |
| 5631 | #else |
| 5632 | buff[0] = 0; |
| 5633 | #endif |
| 5634 | return buff; |
| 5635 | } |
| 5636 | |
| 5637 | MAX77779_BFF(max77779_sp_page_ctrl_sp_data_page,1,0) |
| 5638 | /* |
| 5639 | * Section: SP_DATA 0x80 16 |
| 5640 | */ |
| 5641 | |
| 5642 | |
| 5643 | #endif /* SEQUOIA_REGMAP_CUSTOMER_060_REG_H_ */ |