blob: 36424506bee87d1e161844a2eb2de0943ce08ed0 [file] [log] [blame]
Stephen Hines36b56882014-04-23 16:57:46 -07001; RUN: llc -march=arm64 -mcpu=cyclone < %s | FileCheck %s
2
3; CHECK: foo
Pirama Arumuga Nainarde2d8692016-09-19 22:57:26 -07004; CHECK: str w[[REG0:[0-9]+]], [x19, #264]
5; CHECK: mov w[[REG1:[0-9]+]], w[[REG0]]
6; CHECK: str w[[REG1]], [x19, #132]
Stephen Hines36b56882014-04-23 16:57:46 -07007
8define i32 @foo(i32 %a) nounwind {
9 %retval = alloca i32, align 4
10 %a.addr = alloca i32, align 4
11 %arr = alloca [32 x i32], align 4
12 %i = alloca i32, align 4
13 %arr2 = alloca [32 x i32], align 4
14 %j = alloca i32, align 4
15 store i32 %a, i32* %a.addr, align 4
Pirama Arumuga Nainar4c5e43d2015-04-08 08:55:49 -070016 %tmp = load i32, i32* %a.addr, align 4
Stephen Hines36b56882014-04-23 16:57:46 -070017 %tmp1 = zext i32 %tmp to i64
18 %v = mul i64 4, %tmp1
19 %vla = alloca i8, i64 %v, align 4
20 %tmp2 = bitcast i8* %vla to i32*
Pirama Arumuga Nainar4c5e43d2015-04-08 08:55:49 -070021 %tmp3 = load i32, i32* %a.addr, align 4
Stephen Hines36b56882014-04-23 16:57:46 -070022 store i32 %tmp3, i32* %i, align 4
Pirama Arumuga Nainar4c5e43d2015-04-08 08:55:49 -070023 %tmp4 = load i32, i32* %a.addr, align 4
Stephen Hines36b56882014-04-23 16:57:46 -070024 store i32 %tmp4, i32* %j, align 4
Pirama Arumuga Nainar4c5e43d2015-04-08 08:55:49 -070025 %tmp5 = load i32, i32* %j, align 4
Stephen Hines36b56882014-04-23 16:57:46 -070026 store i32 %tmp5, i32* %retval
Pirama Arumuga Nainar4c5e43d2015-04-08 08:55:49 -070027 %x = load i32, i32* %retval
Stephen Hines36b56882014-04-23 16:57:46 -070028 ret i32 %x
29}