ths | 3fffc22 | 2007-02-02 03:13:18 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QEMU SMBus API |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
ths | 3fffc22 | 2007-02-02 03:13:18 +0000 | [diff] [blame] | 4 | * Copyright (c) 2007 Arastra, Inc. |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 5 | * |
ths | 3fffc22 | 2007-02-02 03:13:18 +0000 | [diff] [blame] | 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
| 24 | |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 25 | #include "i2c.h" |
ths | 3fffc22 | 2007-02-02 03:13:18 +0000 | [diff] [blame] | 26 | |
| 27 | struct SMBusDevice { |
pbrook | 0ff596d | 2007-05-23 00:03:59 +0000 | [diff] [blame] | 28 | /* The SMBus protocol is implemented on top of I2C. */ |
| 29 | i2c_slave i2c; |
| 30 | |
Paul Brook | 1ea9667 | 2009-05-14 22:35:08 +0100 | [diff] [blame] | 31 | /* Remaining fields for internal use only. */ |
| 32 | int mode; |
| 33 | int data_len; |
| 34 | uint8_t data_buf[34]; /* command + len + 32 bytes of data. */ |
| 35 | uint8_t command; |
| 36 | }; |
| 37 | |
| 38 | typedef struct { |
| 39 | I2CSlaveInfo i2c; |
Gerd Hoffmann | 81a322d | 2009-08-14 10:36:05 +0200 | [diff] [blame] | 40 | int (*init)(SMBusDevice *dev); |
ths | 3fffc22 | 2007-02-02 03:13:18 +0000 | [diff] [blame] | 41 | void (*quick_cmd)(SMBusDevice *dev, uint8_t read); |
| 42 | void (*send_byte)(SMBusDevice *dev, uint8_t val); |
| 43 | uint8_t (*receive_byte)(SMBusDevice *dev); |
pbrook | 0ff596d | 2007-05-23 00:03:59 +0000 | [diff] [blame] | 44 | /* We can't distinguish between a word write and a block write with |
| 45 | length 1, so pass the whole data block including the length byte |
| 46 | (if present). The device is responsible figuring out what type of |
| 47 | command this is. */ |
| 48 | void (*write_data)(SMBusDevice *dev, uint8_t cmd, uint8_t *buf, int len); |
balrog | 3f58226 | 2007-05-23 21:47:51 +0000 | [diff] [blame] | 49 | /* Likewise we can't distinguish between different reads, or even know |
pbrook | 0ff596d | 2007-05-23 00:03:59 +0000 | [diff] [blame] | 50 | the length of the read until the read is complete, so read data a |
| 51 | byte at a time. The device is responsible for adding the length |
| 52 | byte on block reads. */ |
| 53 | uint8_t (*read_data)(SMBusDevice *dev, uint8_t cmd, int n); |
Paul Brook | 1ea9667 | 2009-05-14 22:35:08 +0100 | [diff] [blame] | 54 | } SMBusDeviceInfo; |
pbrook | 0ff596d | 2007-05-23 00:03:59 +0000 | [diff] [blame] | 55 | |
Gerd Hoffmann | 074f2ff | 2009-06-10 09:41:42 +0200 | [diff] [blame] | 56 | void smbus_register_device(SMBusDeviceInfo *info); |
pbrook | 0ff596d | 2007-05-23 00:03:59 +0000 | [diff] [blame] | 57 | |
| 58 | /* Master device commands. */ |
Juan Quintela | 5b7f532 | 2009-09-29 22:48:26 +0200 | [diff] [blame] | 59 | void smbus_quick_command(i2c_bus *bus, uint8_t addr, int read); |
| 60 | uint8_t smbus_receive_byte(i2c_bus *bus, uint8_t addr); |
| 61 | void smbus_send_byte(i2c_bus *bus, uint8_t addr, uint8_t data); |
| 62 | uint8_t smbus_read_byte(i2c_bus *bus, uint8_t addr, uint8_t command); |
| 63 | void smbus_write_byte(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t data); |
| 64 | uint16_t smbus_read_word(i2c_bus *bus, uint8_t addr, uint8_t command); |
| 65 | void smbus_write_word(i2c_bus *bus, uint8_t addr, uint8_t command, uint16_t data); |
| 66 | int smbus_read_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data); |
| 67 | void smbus_write_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data, |
pbrook | 0ff596d | 2007-05-23 00:03:59 +0000 | [diff] [blame] | 68 | int len); |
Isaku Yamahata | a88df0b | 2011-04-05 11:07:06 +0900 | [diff] [blame] | 69 | |
| 70 | void smbus_eeprom_init(i2c_bus *smbus, int nb_eeprom, |
| 71 | const uint8_t *eeprom_spd, int size); |