malc | 902b3d5 | 2008-12-10 19:18:40 +0000 | [diff] [blame] | 1 | #include "cache-utils.h" |
| 2 | |
malc | e58ffeb | 2009-01-14 18:39:49 +0000 | [diff] [blame] | 3 | #if defined(_ARCH_PPC) |
malc | 902b3d5 | 2008-12-10 19:18:40 +0000 | [diff] [blame] | 4 | struct qemu_cache_conf qemu_cache_conf = { |
| 5 | .dcache_bsize = 16, |
| 6 | .icache_bsize = 16 |
| 7 | }; |
| 8 | |
| 9 | #if defined _AIX |
| 10 | #include <sys/systemcfg.h> |
| 11 | |
| 12 | static void ppc_init_cacheline_sizes(void) |
| 13 | { |
| 14 | qemu_cache_conf.icache_bsize = _system_configuration.icache_line; |
| 15 | qemu_cache_conf.dcache_bsize = _system_configuration.dcache_line; |
| 16 | } |
| 17 | |
| 18 | #elif defined __linux__ |
malc | 4710036 | 2008-12-11 19:12:59 +0000 | [diff] [blame] | 19 | |
| 20 | #define QEMU_AT_NULL 0 |
| 21 | #define QEMU_AT_DCACHEBSIZE 19 |
| 22 | #define QEMU_AT_ICACHEBSIZE 20 |
malc | 902b3d5 | 2008-12-10 19:18:40 +0000 | [diff] [blame] | 23 | |
| 24 | static void ppc_init_cacheline_sizes(char **envp) |
| 25 | { |
| 26 | unsigned long *auxv; |
| 27 | |
| 28 | while (*envp++); |
| 29 | |
malc | 4710036 | 2008-12-11 19:12:59 +0000 | [diff] [blame] | 30 | for (auxv = (unsigned long *) envp; *auxv != QEMU_AT_NULL; auxv += 2) { |
malc | 902b3d5 | 2008-12-10 19:18:40 +0000 | [diff] [blame] | 31 | switch (*auxv) { |
malc | 807d517 | 2008-12-11 19:20:41 +0000 | [diff] [blame] | 32 | case QEMU_AT_DCACHEBSIZE: qemu_cache_conf.dcache_bsize = auxv[1]; break; |
| 33 | case QEMU_AT_ICACHEBSIZE: qemu_cache_conf.icache_bsize = auxv[1]; break; |
malc | 902b3d5 | 2008-12-10 19:18:40 +0000 | [diff] [blame] | 34 | default: break; |
| 35 | } |
| 36 | } |
| 37 | } |
| 38 | |
| 39 | #elif defined __APPLE__ |
malc | 7344da0 | 2009-02-04 20:39:09 +0000 | [diff] [blame] | 40 | #include <stdio.h> |
malc | 902b3d5 | 2008-12-10 19:18:40 +0000 | [diff] [blame] | 41 | #include <sys/types.h> |
| 42 | #include <sys/sysctl.h> |
| 43 | |
| 44 | static void ppc_init_cacheline_sizes(void) |
| 45 | { |
| 46 | size_t len; |
| 47 | unsigned cacheline; |
| 48 | int name[2] = { CTL_HW, HW_CACHELINE }; |
| 49 | |
malc | 7344da0 | 2009-02-04 20:39:09 +0000 | [diff] [blame] | 50 | len = sizeof(cacheline); |
malc | 902b3d5 | 2008-12-10 19:18:40 +0000 | [diff] [blame] | 51 | if (sysctl(name, 2, &cacheline, &len, NULL, 0)) { |
| 52 | perror("sysctl CTL_HW HW_CACHELINE failed"); |
| 53 | } else { |
| 54 | qemu_cache_conf.dcache_bsize = cacheline; |
| 55 | qemu_cache_conf.icache_bsize = cacheline; |
| 56 | } |
| 57 | } |
| 58 | #endif |
| 59 | |
| 60 | #ifdef __linux__ |
| 61 | void qemu_cache_utils_init(char **envp) |
| 62 | { |
| 63 | ppc_init_cacheline_sizes(envp); |
| 64 | } |
| 65 | #else |
| 66 | void qemu_cache_utils_init(char **envp) |
| 67 | { |
| 68 | (void) envp; |
| 69 | ppc_init_cacheline_sizes(); |
| 70 | } |
| 71 | #endif |
| 72 | |
malc | e58ffeb | 2009-01-14 18:39:49 +0000 | [diff] [blame] | 73 | #endif /* _ARCH_PPC */ |