| /* Generated by ./xlat/gen.sh from ./xlat/perf_hw_cache_id.in; do not edit. */ |
| #if !(defined(PERF_COUNT_HW_CACHE_L1D) || (defined(HAVE_DECL_PERF_COUNT_HW_CACHE_L1D) && HAVE_DECL_PERF_COUNT_HW_CACHE_L1D)) |
| # define PERF_COUNT_HW_CACHE_L1D 0 |
| #endif |
| #if !(defined(PERF_COUNT_HW_CACHE_L1I) || (defined(HAVE_DECL_PERF_COUNT_HW_CACHE_L1I) && HAVE_DECL_PERF_COUNT_HW_CACHE_L1I)) |
| # define PERF_COUNT_HW_CACHE_L1I 1 |
| #endif |
| #if !(defined(PERF_COUNT_HW_CACHE_LL) || (defined(HAVE_DECL_PERF_COUNT_HW_CACHE_LL) && HAVE_DECL_PERF_COUNT_HW_CACHE_LL)) |
| # define PERF_COUNT_HW_CACHE_LL 2 |
| #endif |
| #if !(defined(PERF_COUNT_HW_CACHE_DTLB) || (defined(HAVE_DECL_PERF_COUNT_HW_CACHE_DTLB) && HAVE_DECL_PERF_COUNT_HW_CACHE_DTLB)) |
| # define PERF_COUNT_HW_CACHE_DTLB 3 |
| #endif |
| #if !(defined(PERF_COUNT_HW_CACHE_ITLB) || (defined(HAVE_DECL_PERF_COUNT_HW_CACHE_ITLB) && HAVE_DECL_PERF_COUNT_HW_CACHE_ITLB)) |
| # define PERF_COUNT_HW_CACHE_ITLB 4 |
| #endif |
| #if !(defined(PERF_COUNT_HW_CACHE_BPU) || (defined(HAVE_DECL_PERF_COUNT_HW_CACHE_BPU) && HAVE_DECL_PERF_COUNT_HW_CACHE_BPU)) |
| # define PERF_COUNT_HW_CACHE_BPU 5 |
| #endif |
| #if !(defined(PERF_COUNT_HW_CACHE_NODE) || (defined(HAVE_DECL_PERF_COUNT_HW_CACHE_NODE) && HAVE_DECL_PERF_COUNT_HW_CACHE_NODE)) |
| # define PERF_COUNT_HW_CACHE_NODE 6 |
| #endif |
| |
| #ifdef IN_MPERS |
| |
| # error static const struct xlat perf_hw_cache_id in mpers mode |
| |
| #else |
| |
| static |
| const struct xlat perf_hw_cache_id[] = { |
| |
| XLAT(PERF_COUNT_HW_CACHE_L1D), |
| XLAT(PERF_COUNT_HW_CACHE_L1I), |
| XLAT(PERF_COUNT_HW_CACHE_LL), |
| XLAT(PERF_COUNT_HW_CACHE_DTLB), |
| XLAT(PERF_COUNT_HW_CACHE_ITLB), |
| XLAT(PERF_COUNT_HW_CACHE_BPU), |
| XLAT(PERF_COUNT_HW_CACHE_NODE), |
| XLAT_END |
| }; |
| |
| #endif /* !IN_MPERS */ |