Yunlian Jiang | 714990b | 2017-10-11 09:50:26 -0700 | [diff] [blame] | 1 | /* Instruction building/extraction support for mt. -*- C -*- |
| 2 | |
| 3 | THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. |
| 4 | - the resultant file is machine generated, cgen-ibld.in isn't |
| 5 | |
| 6 | Copyright (C) 1996-2017 Free Software Foundation, Inc. |
| 7 | |
| 8 | This file is part of libopcodes. |
| 9 | |
| 10 | This library is free software; you can redistribute it and/or modify |
| 11 | it under the terms of the GNU General Public License as published by |
| 12 | the Free Software Foundation; either version 3, or (at your option) |
| 13 | any later version. |
| 14 | |
| 15 | It is distributed in the hope that it will be useful, but WITHOUT |
| 16 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 17 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 18 | License for more details. |
| 19 | |
| 20 | You should have received a copy of the GNU General Public License |
| 21 | along with this program; if not, write to the Free Software Foundation, Inc., |
| 22 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
| 23 | |
| 24 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. |
| 25 | Keep that in mind. */ |
| 26 | |
| 27 | #include "sysdep.h" |
| 28 | #include <stdio.h> |
| 29 | #include "ansidecl.h" |
| 30 | #include "dis-asm.h" |
| 31 | #include "bfd.h" |
| 32 | #include "symcat.h" |
| 33 | #include "mt-desc.h" |
| 34 | #include "mt-opc.h" |
| 35 | #include "cgen/basic-modes.h" |
| 36 | #include "opintl.h" |
| 37 | #include "safe-ctype.h" |
| 38 | |
| 39 | #undef min |
| 40 | #define min(a,b) ((a) < (b) ? (a) : (b)) |
| 41 | #undef max |
| 42 | #define max(a,b) ((a) > (b) ? (a) : (b)) |
| 43 | |
| 44 | /* Used by the ifield rtx function. */ |
| 45 | #define FLD(f) (fields->f) |
| 46 | |
| 47 | static const char * insert_normal |
| 48 | (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, |
| 49 | unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); |
| 50 | static const char * insert_insn_normal |
| 51 | (CGEN_CPU_DESC, const CGEN_INSN *, |
| 52 | CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); |
| 53 | static int extract_normal |
| 54 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, |
| 55 | unsigned int, unsigned int, unsigned int, unsigned int, |
| 56 | unsigned int, unsigned int, bfd_vma, long *); |
| 57 | static int extract_insn_normal |
| 58 | (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, |
| 59 | CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); |
| 60 | #if CGEN_INT_INSN_P |
| 61 | static void put_insn_int_value |
| 62 | (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); |
| 63 | #endif |
| 64 | #if ! CGEN_INT_INSN_P |
| 65 | static CGEN_INLINE void insert_1 |
| 66 | (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); |
| 67 | static CGEN_INLINE int fill_cache |
| 68 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); |
| 69 | static CGEN_INLINE long extract_1 |
| 70 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); |
| 71 | #endif |
| 72 | |
| 73 | /* Operand insertion. */ |
| 74 | |
| 75 | #if ! CGEN_INT_INSN_P |
| 76 | |
| 77 | /* Subroutine of insert_normal. */ |
| 78 | |
| 79 | static CGEN_INLINE void |
| 80 | insert_1 (CGEN_CPU_DESC cd, |
| 81 | unsigned long value, |
| 82 | int start, |
| 83 | int length, |
| 84 | int word_length, |
| 85 | unsigned char *bufp) |
| 86 | { |
| 87 | unsigned long x,mask; |
| 88 | int shift; |
| 89 | |
| 90 | x = cgen_get_insn_value (cd, bufp, word_length); |
| 91 | |
| 92 | /* Written this way to avoid undefined behaviour. */ |
| 93 | mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 94 | if (CGEN_INSN_LSB0_P) |
| 95 | shift = (start + 1) - length; |
| 96 | else |
| 97 | shift = (word_length - (start + length)); |
| 98 | x = (x & ~(mask << shift)) | ((value & mask) << shift); |
| 99 | |
| 100 | cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); |
| 101 | } |
| 102 | |
| 103 | #endif /* ! CGEN_INT_INSN_P */ |
| 104 | |
| 105 | /* Default insertion routine. |
| 106 | |
| 107 | ATTRS is a mask of the boolean attributes. |
| 108 | WORD_OFFSET is the offset in bits from the start of the insn of the value. |
| 109 | WORD_LENGTH is the length of the word in bits in which the value resides. |
| 110 | START is the starting bit number in the word, architecture origin. |
| 111 | LENGTH is the length of VALUE in bits. |
| 112 | TOTAL_LENGTH is the total length of the insn in bits. |
| 113 | |
| 114 | The result is an error message or NULL if success. */ |
| 115 | |
| 116 | /* ??? This duplicates functionality with bfd's howto table and |
| 117 | bfd_install_relocation. */ |
| 118 | /* ??? This doesn't handle bfd_vma's. Create another function when |
| 119 | necessary. */ |
| 120 | |
| 121 | static const char * |
| 122 | insert_normal (CGEN_CPU_DESC cd, |
| 123 | long value, |
| 124 | unsigned int attrs, |
| 125 | unsigned int word_offset, |
| 126 | unsigned int start, |
| 127 | unsigned int length, |
| 128 | unsigned int word_length, |
| 129 | unsigned int total_length, |
| 130 | CGEN_INSN_BYTES_PTR buffer) |
| 131 | { |
| 132 | static char errbuf[100]; |
| 133 | /* Written this way to avoid undefined behaviour. */ |
| 134 | unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 135 | |
| 136 | /* If LENGTH is zero, this operand doesn't contribute to the value. */ |
| 137 | if (length == 0) |
| 138 | return NULL; |
| 139 | |
| 140 | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
| 141 | abort (); |
| 142 | |
| 143 | /* For architectures with insns smaller than the base-insn-bitsize, |
| 144 | word_length may be too big. */ |
| 145 | if (cd->min_insn_bitsize < cd->base_insn_bitsize) |
| 146 | { |
| 147 | if (word_offset == 0 |
| 148 | && word_length > total_length) |
| 149 | word_length = total_length; |
| 150 | } |
| 151 | |
| 152 | /* Ensure VALUE will fit. */ |
| 153 | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) |
| 154 | { |
| 155 | long minval = - (1L << (length - 1)); |
| 156 | unsigned long maxval = mask; |
| 157 | |
| 158 | if ((value > 0 && (unsigned long) value > maxval) |
| 159 | || value < minval) |
| 160 | { |
| 161 | /* xgettext:c-format */ |
| 162 | sprintf (errbuf, |
| 163 | _("operand out of range (%ld not between %ld and %lu)"), |
| 164 | value, minval, maxval); |
| 165 | return errbuf; |
| 166 | } |
| 167 | } |
| 168 | else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) |
| 169 | { |
| 170 | unsigned long maxval = mask; |
| 171 | unsigned long val = (unsigned long) value; |
| 172 | |
| 173 | /* For hosts with a word size > 32 check to see if value has been sign |
| 174 | extended beyond 32 bits. If so then ignore these higher sign bits |
| 175 | as the user is attempting to store a 32-bit signed value into an |
| 176 | unsigned 32-bit field which is allowed. */ |
| 177 | if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) |
| 178 | val &= 0xFFFFFFFF; |
| 179 | |
| 180 | if (val > maxval) |
| 181 | { |
| 182 | /* xgettext:c-format */ |
| 183 | sprintf (errbuf, |
| 184 | _("operand out of range (0x%lx not between 0 and 0x%lx)"), |
| 185 | val, maxval); |
| 186 | return errbuf; |
| 187 | } |
| 188 | } |
| 189 | else |
| 190 | { |
| 191 | if (! cgen_signed_overflow_ok_p (cd)) |
| 192 | { |
| 193 | long minval = - (1L << (length - 1)); |
| 194 | long maxval = (1L << (length - 1)) - 1; |
| 195 | |
| 196 | if (value < minval || value > maxval) |
| 197 | { |
| 198 | sprintf |
| 199 | /* xgettext:c-format */ |
| 200 | (errbuf, _("operand out of range (%ld not between %ld and %ld)"), |
| 201 | value, minval, maxval); |
| 202 | return errbuf; |
| 203 | } |
| 204 | } |
| 205 | } |
| 206 | |
| 207 | #if CGEN_INT_INSN_P |
| 208 | |
| 209 | { |
| 210 | int shift_within_word, shift_to_word, shift; |
| 211 | |
| 212 | /* How to shift the value to BIT0 of the word. */ |
| 213 | shift_to_word = total_length - (word_offset + word_length); |
| 214 | |
| 215 | /* How to shift the value to the field within the word. */ |
| 216 | if (CGEN_INSN_LSB0_P) |
| 217 | shift_within_word = start + 1 - length; |
| 218 | else |
| 219 | shift_within_word = word_length - start - length; |
| 220 | |
| 221 | /* The total SHIFT, then mask in the value. */ |
| 222 | shift = shift_to_word + shift_within_word; |
| 223 | *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); |
| 224 | } |
| 225 | |
| 226 | #else /* ! CGEN_INT_INSN_P */ |
| 227 | |
| 228 | { |
| 229 | unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; |
| 230 | |
| 231 | insert_1 (cd, value, start, length, word_length, bufp); |
| 232 | } |
| 233 | |
| 234 | #endif /* ! CGEN_INT_INSN_P */ |
| 235 | |
| 236 | return NULL; |
| 237 | } |
| 238 | |
| 239 | /* Default insn builder (insert handler). |
| 240 | The instruction is recorded in CGEN_INT_INSN_P byte order (meaning |
| 241 | that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is |
| 242 | recorded in host byte order, otherwise BUFFER is an array of bytes |
| 243 | and the value is recorded in target byte order). |
| 244 | The result is an error message or NULL if success. */ |
| 245 | |
| 246 | static const char * |
| 247 | insert_insn_normal (CGEN_CPU_DESC cd, |
| 248 | const CGEN_INSN * insn, |
| 249 | CGEN_FIELDS * fields, |
| 250 | CGEN_INSN_BYTES_PTR buffer, |
| 251 | bfd_vma pc) |
| 252 | { |
| 253 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); |
| 254 | unsigned long value; |
| 255 | const CGEN_SYNTAX_CHAR_TYPE * syn; |
| 256 | |
| 257 | CGEN_INIT_INSERT (cd); |
| 258 | value = CGEN_INSN_BASE_VALUE (insn); |
| 259 | |
| 260 | /* If we're recording insns as numbers (rather than a string of bytes), |
| 261 | target byte order handling is deferred until later. */ |
| 262 | |
| 263 | #if CGEN_INT_INSN_P |
| 264 | |
| 265 | put_insn_int_value (cd, buffer, cd->base_insn_bitsize, |
| 266 | CGEN_FIELDS_BITSIZE (fields), value); |
| 267 | |
| 268 | #else |
| 269 | |
| 270 | cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, |
| 271 | (unsigned) CGEN_FIELDS_BITSIZE (fields)), |
| 272 | value); |
| 273 | |
| 274 | #endif /* ! CGEN_INT_INSN_P */ |
| 275 | |
| 276 | /* ??? It would be better to scan the format's fields. |
| 277 | Still need to be able to insert a value based on the operand though; |
| 278 | e.g. storing a branch displacement that got resolved later. |
| 279 | Needs more thought first. */ |
| 280 | |
| 281 | for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) |
| 282 | { |
| 283 | const char *errmsg; |
| 284 | |
| 285 | if (CGEN_SYNTAX_CHAR_P (* syn)) |
| 286 | continue; |
| 287 | |
| 288 | errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), |
| 289 | fields, buffer, pc); |
| 290 | if (errmsg) |
| 291 | return errmsg; |
| 292 | } |
| 293 | |
| 294 | return NULL; |
| 295 | } |
| 296 | |
| 297 | #if CGEN_INT_INSN_P |
| 298 | /* Cover function to store an insn value into an integral insn. Must go here |
| 299 | because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ |
| 300 | |
| 301 | static void |
| 302 | put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 303 | CGEN_INSN_BYTES_PTR buf, |
| 304 | int length, |
| 305 | int insn_length, |
| 306 | CGEN_INSN_INT value) |
| 307 | { |
| 308 | /* For architectures with insns smaller than the base-insn-bitsize, |
| 309 | length may be too big. */ |
| 310 | if (length > insn_length) |
| 311 | *buf = value; |
| 312 | else |
| 313 | { |
| 314 | int shift = insn_length - length; |
| 315 | /* Written this way to avoid undefined behaviour. */ |
| 316 | CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 317 | |
| 318 | *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); |
| 319 | } |
| 320 | } |
| 321 | #endif |
| 322 | |
| 323 | /* Operand extraction. */ |
| 324 | |
| 325 | #if ! CGEN_INT_INSN_P |
| 326 | |
| 327 | /* Subroutine of extract_normal. |
| 328 | Ensure sufficient bytes are cached in EX_INFO. |
| 329 | OFFSET is the offset in bytes from the start of the insn of the value. |
| 330 | BYTES is the length of the needed value. |
| 331 | Returns 1 for success, 0 for failure. */ |
| 332 | |
| 333 | static CGEN_INLINE int |
| 334 | fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 335 | CGEN_EXTRACT_INFO *ex_info, |
| 336 | int offset, |
| 337 | int bytes, |
| 338 | bfd_vma pc) |
| 339 | { |
| 340 | /* It's doubtful that the middle part has already been fetched so |
| 341 | we don't optimize that case. kiss. */ |
| 342 | unsigned int mask; |
| 343 | disassemble_info *info = (disassemble_info *) ex_info->dis_info; |
| 344 | |
| 345 | /* First do a quick check. */ |
| 346 | mask = (1 << bytes) - 1; |
| 347 | if (((ex_info->valid >> offset) & mask) == mask) |
| 348 | return 1; |
| 349 | |
| 350 | /* Search for the first byte we need to read. */ |
| 351 | for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) |
| 352 | if (! (mask & ex_info->valid)) |
| 353 | break; |
| 354 | |
| 355 | if (bytes) |
| 356 | { |
| 357 | int status; |
| 358 | |
| 359 | pc += offset; |
| 360 | status = (*info->read_memory_func) |
| 361 | (pc, ex_info->insn_bytes + offset, bytes, info); |
| 362 | |
| 363 | if (status != 0) |
| 364 | { |
| 365 | (*info->memory_error_func) (status, pc, info); |
| 366 | return 0; |
| 367 | } |
| 368 | |
| 369 | ex_info->valid |= ((1 << bytes) - 1) << offset; |
| 370 | } |
| 371 | |
| 372 | return 1; |
| 373 | } |
| 374 | |
| 375 | /* Subroutine of extract_normal. */ |
| 376 | |
| 377 | static CGEN_INLINE long |
| 378 | extract_1 (CGEN_CPU_DESC cd, |
| 379 | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, |
| 380 | int start, |
| 381 | int length, |
| 382 | int word_length, |
| 383 | unsigned char *bufp, |
| 384 | bfd_vma pc ATTRIBUTE_UNUSED) |
| 385 | { |
| 386 | unsigned long x; |
| 387 | int shift; |
| 388 | |
| 389 | x = cgen_get_insn_value (cd, bufp, word_length); |
| 390 | |
| 391 | if (CGEN_INSN_LSB0_P) |
| 392 | shift = (start + 1) - length; |
| 393 | else |
| 394 | shift = (word_length - (start + length)); |
| 395 | return x >> shift; |
| 396 | } |
| 397 | |
| 398 | #endif /* ! CGEN_INT_INSN_P */ |
| 399 | |
| 400 | /* Default extraction routine. |
| 401 | |
| 402 | INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, |
| 403 | or sometimes less for cases like the m32r where the base insn size is 32 |
| 404 | but some insns are 16 bits. |
| 405 | ATTRS is a mask of the boolean attributes. We only need `SIGNED', |
| 406 | but for generality we take a bitmask of all of them. |
| 407 | WORD_OFFSET is the offset in bits from the start of the insn of the value. |
| 408 | WORD_LENGTH is the length of the word in bits in which the value resides. |
| 409 | START is the starting bit number in the word, architecture origin. |
| 410 | LENGTH is the length of VALUE in bits. |
| 411 | TOTAL_LENGTH is the total length of the insn in bits. |
| 412 | |
| 413 | Returns 1 for success, 0 for failure. */ |
| 414 | |
| 415 | /* ??? The return code isn't properly used. wip. */ |
| 416 | |
| 417 | /* ??? This doesn't handle bfd_vma's. Create another function when |
| 418 | necessary. */ |
| 419 | |
| 420 | static int |
| 421 | extract_normal (CGEN_CPU_DESC cd, |
| 422 | #if ! CGEN_INT_INSN_P |
| 423 | CGEN_EXTRACT_INFO *ex_info, |
| 424 | #else |
| 425 | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, |
| 426 | #endif |
| 427 | CGEN_INSN_INT insn_value, |
| 428 | unsigned int attrs, |
| 429 | unsigned int word_offset, |
| 430 | unsigned int start, |
| 431 | unsigned int length, |
| 432 | unsigned int word_length, |
| 433 | unsigned int total_length, |
| 434 | #if ! CGEN_INT_INSN_P |
| 435 | bfd_vma pc, |
| 436 | #else |
| 437 | bfd_vma pc ATTRIBUTE_UNUSED, |
| 438 | #endif |
| 439 | long *valuep) |
| 440 | { |
| 441 | long value, mask; |
| 442 | |
| 443 | /* If LENGTH is zero, this operand doesn't contribute to the value |
| 444 | so give it a standard value of zero. */ |
| 445 | if (length == 0) |
| 446 | { |
| 447 | *valuep = 0; |
| 448 | return 1; |
| 449 | } |
| 450 | |
| 451 | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
| 452 | abort (); |
| 453 | |
| 454 | /* For architectures with insns smaller than the insn-base-bitsize, |
| 455 | word_length may be too big. */ |
| 456 | if (cd->min_insn_bitsize < cd->base_insn_bitsize) |
| 457 | { |
| 458 | if (word_offset + word_length > total_length) |
| 459 | word_length = total_length - word_offset; |
| 460 | } |
| 461 | |
| 462 | /* Does the value reside in INSN_VALUE, and at the right alignment? */ |
| 463 | |
| 464 | if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) |
| 465 | { |
| 466 | if (CGEN_INSN_LSB0_P) |
| 467 | value = insn_value >> ((word_offset + start + 1) - length); |
| 468 | else |
| 469 | value = insn_value >> (total_length - ( word_offset + start + length)); |
| 470 | } |
| 471 | |
| 472 | #if ! CGEN_INT_INSN_P |
| 473 | |
| 474 | else |
| 475 | { |
| 476 | unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; |
| 477 | |
| 478 | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
| 479 | abort (); |
| 480 | |
| 481 | if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) |
| 482 | return 0; |
| 483 | |
| 484 | value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); |
| 485 | } |
| 486 | |
| 487 | #endif /* ! CGEN_INT_INSN_P */ |
| 488 | |
| 489 | /* Written this way to avoid undefined behaviour. */ |
| 490 | mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 491 | |
| 492 | value &= mask; |
| 493 | /* sign extend? */ |
| 494 | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) |
| 495 | && (value & (1L << (length - 1)))) |
| 496 | value |= ~mask; |
| 497 | |
| 498 | *valuep = value; |
| 499 | |
| 500 | return 1; |
| 501 | } |
| 502 | |
| 503 | /* Default insn extractor. |
| 504 | |
| 505 | INSN_VALUE is the first base_insn_bitsize bits, translated to host order. |
| 506 | The extracted fields are stored in FIELDS. |
| 507 | EX_INFO is used to handle reading variable length insns. |
| 508 | Return the length of the insn in bits, or 0 if no match, |
| 509 | or -1 if an error occurs fetching data (memory_error_func will have |
| 510 | been called). */ |
| 511 | |
| 512 | static int |
| 513 | extract_insn_normal (CGEN_CPU_DESC cd, |
| 514 | const CGEN_INSN *insn, |
| 515 | CGEN_EXTRACT_INFO *ex_info, |
| 516 | CGEN_INSN_INT insn_value, |
| 517 | CGEN_FIELDS *fields, |
| 518 | bfd_vma pc) |
| 519 | { |
| 520 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); |
| 521 | const CGEN_SYNTAX_CHAR_TYPE *syn; |
| 522 | |
| 523 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); |
| 524 | |
| 525 | CGEN_INIT_EXTRACT (cd); |
| 526 | |
| 527 | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) |
| 528 | { |
| 529 | int length; |
| 530 | |
| 531 | if (CGEN_SYNTAX_CHAR_P (*syn)) |
| 532 | continue; |
| 533 | |
| 534 | length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), |
| 535 | ex_info, insn_value, fields, pc); |
| 536 | if (length <= 0) |
| 537 | return length; |
| 538 | } |
| 539 | |
| 540 | /* We recognized and successfully extracted this insn. */ |
| 541 | return CGEN_INSN_BITSIZE (insn); |
| 542 | } |
| 543 | |
| 544 | /* Machine generated code added here. */ |
| 545 | |
| 546 | const char * mt_cgen_insert_operand |
| 547 | (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); |
| 548 | |
| 549 | /* Main entry point for operand insertion. |
| 550 | |
| 551 | This function is basically just a big switch statement. Earlier versions |
| 552 | used tables to look up the function to use, but |
| 553 | - if the table contains both assembler and disassembler functions then |
| 554 | the disassembler contains much of the assembler and vice-versa, |
| 555 | - there's a lot of inlining possibilities as things grow, |
| 556 | - using a switch statement avoids the function call overhead. |
| 557 | |
| 558 | This function could be moved into `parse_insn_normal', but keeping it |
| 559 | separate makes clear the interface between `parse_insn_normal' and each of |
| 560 | the handlers. It's also needed by GAS to insert operands that couldn't be |
| 561 | resolved during parsing. */ |
| 562 | |
| 563 | const char * |
| 564 | mt_cgen_insert_operand (CGEN_CPU_DESC cd, |
| 565 | int opindex, |
| 566 | CGEN_FIELDS * fields, |
| 567 | CGEN_INSN_BYTES_PTR buffer, |
| 568 | bfd_vma pc ATTRIBUTE_UNUSED) |
| 569 | { |
| 570 | const char * errmsg = NULL; |
| 571 | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); |
| 572 | |
| 573 | switch (opindex) |
| 574 | { |
| 575 | case MT_OPERAND_A23 : |
| 576 | errmsg = insert_normal (cd, fields->f_a23, 0, 0, 23, 1, 32, total_length, buffer); |
| 577 | break; |
| 578 | case MT_OPERAND_BALL : |
| 579 | errmsg = insert_normal (cd, fields->f_ball, 0, 0, 19, 1, 32, total_length, buffer); |
| 580 | break; |
| 581 | case MT_OPERAND_BALL2 : |
| 582 | errmsg = insert_normal (cd, fields->f_ball2, 0, 0, 15, 1, 32, total_length, buffer); |
| 583 | break; |
| 584 | case MT_OPERAND_BANKADDR : |
| 585 | errmsg = insert_normal (cd, fields->f_bankaddr, 0, 0, 25, 13, 32, total_length, buffer); |
| 586 | break; |
| 587 | case MT_OPERAND_BRC : |
| 588 | errmsg = insert_normal (cd, fields->f_brc, 0, 0, 18, 3, 32, total_length, buffer); |
| 589 | break; |
| 590 | case MT_OPERAND_BRC2 : |
| 591 | errmsg = insert_normal (cd, fields->f_brc2, 0, 0, 14, 3, 32, total_length, buffer); |
| 592 | break; |
| 593 | case MT_OPERAND_CB1INCR : |
| 594 | errmsg = insert_normal (cd, fields->f_cb1incr, 0|(1<<CGEN_IFLD_SIGNED), 0, 19, 6, 32, total_length, buffer); |
| 595 | break; |
| 596 | case MT_OPERAND_CB1SEL : |
| 597 | errmsg = insert_normal (cd, fields->f_cb1sel, 0, 0, 25, 3, 32, total_length, buffer); |
| 598 | break; |
| 599 | case MT_OPERAND_CB2INCR : |
| 600 | errmsg = insert_normal (cd, fields->f_cb2incr, 0|(1<<CGEN_IFLD_SIGNED), 0, 13, 6, 32, total_length, buffer); |
| 601 | break; |
| 602 | case MT_OPERAND_CB2SEL : |
| 603 | errmsg = insert_normal (cd, fields->f_cb2sel, 0, 0, 22, 3, 32, total_length, buffer); |
| 604 | break; |
| 605 | case MT_OPERAND_CBRB : |
| 606 | errmsg = insert_normal (cd, fields->f_cbrb, 0, 0, 10, 1, 32, total_length, buffer); |
| 607 | break; |
| 608 | case MT_OPERAND_CBS : |
| 609 | errmsg = insert_normal (cd, fields->f_cbs, 0, 0, 19, 2, 32, total_length, buffer); |
| 610 | break; |
| 611 | case MT_OPERAND_CBX : |
| 612 | errmsg = insert_normal (cd, fields->f_cbx, 0, 0, 14, 3, 32, total_length, buffer); |
| 613 | break; |
| 614 | case MT_OPERAND_CCB : |
| 615 | errmsg = insert_normal (cd, fields->f_ccb, 0, 0, 11, 1, 32, total_length, buffer); |
| 616 | break; |
| 617 | case MT_OPERAND_CDB : |
| 618 | errmsg = insert_normal (cd, fields->f_cdb, 0, 0, 10, 1, 32, total_length, buffer); |
| 619 | break; |
| 620 | case MT_OPERAND_CELL : |
| 621 | errmsg = insert_normal (cd, fields->f_cell, 0, 0, 9, 3, 32, total_length, buffer); |
| 622 | break; |
| 623 | case MT_OPERAND_COLNUM : |
| 624 | errmsg = insert_normal (cd, fields->f_colnum, 0, 0, 18, 3, 32, total_length, buffer); |
| 625 | break; |
| 626 | case MT_OPERAND_CONTNUM : |
| 627 | errmsg = insert_normal (cd, fields->f_contnum, 0, 0, 8, 9, 32, total_length, buffer); |
| 628 | break; |
| 629 | case MT_OPERAND_CR : |
| 630 | errmsg = insert_normal (cd, fields->f_cr, 0, 0, 22, 3, 32, total_length, buffer); |
| 631 | break; |
| 632 | case MT_OPERAND_CTXDISP : |
| 633 | errmsg = insert_normal (cd, fields->f_ctxdisp, 0, 0, 5, 6, 32, total_length, buffer); |
| 634 | break; |
| 635 | case MT_OPERAND_DUP : |
| 636 | errmsg = insert_normal (cd, fields->f_dup, 0, 0, 6, 1, 32, total_length, buffer); |
| 637 | break; |
| 638 | case MT_OPERAND_FBDISP : |
| 639 | errmsg = insert_normal (cd, fields->f_fbdisp, 0, 0, 15, 6, 32, total_length, buffer); |
| 640 | break; |
| 641 | case MT_OPERAND_FBINCR : |
| 642 | errmsg = insert_normal (cd, fields->f_fbincr, 0, 0, 23, 4, 32, total_length, buffer); |
| 643 | break; |
| 644 | case MT_OPERAND_FRDR : |
| 645 | errmsg = insert_normal (cd, fields->f_dr, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, buffer); |
| 646 | break; |
| 647 | case MT_OPERAND_FRDRRR : |
| 648 | errmsg = insert_normal (cd, fields->f_drrr, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 4, 32, total_length, buffer); |
| 649 | break; |
| 650 | case MT_OPERAND_FRSR1 : |
| 651 | errmsg = insert_normal (cd, fields->f_sr1, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 23, 4, 32, total_length, buffer); |
| 652 | break; |
| 653 | case MT_OPERAND_FRSR2 : |
| 654 | errmsg = insert_normal (cd, fields->f_sr2, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, buffer); |
| 655 | break; |
| 656 | case MT_OPERAND_ID : |
| 657 | errmsg = insert_normal (cd, fields->f_id, 0, 0, 14, 1, 32, total_length, buffer); |
| 658 | break; |
| 659 | case MT_OPERAND_IMM16 : |
| 660 | { |
| 661 | long value = fields->f_imm16s; |
| 662 | value = ((value) + (0)); |
| 663 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); |
| 664 | } |
| 665 | break; |
| 666 | case MT_OPERAND_IMM16L : |
| 667 | errmsg = insert_normal (cd, fields->f_imm16l, 0, 0, 23, 16, 32, total_length, buffer); |
| 668 | break; |
| 669 | case MT_OPERAND_IMM16O : |
| 670 | { |
| 671 | long value = fields->f_imm16s; |
| 672 | value = ((value) + (0)); |
| 673 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer); |
| 674 | } |
| 675 | break; |
| 676 | case MT_OPERAND_IMM16Z : |
| 677 | errmsg = insert_normal (cd, fields->f_imm16u, 0, 0, 15, 16, 32, total_length, buffer); |
| 678 | break; |
| 679 | case MT_OPERAND_INCAMT : |
| 680 | errmsg = insert_normal (cd, fields->f_incamt, 0, 0, 19, 8, 32, total_length, buffer); |
| 681 | break; |
| 682 | case MT_OPERAND_INCR : |
| 683 | errmsg = insert_normal (cd, fields->f_incr, 0, 0, 17, 6, 32, total_length, buffer); |
| 684 | break; |
| 685 | case MT_OPERAND_LENGTH : |
| 686 | errmsg = insert_normal (cd, fields->f_length, 0, 0, 15, 3, 32, total_length, buffer); |
| 687 | break; |
| 688 | case MT_OPERAND_LOOPSIZE : |
| 689 | { |
| 690 | long value = fields->f_loopo; |
| 691 | value = ((USI) (value) >> (2)); |
| 692 | errmsg = insert_normal (cd, value, 0, 0, 7, 8, 32, total_length, buffer); |
| 693 | } |
| 694 | break; |
| 695 | case MT_OPERAND_MASK : |
| 696 | errmsg = insert_normal (cd, fields->f_mask, 0, 0, 25, 16, 32, total_length, buffer); |
| 697 | break; |
| 698 | case MT_OPERAND_MASK1 : |
| 699 | errmsg = insert_normal (cd, fields->f_mask1, 0, 0, 22, 3, 32, total_length, buffer); |
| 700 | break; |
| 701 | case MT_OPERAND_MODE : |
| 702 | errmsg = insert_normal (cd, fields->f_mode, 0, 0, 25, 2, 32, total_length, buffer); |
| 703 | break; |
| 704 | case MT_OPERAND_PERM : |
| 705 | errmsg = insert_normal (cd, fields->f_perm, 0, 0, 25, 2, 32, total_length, buffer); |
| 706 | break; |
| 707 | case MT_OPERAND_RBBC : |
| 708 | errmsg = insert_normal (cd, fields->f_rbbc, 0, 0, 25, 2, 32, total_length, buffer); |
| 709 | break; |
| 710 | case MT_OPERAND_RC : |
| 711 | errmsg = insert_normal (cd, fields->f_rc, 0, 0, 15, 1, 32, total_length, buffer); |
| 712 | break; |
| 713 | case MT_OPERAND_RC1 : |
| 714 | errmsg = insert_normal (cd, fields->f_rc1, 0, 0, 11, 1, 32, total_length, buffer); |
| 715 | break; |
| 716 | case MT_OPERAND_RC2 : |
| 717 | errmsg = insert_normal (cd, fields->f_rc2, 0, 0, 6, 1, 32, total_length, buffer); |
| 718 | break; |
| 719 | case MT_OPERAND_RC3 : |
| 720 | errmsg = insert_normal (cd, fields->f_rc3, 0, 0, 7, 1, 32, total_length, buffer); |
| 721 | break; |
| 722 | case MT_OPERAND_RCNUM : |
| 723 | errmsg = insert_normal (cd, fields->f_rcnum, 0, 0, 14, 3, 32, total_length, buffer); |
| 724 | break; |
| 725 | case MT_OPERAND_RDA : |
| 726 | errmsg = insert_normal (cd, fields->f_rda, 0, 0, 25, 1, 32, total_length, buffer); |
| 727 | break; |
| 728 | case MT_OPERAND_ROWNUM : |
| 729 | errmsg = insert_normal (cd, fields->f_rownum, 0, 0, 14, 3, 32, total_length, buffer); |
| 730 | break; |
| 731 | case MT_OPERAND_ROWNUM1 : |
| 732 | errmsg = insert_normal (cd, fields->f_rownum1, 0, 0, 12, 3, 32, total_length, buffer); |
| 733 | break; |
| 734 | case MT_OPERAND_ROWNUM2 : |
| 735 | errmsg = insert_normal (cd, fields->f_rownum2, 0, 0, 9, 3, 32, total_length, buffer); |
| 736 | break; |
| 737 | case MT_OPERAND_SIZE : |
| 738 | errmsg = insert_normal (cd, fields->f_size, 0, 0, 13, 14, 32, total_length, buffer); |
| 739 | break; |
| 740 | case MT_OPERAND_TYPE : |
| 741 | errmsg = insert_normal (cd, fields->f_type, 0, 0, 21, 2, 32, total_length, buffer); |
| 742 | break; |
| 743 | case MT_OPERAND_WR : |
| 744 | errmsg = insert_normal (cd, fields->f_wr, 0, 0, 24, 1, 32, total_length, buffer); |
| 745 | break; |
| 746 | case MT_OPERAND_XMODE : |
| 747 | errmsg = insert_normal (cd, fields->f_xmode, 0, 0, 23, 1, 32, total_length, buffer); |
| 748 | break; |
| 749 | |
| 750 | default : |
| 751 | /* xgettext:c-format */ |
| 752 | fprintf (stderr, _("Unrecognized field %d while building insn.\n"), |
| 753 | opindex); |
| 754 | abort (); |
| 755 | } |
| 756 | |
| 757 | return errmsg; |
| 758 | } |
| 759 | |
| 760 | int mt_cgen_extract_operand |
| 761 | (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); |
| 762 | |
| 763 | /* Main entry point for operand extraction. |
| 764 | The result is <= 0 for error, >0 for success. |
| 765 | ??? Actual values aren't well defined right now. |
| 766 | |
| 767 | This function is basically just a big switch statement. Earlier versions |
| 768 | used tables to look up the function to use, but |
| 769 | - if the table contains both assembler and disassembler functions then |
| 770 | the disassembler contains much of the assembler and vice-versa, |
| 771 | - there's a lot of inlining possibilities as things grow, |
| 772 | - using a switch statement avoids the function call overhead. |
| 773 | |
| 774 | This function could be moved into `print_insn_normal', but keeping it |
| 775 | separate makes clear the interface between `print_insn_normal' and each of |
| 776 | the handlers. */ |
| 777 | |
| 778 | int |
| 779 | mt_cgen_extract_operand (CGEN_CPU_DESC cd, |
| 780 | int opindex, |
| 781 | CGEN_EXTRACT_INFO *ex_info, |
| 782 | CGEN_INSN_INT insn_value, |
| 783 | CGEN_FIELDS * fields, |
| 784 | bfd_vma pc) |
| 785 | { |
| 786 | /* Assume success (for those operands that are nops). */ |
| 787 | int length = 1; |
| 788 | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); |
| 789 | |
| 790 | switch (opindex) |
| 791 | { |
| 792 | case MT_OPERAND_A23 : |
| 793 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 1, 32, total_length, pc, & fields->f_a23); |
| 794 | break; |
| 795 | case MT_OPERAND_BALL : |
| 796 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_ball); |
| 797 | break; |
| 798 | case MT_OPERAND_BALL2 : |
| 799 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_ball2); |
| 800 | break; |
| 801 | case MT_OPERAND_BANKADDR : |
| 802 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 13, 32, total_length, pc, & fields->f_bankaddr); |
| 803 | break; |
| 804 | case MT_OPERAND_BRC : |
| 805 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 3, 32, total_length, pc, & fields->f_brc); |
| 806 | break; |
| 807 | case MT_OPERAND_BRC2 : |
| 808 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_brc2); |
| 809 | break; |
| 810 | case MT_OPERAND_CB1INCR : |
| 811 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 19, 6, 32, total_length, pc, & fields->f_cb1incr); |
| 812 | break; |
| 813 | case MT_OPERAND_CB1SEL : |
| 814 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 3, 32, total_length, pc, & fields->f_cb1sel); |
| 815 | break; |
| 816 | case MT_OPERAND_CB2INCR : |
| 817 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 13, 6, 32, total_length, pc, & fields->f_cb2incr); |
| 818 | break; |
| 819 | case MT_OPERAND_CB2SEL : |
| 820 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 3, 32, total_length, pc, & fields->f_cb2sel); |
| 821 | break; |
| 822 | case MT_OPERAND_CBRB : |
| 823 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 1, 32, total_length, pc, & fields->f_cbrb); |
| 824 | break; |
| 825 | case MT_OPERAND_CBS : |
| 826 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 2, 32, total_length, pc, & fields->f_cbs); |
| 827 | break; |
| 828 | case MT_OPERAND_CBX : |
| 829 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_cbx); |
| 830 | break; |
| 831 | case MT_OPERAND_CCB : |
| 832 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_ccb); |
| 833 | break; |
| 834 | case MT_OPERAND_CDB : |
| 835 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 1, 32, total_length, pc, & fields->f_cdb); |
| 836 | break; |
| 837 | case MT_OPERAND_CELL : |
| 838 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_cell); |
| 839 | break; |
| 840 | case MT_OPERAND_COLNUM : |
| 841 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 3, 32, total_length, pc, & fields->f_colnum); |
| 842 | break; |
| 843 | case MT_OPERAND_CONTNUM : |
| 844 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_contnum); |
| 845 | break; |
| 846 | case MT_OPERAND_CR : |
| 847 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 3, 32, total_length, pc, & fields->f_cr); |
| 848 | break; |
| 849 | case MT_OPERAND_CTXDISP : |
| 850 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 6, 32, total_length, pc, & fields->f_ctxdisp); |
| 851 | break; |
| 852 | case MT_OPERAND_DUP : |
| 853 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 1, 32, total_length, pc, & fields->f_dup); |
| 854 | break; |
| 855 | case MT_OPERAND_FBDISP : |
| 856 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 6, 32, total_length, pc, & fields->f_fbdisp); |
| 857 | break; |
| 858 | case MT_OPERAND_FBINCR : |
| 859 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 4, 32, total_length, pc, & fields->f_fbincr); |
| 860 | break; |
| 861 | case MT_OPERAND_FRDR : |
| 862 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, pc, & fields->f_dr); |
| 863 | break; |
| 864 | case MT_OPERAND_FRDRRR : |
| 865 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 4, 32, total_length, pc, & fields->f_drrr); |
| 866 | break; |
| 867 | case MT_OPERAND_FRSR1 : |
| 868 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 23, 4, 32, total_length, pc, & fields->f_sr1); |
| 869 | break; |
| 870 | case MT_OPERAND_FRSR2 : |
| 871 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, pc, & fields->f_sr2); |
| 872 | break; |
| 873 | case MT_OPERAND_ID : |
| 874 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_id); |
| 875 | break; |
| 876 | case MT_OPERAND_IMM16 : |
| 877 | { |
| 878 | long value; |
| 879 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & value); |
| 880 | value = ((value) + (0)); |
| 881 | fields->f_imm16s = value; |
| 882 | } |
| 883 | break; |
| 884 | case MT_OPERAND_IMM16L : |
| 885 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 16, 32, total_length, pc, & fields->f_imm16l); |
| 886 | break; |
| 887 | case MT_OPERAND_IMM16O : |
| 888 | { |
| 889 | long value; |
| 890 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & value); |
| 891 | value = ((value) + (0)); |
| 892 | fields->f_imm16s = value; |
| 893 | } |
| 894 | break; |
| 895 | case MT_OPERAND_IMM16Z : |
| 896 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm16u); |
| 897 | break; |
| 898 | case MT_OPERAND_INCAMT : |
| 899 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 8, 32, total_length, pc, & fields->f_incamt); |
| 900 | break; |
| 901 | case MT_OPERAND_INCR : |
| 902 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 6, 32, total_length, pc, & fields->f_incr); |
| 903 | break; |
| 904 | case MT_OPERAND_LENGTH : |
| 905 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_length); |
| 906 | break; |
| 907 | case MT_OPERAND_LOOPSIZE : |
| 908 | { |
| 909 | long value; |
| 910 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 8, 32, total_length, pc, & value); |
| 911 | value = ((((value) << (2))) + (8)); |
| 912 | fields->f_loopo = value; |
| 913 | } |
| 914 | break; |
| 915 | case MT_OPERAND_MASK : |
| 916 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 16, 32, total_length, pc, & fields->f_mask); |
| 917 | break; |
| 918 | case MT_OPERAND_MASK1 : |
| 919 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 3, 32, total_length, pc, & fields->f_mask1); |
| 920 | break; |
| 921 | case MT_OPERAND_MODE : |
| 922 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 2, 32, total_length, pc, & fields->f_mode); |
| 923 | break; |
| 924 | case MT_OPERAND_PERM : |
| 925 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 2, 32, total_length, pc, & fields->f_perm); |
| 926 | break; |
| 927 | case MT_OPERAND_RBBC : |
| 928 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 2, 32, total_length, pc, & fields->f_rbbc); |
| 929 | break; |
| 930 | case MT_OPERAND_RC : |
| 931 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_rc); |
| 932 | break; |
| 933 | case MT_OPERAND_RC1 : |
| 934 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_rc1); |
| 935 | break; |
| 936 | case MT_OPERAND_RC2 : |
| 937 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 1, 32, total_length, pc, & fields->f_rc2); |
| 938 | break; |
| 939 | case MT_OPERAND_RC3 : |
| 940 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_rc3); |
| 941 | break; |
| 942 | case MT_OPERAND_RCNUM : |
| 943 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_rcnum); |
| 944 | break; |
| 945 | case MT_OPERAND_RDA : |
| 946 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 1, 32, total_length, pc, & fields->f_rda); |
| 947 | break; |
| 948 | case MT_OPERAND_ROWNUM : |
| 949 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_rownum); |
| 950 | break; |
| 951 | case MT_OPERAND_ROWNUM1 : |
| 952 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_rownum1); |
| 953 | break; |
| 954 | case MT_OPERAND_ROWNUM2 : |
| 955 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_rownum2); |
| 956 | break; |
| 957 | case MT_OPERAND_SIZE : |
| 958 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 14, 32, total_length, pc, & fields->f_size); |
| 959 | break; |
| 960 | case MT_OPERAND_TYPE : |
| 961 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 2, 32, total_length, pc, & fields->f_type); |
| 962 | break; |
| 963 | case MT_OPERAND_WR : |
| 964 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 1, 32, total_length, pc, & fields->f_wr); |
| 965 | break; |
| 966 | case MT_OPERAND_XMODE : |
| 967 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 1, 32, total_length, pc, & fields->f_xmode); |
| 968 | break; |
| 969 | |
| 970 | default : |
| 971 | /* xgettext:c-format */ |
| 972 | fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), |
| 973 | opindex); |
| 974 | abort (); |
| 975 | } |
| 976 | |
| 977 | return length; |
| 978 | } |
| 979 | |
| 980 | cgen_insert_fn * const mt_cgen_insert_handlers[] = |
| 981 | { |
| 982 | insert_insn_normal, |
| 983 | }; |
| 984 | |
| 985 | cgen_extract_fn * const mt_cgen_extract_handlers[] = |
| 986 | { |
| 987 | extract_insn_normal, |
| 988 | }; |
| 989 | |
| 990 | int mt_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); |
| 991 | bfd_vma mt_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); |
| 992 | |
| 993 | /* Getting values from cgen_fields is handled by a collection of functions. |
| 994 | They are distinguished by the type of the VALUE argument they return. |
| 995 | TODO: floating point, inlining support, remove cases where result type |
| 996 | not appropriate. */ |
| 997 | |
| 998 | int |
| 999 | mt_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 1000 | int opindex, |
| 1001 | const CGEN_FIELDS * fields) |
| 1002 | { |
| 1003 | int value; |
| 1004 | |
| 1005 | switch (opindex) |
| 1006 | { |
| 1007 | case MT_OPERAND_A23 : |
| 1008 | value = fields->f_a23; |
| 1009 | break; |
| 1010 | case MT_OPERAND_BALL : |
| 1011 | value = fields->f_ball; |
| 1012 | break; |
| 1013 | case MT_OPERAND_BALL2 : |
| 1014 | value = fields->f_ball2; |
| 1015 | break; |
| 1016 | case MT_OPERAND_BANKADDR : |
| 1017 | value = fields->f_bankaddr; |
| 1018 | break; |
| 1019 | case MT_OPERAND_BRC : |
| 1020 | value = fields->f_brc; |
| 1021 | break; |
| 1022 | case MT_OPERAND_BRC2 : |
| 1023 | value = fields->f_brc2; |
| 1024 | break; |
| 1025 | case MT_OPERAND_CB1INCR : |
| 1026 | value = fields->f_cb1incr; |
| 1027 | break; |
| 1028 | case MT_OPERAND_CB1SEL : |
| 1029 | value = fields->f_cb1sel; |
| 1030 | break; |
| 1031 | case MT_OPERAND_CB2INCR : |
| 1032 | value = fields->f_cb2incr; |
| 1033 | break; |
| 1034 | case MT_OPERAND_CB2SEL : |
| 1035 | value = fields->f_cb2sel; |
| 1036 | break; |
| 1037 | case MT_OPERAND_CBRB : |
| 1038 | value = fields->f_cbrb; |
| 1039 | break; |
| 1040 | case MT_OPERAND_CBS : |
| 1041 | value = fields->f_cbs; |
| 1042 | break; |
| 1043 | case MT_OPERAND_CBX : |
| 1044 | value = fields->f_cbx; |
| 1045 | break; |
| 1046 | case MT_OPERAND_CCB : |
| 1047 | value = fields->f_ccb; |
| 1048 | break; |
| 1049 | case MT_OPERAND_CDB : |
| 1050 | value = fields->f_cdb; |
| 1051 | break; |
| 1052 | case MT_OPERAND_CELL : |
| 1053 | value = fields->f_cell; |
| 1054 | break; |
| 1055 | case MT_OPERAND_COLNUM : |
| 1056 | value = fields->f_colnum; |
| 1057 | break; |
| 1058 | case MT_OPERAND_CONTNUM : |
| 1059 | value = fields->f_contnum; |
| 1060 | break; |
| 1061 | case MT_OPERAND_CR : |
| 1062 | value = fields->f_cr; |
| 1063 | break; |
| 1064 | case MT_OPERAND_CTXDISP : |
| 1065 | value = fields->f_ctxdisp; |
| 1066 | break; |
| 1067 | case MT_OPERAND_DUP : |
| 1068 | value = fields->f_dup; |
| 1069 | break; |
| 1070 | case MT_OPERAND_FBDISP : |
| 1071 | value = fields->f_fbdisp; |
| 1072 | break; |
| 1073 | case MT_OPERAND_FBINCR : |
| 1074 | value = fields->f_fbincr; |
| 1075 | break; |
| 1076 | case MT_OPERAND_FRDR : |
| 1077 | value = fields->f_dr; |
| 1078 | break; |
| 1079 | case MT_OPERAND_FRDRRR : |
| 1080 | value = fields->f_drrr; |
| 1081 | break; |
| 1082 | case MT_OPERAND_FRSR1 : |
| 1083 | value = fields->f_sr1; |
| 1084 | break; |
| 1085 | case MT_OPERAND_FRSR2 : |
| 1086 | value = fields->f_sr2; |
| 1087 | break; |
| 1088 | case MT_OPERAND_ID : |
| 1089 | value = fields->f_id; |
| 1090 | break; |
| 1091 | case MT_OPERAND_IMM16 : |
| 1092 | value = fields->f_imm16s; |
| 1093 | break; |
| 1094 | case MT_OPERAND_IMM16L : |
| 1095 | value = fields->f_imm16l; |
| 1096 | break; |
| 1097 | case MT_OPERAND_IMM16O : |
| 1098 | value = fields->f_imm16s; |
| 1099 | break; |
| 1100 | case MT_OPERAND_IMM16Z : |
| 1101 | value = fields->f_imm16u; |
| 1102 | break; |
| 1103 | case MT_OPERAND_INCAMT : |
| 1104 | value = fields->f_incamt; |
| 1105 | break; |
| 1106 | case MT_OPERAND_INCR : |
| 1107 | value = fields->f_incr; |
| 1108 | break; |
| 1109 | case MT_OPERAND_LENGTH : |
| 1110 | value = fields->f_length; |
| 1111 | break; |
| 1112 | case MT_OPERAND_LOOPSIZE : |
| 1113 | value = fields->f_loopo; |
| 1114 | break; |
| 1115 | case MT_OPERAND_MASK : |
| 1116 | value = fields->f_mask; |
| 1117 | break; |
| 1118 | case MT_OPERAND_MASK1 : |
| 1119 | value = fields->f_mask1; |
| 1120 | break; |
| 1121 | case MT_OPERAND_MODE : |
| 1122 | value = fields->f_mode; |
| 1123 | break; |
| 1124 | case MT_OPERAND_PERM : |
| 1125 | value = fields->f_perm; |
| 1126 | break; |
| 1127 | case MT_OPERAND_RBBC : |
| 1128 | value = fields->f_rbbc; |
| 1129 | break; |
| 1130 | case MT_OPERAND_RC : |
| 1131 | value = fields->f_rc; |
| 1132 | break; |
| 1133 | case MT_OPERAND_RC1 : |
| 1134 | value = fields->f_rc1; |
| 1135 | break; |
| 1136 | case MT_OPERAND_RC2 : |
| 1137 | value = fields->f_rc2; |
| 1138 | break; |
| 1139 | case MT_OPERAND_RC3 : |
| 1140 | value = fields->f_rc3; |
| 1141 | break; |
| 1142 | case MT_OPERAND_RCNUM : |
| 1143 | value = fields->f_rcnum; |
| 1144 | break; |
| 1145 | case MT_OPERAND_RDA : |
| 1146 | value = fields->f_rda; |
| 1147 | break; |
| 1148 | case MT_OPERAND_ROWNUM : |
| 1149 | value = fields->f_rownum; |
| 1150 | break; |
| 1151 | case MT_OPERAND_ROWNUM1 : |
| 1152 | value = fields->f_rownum1; |
| 1153 | break; |
| 1154 | case MT_OPERAND_ROWNUM2 : |
| 1155 | value = fields->f_rownum2; |
| 1156 | break; |
| 1157 | case MT_OPERAND_SIZE : |
| 1158 | value = fields->f_size; |
| 1159 | break; |
| 1160 | case MT_OPERAND_TYPE : |
| 1161 | value = fields->f_type; |
| 1162 | break; |
| 1163 | case MT_OPERAND_WR : |
| 1164 | value = fields->f_wr; |
| 1165 | break; |
| 1166 | case MT_OPERAND_XMODE : |
| 1167 | value = fields->f_xmode; |
| 1168 | break; |
| 1169 | |
| 1170 | default : |
| 1171 | /* xgettext:c-format */ |
| 1172 | fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), |
| 1173 | opindex); |
| 1174 | abort (); |
| 1175 | } |
| 1176 | |
| 1177 | return value; |
| 1178 | } |
| 1179 | |
| 1180 | bfd_vma |
| 1181 | mt_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 1182 | int opindex, |
| 1183 | const CGEN_FIELDS * fields) |
| 1184 | { |
| 1185 | bfd_vma value; |
| 1186 | |
| 1187 | switch (opindex) |
| 1188 | { |
| 1189 | case MT_OPERAND_A23 : |
| 1190 | value = fields->f_a23; |
| 1191 | break; |
| 1192 | case MT_OPERAND_BALL : |
| 1193 | value = fields->f_ball; |
| 1194 | break; |
| 1195 | case MT_OPERAND_BALL2 : |
| 1196 | value = fields->f_ball2; |
| 1197 | break; |
| 1198 | case MT_OPERAND_BANKADDR : |
| 1199 | value = fields->f_bankaddr; |
| 1200 | break; |
| 1201 | case MT_OPERAND_BRC : |
| 1202 | value = fields->f_brc; |
| 1203 | break; |
| 1204 | case MT_OPERAND_BRC2 : |
| 1205 | value = fields->f_brc2; |
| 1206 | break; |
| 1207 | case MT_OPERAND_CB1INCR : |
| 1208 | value = fields->f_cb1incr; |
| 1209 | break; |
| 1210 | case MT_OPERAND_CB1SEL : |
| 1211 | value = fields->f_cb1sel; |
| 1212 | break; |
| 1213 | case MT_OPERAND_CB2INCR : |
| 1214 | value = fields->f_cb2incr; |
| 1215 | break; |
| 1216 | case MT_OPERAND_CB2SEL : |
| 1217 | value = fields->f_cb2sel; |
| 1218 | break; |
| 1219 | case MT_OPERAND_CBRB : |
| 1220 | value = fields->f_cbrb; |
| 1221 | break; |
| 1222 | case MT_OPERAND_CBS : |
| 1223 | value = fields->f_cbs; |
| 1224 | break; |
| 1225 | case MT_OPERAND_CBX : |
| 1226 | value = fields->f_cbx; |
| 1227 | break; |
| 1228 | case MT_OPERAND_CCB : |
| 1229 | value = fields->f_ccb; |
| 1230 | break; |
| 1231 | case MT_OPERAND_CDB : |
| 1232 | value = fields->f_cdb; |
| 1233 | break; |
| 1234 | case MT_OPERAND_CELL : |
| 1235 | value = fields->f_cell; |
| 1236 | break; |
| 1237 | case MT_OPERAND_COLNUM : |
| 1238 | value = fields->f_colnum; |
| 1239 | break; |
| 1240 | case MT_OPERAND_CONTNUM : |
| 1241 | value = fields->f_contnum; |
| 1242 | break; |
| 1243 | case MT_OPERAND_CR : |
| 1244 | value = fields->f_cr; |
| 1245 | break; |
| 1246 | case MT_OPERAND_CTXDISP : |
| 1247 | value = fields->f_ctxdisp; |
| 1248 | break; |
| 1249 | case MT_OPERAND_DUP : |
| 1250 | value = fields->f_dup; |
| 1251 | break; |
| 1252 | case MT_OPERAND_FBDISP : |
| 1253 | value = fields->f_fbdisp; |
| 1254 | break; |
| 1255 | case MT_OPERAND_FBINCR : |
| 1256 | value = fields->f_fbincr; |
| 1257 | break; |
| 1258 | case MT_OPERAND_FRDR : |
| 1259 | value = fields->f_dr; |
| 1260 | break; |
| 1261 | case MT_OPERAND_FRDRRR : |
| 1262 | value = fields->f_drrr; |
| 1263 | break; |
| 1264 | case MT_OPERAND_FRSR1 : |
| 1265 | value = fields->f_sr1; |
| 1266 | break; |
| 1267 | case MT_OPERAND_FRSR2 : |
| 1268 | value = fields->f_sr2; |
| 1269 | break; |
| 1270 | case MT_OPERAND_ID : |
| 1271 | value = fields->f_id; |
| 1272 | break; |
| 1273 | case MT_OPERAND_IMM16 : |
| 1274 | value = fields->f_imm16s; |
| 1275 | break; |
| 1276 | case MT_OPERAND_IMM16L : |
| 1277 | value = fields->f_imm16l; |
| 1278 | break; |
| 1279 | case MT_OPERAND_IMM16O : |
| 1280 | value = fields->f_imm16s; |
| 1281 | break; |
| 1282 | case MT_OPERAND_IMM16Z : |
| 1283 | value = fields->f_imm16u; |
| 1284 | break; |
| 1285 | case MT_OPERAND_INCAMT : |
| 1286 | value = fields->f_incamt; |
| 1287 | break; |
| 1288 | case MT_OPERAND_INCR : |
| 1289 | value = fields->f_incr; |
| 1290 | break; |
| 1291 | case MT_OPERAND_LENGTH : |
| 1292 | value = fields->f_length; |
| 1293 | break; |
| 1294 | case MT_OPERAND_LOOPSIZE : |
| 1295 | value = fields->f_loopo; |
| 1296 | break; |
| 1297 | case MT_OPERAND_MASK : |
| 1298 | value = fields->f_mask; |
| 1299 | break; |
| 1300 | case MT_OPERAND_MASK1 : |
| 1301 | value = fields->f_mask1; |
| 1302 | break; |
| 1303 | case MT_OPERAND_MODE : |
| 1304 | value = fields->f_mode; |
| 1305 | break; |
| 1306 | case MT_OPERAND_PERM : |
| 1307 | value = fields->f_perm; |
| 1308 | break; |
| 1309 | case MT_OPERAND_RBBC : |
| 1310 | value = fields->f_rbbc; |
| 1311 | break; |
| 1312 | case MT_OPERAND_RC : |
| 1313 | value = fields->f_rc; |
| 1314 | break; |
| 1315 | case MT_OPERAND_RC1 : |
| 1316 | value = fields->f_rc1; |
| 1317 | break; |
| 1318 | case MT_OPERAND_RC2 : |
| 1319 | value = fields->f_rc2; |
| 1320 | break; |
| 1321 | case MT_OPERAND_RC3 : |
| 1322 | value = fields->f_rc3; |
| 1323 | break; |
| 1324 | case MT_OPERAND_RCNUM : |
| 1325 | value = fields->f_rcnum; |
| 1326 | break; |
| 1327 | case MT_OPERAND_RDA : |
| 1328 | value = fields->f_rda; |
| 1329 | break; |
| 1330 | case MT_OPERAND_ROWNUM : |
| 1331 | value = fields->f_rownum; |
| 1332 | break; |
| 1333 | case MT_OPERAND_ROWNUM1 : |
| 1334 | value = fields->f_rownum1; |
| 1335 | break; |
| 1336 | case MT_OPERAND_ROWNUM2 : |
| 1337 | value = fields->f_rownum2; |
| 1338 | break; |
| 1339 | case MT_OPERAND_SIZE : |
| 1340 | value = fields->f_size; |
| 1341 | break; |
| 1342 | case MT_OPERAND_TYPE : |
| 1343 | value = fields->f_type; |
| 1344 | break; |
| 1345 | case MT_OPERAND_WR : |
| 1346 | value = fields->f_wr; |
| 1347 | break; |
| 1348 | case MT_OPERAND_XMODE : |
| 1349 | value = fields->f_xmode; |
| 1350 | break; |
| 1351 | |
| 1352 | default : |
| 1353 | /* xgettext:c-format */ |
| 1354 | fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), |
| 1355 | opindex); |
| 1356 | abort (); |
| 1357 | } |
| 1358 | |
| 1359 | return value; |
| 1360 | } |
| 1361 | |
| 1362 | void mt_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); |
| 1363 | void mt_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); |
| 1364 | |
| 1365 | /* Stuffing values in cgen_fields is handled by a collection of functions. |
| 1366 | They are distinguished by the type of the VALUE argument they accept. |
| 1367 | TODO: floating point, inlining support, remove cases where argument type |
| 1368 | not appropriate. */ |
| 1369 | |
| 1370 | void |
| 1371 | mt_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 1372 | int opindex, |
| 1373 | CGEN_FIELDS * fields, |
| 1374 | int value) |
| 1375 | { |
| 1376 | switch (opindex) |
| 1377 | { |
| 1378 | case MT_OPERAND_A23 : |
| 1379 | fields->f_a23 = value; |
| 1380 | break; |
| 1381 | case MT_OPERAND_BALL : |
| 1382 | fields->f_ball = value; |
| 1383 | break; |
| 1384 | case MT_OPERAND_BALL2 : |
| 1385 | fields->f_ball2 = value; |
| 1386 | break; |
| 1387 | case MT_OPERAND_BANKADDR : |
| 1388 | fields->f_bankaddr = value; |
| 1389 | break; |
| 1390 | case MT_OPERAND_BRC : |
| 1391 | fields->f_brc = value; |
| 1392 | break; |
| 1393 | case MT_OPERAND_BRC2 : |
| 1394 | fields->f_brc2 = value; |
| 1395 | break; |
| 1396 | case MT_OPERAND_CB1INCR : |
| 1397 | fields->f_cb1incr = value; |
| 1398 | break; |
| 1399 | case MT_OPERAND_CB1SEL : |
| 1400 | fields->f_cb1sel = value; |
| 1401 | break; |
| 1402 | case MT_OPERAND_CB2INCR : |
| 1403 | fields->f_cb2incr = value; |
| 1404 | break; |
| 1405 | case MT_OPERAND_CB2SEL : |
| 1406 | fields->f_cb2sel = value; |
| 1407 | break; |
| 1408 | case MT_OPERAND_CBRB : |
| 1409 | fields->f_cbrb = value; |
| 1410 | break; |
| 1411 | case MT_OPERAND_CBS : |
| 1412 | fields->f_cbs = value; |
| 1413 | break; |
| 1414 | case MT_OPERAND_CBX : |
| 1415 | fields->f_cbx = value; |
| 1416 | break; |
| 1417 | case MT_OPERAND_CCB : |
| 1418 | fields->f_ccb = value; |
| 1419 | break; |
| 1420 | case MT_OPERAND_CDB : |
| 1421 | fields->f_cdb = value; |
| 1422 | break; |
| 1423 | case MT_OPERAND_CELL : |
| 1424 | fields->f_cell = value; |
| 1425 | break; |
| 1426 | case MT_OPERAND_COLNUM : |
| 1427 | fields->f_colnum = value; |
| 1428 | break; |
| 1429 | case MT_OPERAND_CONTNUM : |
| 1430 | fields->f_contnum = value; |
| 1431 | break; |
| 1432 | case MT_OPERAND_CR : |
| 1433 | fields->f_cr = value; |
| 1434 | break; |
| 1435 | case MT_OPERAND_CTXDISP : |
| 1436 | fields->f_ctxdisp = value; |
| 1437 | break; |
| 1438 | case MT_OPERAND_DUP : |
| 1439 | fields->f_dup = value; |
| 1440 | break; |
| 1441 | case MT_OPERAND_FBDISP : |
| 1442 | fields->f_fbdisp = value; |
| 1443 | break; |
| 1444 | case MT_OPERAND_FBINCR : |
| 1445 | fields->f_fbincr = value; |
| 1446 | break; |
| 1447 | case MT_OPERAND_FRDR : |
| 1448 | fields->f_dr = value; |
| 1449 | break; |
| 1450 | case MT_OPERAND_FRDRRR : |
| 1451 | fields->f_drrr = value; |
| 1452 | break; |
| 1453 | case MT_OPERAND_FRSR1 : |
| 1454 | fields->f_sr1 = value; |
| 1455 | break; |
| 1456 | case MT_OPERAND_FRSR2 : |
| 1457 | fields->f_sr2 = value; |
| 1458 | break; |
| 1459 | case MT_OPERAND_ID : |
| 1460 | fields->f_id = value; |
| 1461 | break; |
| 1462 | case MT_OPERAND_IMM16 : |
| 1463 | fields->f_imm16s = value; |
| 1464 | break; |
| 1465 | case MT_OPERAND_IMM16L : |
| 1466 | fields->f_imm16l = value; |
| 1467 | break; |
| 1468 | case MT_OPERAND_IMM16O : |
| 1469 | fields->f_imm16s = value; |
| 1470 | break; |
| 1471 | case MT_OPERAND_IMM16Z : |
| 1472 | fields->f_imm16u = value; |
| 1473 | break; |
| 1474 | case MT_OPERAND_INCAMT : |
| 1475 | fields->f_incamt = value; |
| 1476 | break; |
| 1477 | case MT_OPERAND_INCR : |
| 1478 | fields->f_incr = value; |
| 1479 | break; |
| 1480 | case MT_OPERAND_LENGTH : |
| 1481 | fields->f_length = value; |
| 1482 | break; |
| 1483 | case MT_OPERAND_LOOPSIZE : |
| 1484 | fields->f_loopo = value; |
| 1485 | break; |
| 1486 | case MT_OPERAND_MASK : |
| 1487 | fields->f_mask = value; |
| 1488 | break; |
| 1489 | case MT_OPERAND_MASK1 : |
| 1490 | fields->f_mask1 = value; |
| 1491 | break; |
| 1492 | case MT_OPERAND_MODE : |
| 1493 | fields->f_mode = value; |
| 1494 | break; |
| 1495 | case MT_OPERAND_PERM : |
| 1496 | fields->f_perm = value; |
| 1497 | break; |
| 1498 | case MT_OPERAND_RBBC : |
| 1499 | fields->f_rbbc = value; |
| 1500 | break; |
| 1501 | case MT_OPERAND_RC : |
| 1502 | fields->f_rc = value; |
| 1503 | break; |
| 1504 | case MT_OPERAND_RC1 : |
| 1505 | fields->f_rc1 = value; |
| 1506 | break; |
| 1507 | case MT_OPERAND_RC2 : |
| 1508 | fields->f_rc2 = value; |
| 1509 | break; |
| 1510 | case MT_OPERAND_RC3 : |
| 1511 | fields->f_rc3 = value; |
| 1512 | break; |
| 1513 | case MT_OPERAND_RCNUM : |
| 1514 | fields->f_rcnum = value; |
| 1515 | break; |
| 1516 | case MT_OPERAND_RDA : |
| 1517 | fields->f_rda = value; |
| 1518 | break; |
| 1519 | case MT_OPERAND_ROWNUM : |
| 1520 | fields->f_rownum = value; |
| 1521 | break; |
| 1522 | case MT_OPERAND_ROWNUM1 : |
| 1523 | fields->f_rownum1 = value; |
| 1524 | break; |
| 1525 | case MT_OPERAND_ROWNUM2 : |
| 1526 | fields->f_rownum2 = value; |
| 1527 | break; |
| 1528 | case MT_OPERAND_SIZE : |
| 1529 | fields->f_size = value; |
| 1530 | break; |
| 1531 | case MT_OPERAND_TYPE : |
| 1532 | fields->f_type = value; |
| 1533 | break; |
| 1534 | case MT_OPERAND_WR : |
| 1535 | fields->f_wr = value; |
| 1536 | break; |
| 1537 | case MT_OPERAND_XMODE : |
| 1538 | fields->f_xmode = value; |
| 1539 | break; |
| 1540 | |
| 1541 | default : |
| 1542 | /* xgettext:c-format */ |
| 1543 | fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), |
| 1544 | opindex); |
| 1545 | abort (); |
| 1546 | } |
| 1547 | } |
| 1548 | |
| 1549 | void |
| 1550 | mt_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 1551 | int opindex, |
| 1552 | CGEN_FIELDS * fields, |
| 1553 | bfd_vma value) |
| 1554 | { |
| 1555 | switch (opindex) |
| 1556 | { |
| 1557 | case MT_OPERAND_A23 : |
| 1558 | fields->f_a23 = value; |
| 1559 | break; |
| 1560 | case MT_OPERAND_BALL : |
| 1561 | fields->f_ball = value; |
| 1562 | break; |
| 1563 | case MT_OPERAND_BALL2 : |
| 1564 | fields->f_ball2 = value; |
| 1565 | break; |
| 1566 | case MT_OPERAND_BANKADDR : |
| 1567 | fields->f_bankaddr = value; |
| 1568 | break; |
| 1569 | case MT_OPERAND_BRC : |
| 1570 | fields->f_brc = value; |
| 1571 | break; |
| 1572 | case MT_OPERAND_BRC2 : |
| 1573 | fields->f_brc2 = value; |
| 1574 | break; |
| 1575 | case MT_OPERAND_CB1INCR : |
| 1576 | fields->f_cb1incr = value; |
| 1577 | break; |
| 1578 | case MT_OPERAND_CB1SEL : |
| 1579 | fields->f_cb1sel = value; |
| 1580 | break; |
| 1581 | case MT_OPERAND_CB2INCR : |
| 1582 | fields->f_cb2incr = value; |
| 1583 | break; |
| 1584 | case MT_OPERAND_CB2SEL : |
| 1585 | fields->f_cb2sel = value; |
| 1586 | break; |
| 1587 | case MT_OPERAND_CBRB : |
| 1588 | fields->f_cbrb = value; |
| 1589 | break; |
| 1590 | case MT_OPERAND_CBS : |
| 1591 | fields->f_cbs = value; |
| 1592 | break; |
| 1593 | case MT_OPERAND_CBX : |
| 1594 | fields->f_cbx = value; |
| 1595 | break; |
| 1596 | case MT_OPERAND_CCB : |
| 1597 | fields->f_ccb = value; |
| 1598 | break; |
| 1599 | case MT_OPERAND_CDB : |
| 1600 | fields->f_cdb = value; |
| 1601 | break; |
| 1602 | case MT_OPERAND_CELL : |
| 1603 | fields->f_cell = value; |
| 1604 | break; |
| 1605 | case MT_OPERAND_COLNUM : |
| 1606 | fields->f_colnum = value; |
| 1607 | break; |
| 1608 | case MT_OPERAND_CONTNUM : |
| 1609 | fields->f_contnum = value; |
| 1610 | break; |
| 1611 | case MT_OPERAND_CR : |
| 1612 | fields->f_cr = value; |
| 1613 | break; |
| 1614 | case MT_OPERAND_CTXDISP : |
| 1615 | fields->f_ctxdisp = value; |
| 1616 | break; |
| 1617 | case MT_OPERAND_DUP : |
| 1618 | fields->f_dup = value; |
| 1619 | break; |
| 1620 | case MT_OPERAND_FBDISP : |
| 1621 | fields->f_fbdisp = value; |
| 1622 | break; |
| 1623 | case MT_OPERAND_FBINCR : |
| 1624 | fields->f_fbincr = value; |
| 1625 | break; |
| 1626 | case MT_OPERAND_FRDR : |
| 1627 | fields->f_dr = value; |
| 1628 | break; |
| 1629 | case MT_OPERAND_FRDRRR : |
| 1630 | fields->f_drrr = value; |
| 1631 | break; |
| 1632 | case MT_OPERAND_FRSR1 : |
| 1633 | fields->f_sr1 = value; |
| 1634 | break; |
| 1635 | case MT_OPERAND_FRSR2 : |
| 1636 | fields->f_sr2 = value; |
| 1637 | break; |
| 1638 | case MT_OPERAND_ID : |
| 1639 | fields->f_id = value; |
| 1640 | break; |
| 1641 | case MT_OPERAND_IMM16 : |
| 1642 | fields->f_imm16s = value; |
| 1643 | break; |
| 1644 | case MT_OPERAND_IMM16L : |
| 1645 | fields->f_imm16l = value; |
| 1646 | break; |
| 1647 | case MT_OPERAND_IMM16O : |
| 1648 | fields->f_imm16s = value; |
| 1649 | break; |
| 1650 | case MT_OPERAND_IMM16Z : |
| 1651 | fields->f_imm16u = value; |
| 1652 | break; |
| 1653 | case MT_OPERAND_INCAMT : |
| 1654 | fields->f_incamt = value; |
| 1655 | break; |
| 1656 | case MT_OPERAND_INCR : |
| 1657 | fields->f_incr = value; |
| 1658 | break; |
| 1659 | case MT_OPERAND_LENGTH : |
| 1660 | fields->f_length = value; |
| 1661 | break; |
| 1662 | case MT_OPERAND_LOOPSIZE : |
| 1663 | fields->f_loopo = value; |
| 1664 | break; |
| 1665 | case MT_OPERAND_MASK : |
| 1666 | fields->f_mask = value; |
| 1667 | break; |
| 1668 | case MT_OPERAND_MASK1 : |
| 1669 | fields->f_mask1 = value; |
| 1670 | break; |
| 1671 | case MT_OPERAND_MODE : |
| 1672 | fields->f_mode = value; |
| 1673 | break; |
| 1674 | case MT_OPERAND_PERM : |
| 1675 | fields->f_perm = value; |
| 1676 | break; |
| 1677 | case MT_OPERAND_RBBC : |
| 1678 | fields->f_rbbc = value; |
| 1679 | break; |
| 1680 | case MT_OPERAND_RC : |
| 1681 | fields->f_rc = value; |
| 1682 | break; |
| 1683 | case MT_OPERAND_RC1 : |
| 1684 | fields->f_rc1 = value; |
| 1685 | break; |
| 1686 | case MT_OPERAND_RC2 : |
| 1687 | fields->f_rc2 = value; |
| 1688 | break; |
| 1689 | case MT_OPERAND_RC3 : |
| 1690 | fields->f_rc3 = value; |
| 1691 | break; |
| 1692 | case MT_OPERAND_RCNUM : |
| 1693 | fields->f_rcnum = value; |
| 1694 | break; |
| 1695 | case MT_OPERAND_RDA : |
| 1696 | fields->f_rda = value; |
| 1697 | break; |
| 1698 | case MT_OPERAND_ROWNUM : |
| 1699 | fields->f_rownum = value; |
| 1700 | break; |
| 1701 | case MT_OPERAND_ROWNUM1 : |
| 1702 | fields->f_rownum1 = value; |
| 1703 | break; |
| 1704 | case MT_OPERAND_ROWNUM2 : |
| 1705 | fields->f_rownum2 = value; |
| 1706 | break; |
| 1707 | case MT_OPERAND_SIZE : |
| 1708 | fields->f_size = value; |
| 1709 | break; |
| 1710 | case MT_OPERAND_TYPE : |
| 1711 | fields->f_type = value; |
| 1712 | break; |
| 1713 | case MT_OPERAND_WR : |
| 1714 | fields->f_wr = value; |
| 1715 | break; |
| 1716 | case MT_OPERAND_XMODE : |
| 1717 | fields->f_xmode = value; |
| 1718 | break; |
| 1719 | |
| 1720 | default : |
| 1721 | /* xgettext:c-format */ |
| 1722 | fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), |
| 1723 | opindex); |
| 1724 | abort (); |
| 1725 | } |
| 1726 | } |
| 1727 | |
| 1728 | /* Function to call before using the instruction builder tables. */ |
| 1729 | |
| 1730 | void |
| 1731 | mt_cgen_init_ibld_table (CGEN_CPU_DESC cd) |
| 1732 | { |
| 1733 | cd->insert_handlers = & mt_cgen_insert_handlers[0]; |
| 1734 | cd->extract_handlers = & mt_cgen_extract_handlers[0]; |
| 1735 | |
| 1736 | cd->insert_operand = mt_cgen_insert_operand; |
| 1737 | cd->extract_operand = mt_cgen_extract_operand; |
| 1738 | |
| 1739 | cd->get_int_operand = mt_cgen_get_int_operand; |
| 1740 | cd->set_int_operand = mt_cgen_set_int_operand; |
| 1741 | cd->get_vma_operand = mt_cgen_get_vma_operand; |
| 1742 | cd->set_vma_operand = mt_cgen_set_vma_operand; |
| 1743 | } |