llvm/test/CodeGen/AArch64/sched-print-cycle.mir

# RUN: llc -mtriple=arm64-apple-macos -mcpu=apple-m1 -sched-print-cycles=true \
# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck %s

# RUN: llc -mtriple=arm64-apple-macos -mcpu=apple-m1 -sched-print-cycles=false \
# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck %s --check-prefix=NOCYCLES

# REQUIRES: asserts
---
name: mul_mul
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x0
    $x1 = ADDXrr $x0, $x0
    $x2 = ADDXrr $x1, $x1
    $x3 = ADDXrr $x2, $x2
    $x4 = ADDXrr $x2, $x2

# CHECK-LABEL: *** Final schedule for %bb.0 ***
# CHECK-NEXT: SU(0) [TopReadyCycle = 0, BottomReadyCycle = 0]:   $x1 = ADDXrr $x0, $x0
# CHECK-NEXT: SU(1) [TopReadyCycle = 0, BottomReadyCycle = 1]:   $x2 = ADDXrr $x1, $x1
# CHECK-NEXT: SU(2) [TopReadyCycle = 1, BottomReadyCycle = 0]:   $x3 = ADDXrr $x2, $x2
# CHECK-NEXT: SU(3) [TopReadyCycle = 1, BottomReadyCycle = 0]:   $x4 = ADDXrr $x2, $x2

# NOCYCLES-LABEL: *** Final schedule for %bb.0 ***
# NOCYCLES-NEXT: SU(0):   $x1 = ADDXrr $x0, $x0
# NOCYCLES-NEXT: SU(1):   $x2 = ADDXrr $x1, $x1
# NOCYCLES-NEXT: SU(2):   $x3 = ADDXrr $x2, $x2
# NOCYCLES-NEXT: SU(3):   $x4 = ADDXrr $x2, $x2