llvm/test/CodeGen/SystemZ/scalar-cttz-01.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s

declare i64 @llvm.cttz.i64(i64, i1)
declare i32 @llvm.cttz.i32(i32, i1)
declare i16 @llvm.cttz.i16(i16, i1)
declare i8 @llvm.cttz.i8(i8, i1)

define i64 @f0(i64 %arg) {
; CHECK-LABEL: f0:
; CHECK:       # %bb.0:
; CHECK-NEXT:    lay %r0, -1(%r2)
; CHECK-NEXT:    ngr %r2, %r0
; CHECK-NEXT:    xgr %r2, %r0
; CHECK-NEXT:    flogr %r0, %r2
; CHECK-NEXT:    lghi %r2, 64
; CHECK-NEXT:    sgr %r2, %r0
; CHECK-NEXT:    br %r14
  %1 = tail call i64 @llvm.cttz.i64(i64 %arg, i1 false)
  ret i64 %1
}

define i64 @f1(i64 %arg) {
; CHECK-LABEL: f1:
; CHECK:       # %bb.0:
; CHECK-NEXT:    lay %r0, -1(%r2)
; CHECK-NEXT:    ngr %r2, %r0
; CHECK-NEXT:    xgr %r2, %r0
; CHECK-NEXT:    flogr %r0, %r2
; CHECK-NEXT:    lghi %r2, 64
; CHECK-NEXT:    sgr %r2, %r0
; CHECK-NEXT:    br %r14
  %1 = tail call i64 @llvm.cttz.i64(i64 %arg, i1 true)
  ret i64 %1
}

define i32 @f2(i32 %arg) {
; CHECK-LABEL: f2:
; CHECK:       # %bb.0:
; CHECK-NEXT:    ahik %r0, %r2, -1
; CHECK-NEXT:    xilf %r2, 4294967295
; CHECK-NEXT:    nr %r0, %r2
; CHECK-NEXT:    popcnt %r0, %r0
; CHECK-NEXT:    sllk %r1, %r0, 16
; CHECK-NEXT:    ar %r0, %r1
; CHECK-NEXT:    sllk %r1, %r0, 8
; CHECK-NEXT:    ar %r0, %r1
; CHECK-NEXT:    srlk %r2, %r0, 24
; CHECK-NEXT:    br %r14
  %1 = tail call i32 @llvm.cttz.i32(i32 %arg, i1 false)
  ret i32 %1
}

define i32 @f3(i32 %arg) {
; CHECK-LABEL: f3:
; CHECK:       # %bb.0:
; CHECK-NEXT:    ahik %r0, %r2, -1
; CHECK-NEXT:    xilf %r2, 4294967295
; CHECK-NEXT:    nr %r0, %r2
; CHECK-NEXT:    popcnt %r0, %r0
; CHECK-NEXT:    sllk %r1, %r0, 16
; CHECK-NEXT:    ar %r0, %r1
; CHECK-NEXT:    sllk %r1, %r0, 8
; CHECK-NEXT:    ar %r0, %r1
; CHECK-NEXT:    srlk %r2, %r0, 24
; CHECK-NEXT:    br %r14
  %1 = tail call i32 @llvm.cttz.i32(i32 %arg, i1 true)
  ret i32 %1
}

define i16 @f4(i16 %arg) {
; CHECK-LABEL: f4:
; CHECK:       # %bb.0:
; CHECK-NEXT:    ahik %r0, %r2, -1
; CHECK-NEXT:    xilf %r2, 4294967295
; CHECK-NEXT:    nr %r0, %r2
; CHECK-NEXT:    llhr %r0, %r0
; CHECK-NEXT:    popcnt %r0, %r0
; CHECK-NEXT:    risblg %r1, %r0, 16, 151, 8
; CHECK-NEXT:    ar %r0, %r1
; CHECK-NEXT:    srlk %r2, %r0, 8
; CHECK-NEXT:    br %r14
  %1 = tail call i16 @llvm.cttz.i16(i16 %arg, i1 false)
  ret i16 %1
}

define i16 @f5(i16 %arg) {
; CHECK-LABEL: f5:
; CHECK:       # %bb.0:
; CHECK-NEXT:    ahik %r0, %r2, -1
; CHECK-NEXT:    xilf %r2, 4294967295
; CHECK-NEXT:    nr %r0, %r2
; CHECK-NEXT:    llhr %r0, %r0
; CHECK-NEXT:    popcnt %r0, %r0
; CHECK-NEXT:    risblg %r1, %r0, 16, 151, 8
; CHECK-NEXT:    ar %r0, %r1
; CHECK-NEXT:    srlk %r2, %r0, 8
; CHECK-NEXT:    br %r14
  %1 = tail call i16 @llvm.cttz.i16(i16 %arg, i1 true)
  ret i16 %1
}

define i8 @f6(i8 %arg) {
; CHECK-LABEL: f6:
; CHECK:       # %bb.0:
; CHECK-NEXT:    ahik %r0, %r2, -1
; CHECK-NEXT:    xilf %r2, 4294967295
; CHECK-NEXT:    nr %r0, %r2
; CHECK-NEXT:    llcr %r0, %r0
; CHECK-NEXT:    popcnt %r2, %r0
; CHECK-NEXT:    # kill: def $r2l killed $r2l killed $r2d
; CHECK-NEXT:    br %r14
  %1 = tail call i8 @llvm.cttz.i8(i8 %arg, i1 false)
  ret i8 %1
}

define i8 @f7(i8 %arg) {
; CHECK-LABEL: f7:
; CHECK:       # %bb.0:
; CHECK-NEXT:    ahik %r0, %r2, -1
; CHECK-NEXT:    xilf %r2, 4294967295
; CHECK-NEXT:    nr %r0, %r2
; CHECK-NEXT:    llcr %r0, %r0
; CHECK-NEXT:    popcnt %r2, %r0
; CHECK-NEXT:    # kill: def $r2l killed $r2l killed $r2d
; CHECK-NEXT:    br %r14
  %1 = tail call i8 @llvm.cttz.i8(i8 %arg, i1 true)
  ret i8 %1
}