src/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*'  -o - %s 2> %t | FileCheck -check-prefix=GCN  %s
# RUN: FileCheck -check-prefix=ERR %s < %t

# ERR-NOT: remark:
# ERR: remark: <unknown>:0:0: cannot select: %1:sgpr(s64), %2:sgpr(s64), %3:sgpr(s64) = G_UNMERGE_VALUES %0:sgpr(s192) (in function: test_unmerge_values_s_s64_s_s64_s64_s_s192)
# ERR-NOT: remark:

---
name: test_unmerge_values_v_s32_v_s32_v_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GCN-LABEL: name: test_unmerge_values_v_s32_v_s32_v_s64
    ; GCN: liveins: $vgpr0_vgpr1
    ; GCN: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
    ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
    ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
    %0:vgpr(s64) = COPY $vgpr0_vgpr1
    %1:vgpr(s32), %2:vgpr(s32) = G_UNMERGE_VALUES %0
    S_ENDPGM 0, implicit %1, implicit %2
...

---
name: test_unmerge_values_s_s32_s_s32_s_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1

    ; GCN-LABEL: name: test_unmerge_values_s_s32_s_s32_s_s64
    ; GCN: liveins: $sgpr0_sgpr1
    ; GCN: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
    ; GCN: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub0
    ; GCN: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1
    ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
    %0:sgpr(s64) = COPY $sgpr0_sgpr1
    %1:sgpr(s32), %2:sgpr(s32) = G_UNMERGE_VALUES %0
    S_ENDPGM 0, implicit %1, implicit %2
...

---
name: test_unmerge_values_v_s32_s_s32_s_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1

    ; GCN-LABEL: name: test_unmerge_values_v_s32_s_s32_s_s64
    ; GCN: liveins: $sgpr0_sgpr1
    ; GCN: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
    ; GCN: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1
    ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
    %0:sgpr(s64) = COPY $sgpr0_sgpr1
    %1:vgpr(s32), %2:sgpr(s32) = G_UNMERGE_VALUES %0
    S_ENDPGM 0, implicit %1, implicit %2
...

---
name: test_unmerge_values_s_s32_v_s32_s_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1

    ; GCN-LABEL: name: test_unmerge_values_s_s32_v_s32_s_s64
    ; GCN: liveins: $sgpr0_sgpr1
    ; GCN: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
    ; GCN: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub0
    ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
    ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
    %0:sgpr(s64) = COPY $sgpr0_sgpr1
    %1:sgpr(s32), %2:vgpr(s32) = G_UNMERGE_VALUES %0
    S_ENDPGM 0, implicit %1, implicit %2
...

---
name: test_unmerge_values_s_s32_v_s32_s_s64_undef_src
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:

    ; GCN-LABEL: name: test_unmerge_values_s_s32_v_s32_s_s64_undef_src
    ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY undef %2.sub0:sreg_64_xexec
    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY undef %2.sub1:sreg_64_xexec
    ; GCN: S_ENDPGM 0, implicit [[COPY]], implicit [[COPY1]]
    %1:sgpr(s32), %2:vgpr(s32) = G_UNMERGE_VALUES undef %0:sgpr(s64)
    S_ENDPGM 0, implicit %1, implicit %2
...

---
name: test_unmerge_values_s_s32_s_s32_s32_s_s96
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2

    ; GCN-LABEL: name: test_unmerge_values_s_s32_s_s32_s32_s_s96
    ; GCN: liveins: $sgpr0_sgpr1_sgpr2
    ; GCN: [[COPY:%[0-9]+]]:sreg_96 = COPY $sgpr0_sgpr1_sgpr2
    ; GCN: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub0
    ; GCN: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1
    ; GCN: [[COPY3:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub2
    ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]]
    %0:sgpr(s96) = COPY $sgpr0_sgpr1_sgpr2
    %1:sgpr(s32), %2:sgpr(s32), %3:sgpr(s32) = G_UNMERGE_VALUES %0
    S_ENDPGM 0, implicit %1, implicit %2, implicit %3
...

---
name: test_unmerge_values_s_s32_s_s32_s32_s_s32_s_s128
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3

    ; GCN-LABEL: name: test_unmerge_values_s_s32_s_s32_s32_s_s32_s_s128
    ; GCN: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
    ; GCN: [[COPY:%[0-9]+]]:sreg_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    ; GCN: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub0
    ; GCN: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1
    ; GCN: [[COPY3:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub2
    ; GCN: [[COPY4:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub3
    ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]], implicit [[COPY4]]
    %0:sgpr(s128) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    %1:sgpr(s32), %2:sgpr(s32), %3:sgpr(s32), %4:sgpr(s32) = G_UNMERGE_VALUES %0
    S_ENDPGM 0, implicit %1, implicit %2, implicit %3, implicit %4
...

---
name: test_unmerge_values_s_s64_s_s64_s_s128
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3

    ; GCN-LABEL: name: test_unmerge_values_s_s64_s_s64_s_s128
    ; GCN: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
    ; GCN: [[COPY:%[0-9]+]]:sreg_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    ; GCN: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[COPY]].sub0_sub1
    ; GCN: [[COPY2:%[0-9]+]]:sreg_64_xexec = COPY [[COPY]].sub2_sub3
    ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
    %0:sgpr(s128) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
    %1:sgpr(s64), %2:sgpr(s64) = G_UNMERGE_VALUES %0
    S_ENDPGM 0, implicit %1, implicit %2
...

---
name: test_unmerge_values_s_s64_s_s64_s64_s_s192
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1_sgpr2_sgpr3

    %0:sgpr(s192) = G_IMPLICIT_DEF
    %1:sgpr(s64), %2:sgpr(s64), %3:sgpr(s64) = G_UNMERGE_VALUES %0
    S_ENDPGM 0, implicit %1, implicit %2, implicit %3
...

---
name: test_unmerge_values_rc_set_def_v_s32_v_s32_v_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GCN-LABEL: name: test_unmerge_values_rc_set_def_v_s32_v_s32_v_s64
    ; GCN: liveins: $vgpr0_vgpr1
    ; GCN: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
    ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
    ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
    %0:vgpr(s64) = COPY $vgpr0_vgpr1
    %1:vgpr_32(s32), %2:vgpr_32(s32) = G_UNMERGE_VALUES %0
    S_ENDPGM 0, implicit %1, implicit %2
...

---
name: test_unmerge_values_rc_set_use_v_s32_v_s32_v_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GCN-LABEL: name: test_unmerge_values_rc_set_use_v_s32_v_s32_v_s64
    ; GCN: liveins: $vgpr0_vgpr1
    ; GCN: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
    ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
    ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
    %0:vreg_64(s64) = COPY $vgpr0_vgpr1
    %1:vgpr(s32), %2:vgpr(s32) = G_UNMERGE_VALUES %0
    S_ENDPGM 0, implicit %1, implicit %2
...