blob: 94fa11b223fb8b6b887ba55b79980f1e5760a121 [file] [log] [blame]
Tim Murraybe46aa62014-06-10 12:25:43 -07001target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
Tim Murraybdceed52014-08-18 13:58:46 -07002target triple = "aarch64-linux-android"
Tobias Grosser1ed5ef92013-07-29 11:39:38 -07003
Tim Murrayfa6f90e2014-06-12 14:16:10 -07004%struct.rs_allocation = type { i64*, i64*, i64*, i64* }
5
Tim Murray01ca8a42014-09-24 10:08:25 -07006declare i8* @rsOffset(%struct.rs_allocation* nocapture readonly %a, i32 %sizeOf, i32 %x, i32 %y, i32 %z)
7declare i8* @rsOffsetNs(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z)
Tobias Grosser1ed5ef92013-07-29 11:39:38 -07008
9; The loads and stores in this file are annotated with RenderScript-specific
10; information for the type based alias analysis, such that the TBAA analysis
11; understands that loads and stores from two allocations with different types
12; can never access the same memory element. This is different from C, where
13; a char or uchar load/store is special as it can alias with about everything.
14;
Stephen Hines9ba29112015-04-03 21:48:23 -070015; The TBAA tree in this file has the the node "RenderScript Distinct TBAA" as
16; its root.
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070017; This means all loads/stores that share this common root can be proven to not
18; alias. However, the alias analysis still has to assume MayAlias between
19; memory accesses in this file and memory accesses annotated with the C/C++
20; TBAA metadata.
Stephen Hines9ba29112015-04-03 21:48:23 -070021; A node named "RenderScript TBAA" wraps our distinct TBAA root node.
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070022; If we can ensure that all accesses to elements loaded from RenderScript
23; allocations are either annotated with the RenderScript TBAA information or
24; not annotated at all, but never annotated with the C/C++ metadata, we
Stephen Hines9ba29112015-04-03 21:48:23 -070025; can add the "RenderScript TBAA" tree under the C/C++ TBAA tree. This enables
26; TBAA to prove that an access to data from the RenderScript allocation
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070027; does not alias with a load/store accessing something not part of a RenderScript
28; allocation.
Stephen Hines9ba29112015-04-03 21:48:23 -070029; We do this by swapping the second operand of "RenderScript TBAA" with the node
30; for "Simple C/C++ TBAA", thus connecting these TBAA groups. The other root
31; node (with no children) can then safely be dropped from the analysis.
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070032
Stephen Hines9ba29112015-04-03 21:48:23 -070033!13 = !{!"RenderScript Distinct TBAA"}
34!14 = !{!"RenderScript TBAA", !13}
Stephen Hines4d0de132015-03-18 14:53:03 -070035!15 = !{!"allocation", !14}
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070036
Stephen Hines4d0de132015-03-18 14:53:03 -070037!21 = !{!"char", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -070038define void @rsSetElementAtImpl_char(%struct.rs_allocation* nocapture readonly %a, i8 signext %val, i32 %x, i32 %y, i32 %z) #1 {
39 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 1, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070040 store i8 %val, i8* %1, align 1, !tbaa !21
41 ret void
42}
43
Tim Murray01ca8a42014-09-24 10:08:25 -070044define signext i8 @rsGetElementAtImpl_char(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
45 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 1, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -070046 %2 = load i8, i8* %1, align 1, !tbaa !21
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070047 ret i8 %2
48}
49
Stephen Hines4d0de132015-03-18 14:53:03 -070050!22 = !{!"char2", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -070051define void @rsSetElementAtImpl_char2(%struct.rs_allocation* nocapture readonly %a, i16 %val, i32 %x, i32 %y, i32 %z) #1 {
52 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 2, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070053 %2 = bitcast i8* %1 to <2 x i8>*
Tim Murraybdceed52014-08-18 13:58:46 -070054 %3 = bitcast i16 %val to <2 x i8>
Pirama Arumuga Nainar501f4332016-02-11 15:17:23 -080055 store <2 x i8> %3, <2 x i8>* %2, align 2, !tbaa !22
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070056 ret void
57}
58
Tim Murray01ca8a42014-09-24 10:08:25 -070059define <2 x i8> @rsGetElementAtImpl_char2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
60 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 2, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070061 %2 = bitcast i8* %1 to <2 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -070062 %3 = load <2 x i8>, <2 x i8>* %2, align 2, !tbaa !22
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070063 ret <2 x i8> %3
64}
65
Stephen Hines4d0de132015-03-18 14:53:03 -070066!23 = !{!"char3", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -070067define void @rsSetElementAtImpl_char3(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
68 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tim Murraybdceed52014-08-18 13:58:46 -070069 %2 = bitcast i32 %val to <4 x i8>
70 %3 = shufflevector <4 x i8> %2, <4 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
71 %4 = bitcast i8* %1 to <4 x i8>*
Pirama Arumuga Nainar501f4332016-02-11 15:17:23 -080072 store <4 x i8> %3, <4 x i8>* %4, align 4, !tbaa !23
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070073 ret void
74}
75
Tim Murray01ca8a42014-09-24 10:08:25 -070076define <3 x i8> @rsGetElementAtImpl_char3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
77 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070078 %2 = bitcast i8* %1 to <4 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -070079 %3 = load <4 x i8>, <4 x i8>* %2, align 4, !tbaa !23
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070080 %4 = shufflevector <4 x i8> %3, <4 x i8> undef, <3 x i32> <i32 0, i32 1, i32 2>
81 ret <3 x i8> %4
82}
83
Stephen Hines4d0de132015-03-18 14:53:03 -070084!24 = !{!"char4", !15}
Yang Nifb709342017-05-16 14:20:03 -070085define void @rsSetElementAtImpl_char4(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -070086 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070087 %2 = bitcast i8* %1 to <4 x i8>*
Yang Nifb709342017-05-16 14:20:03 -070088 %3 = bitcast i32 %val to <4 x i8>
89 store <4 x i8> %3, <4 x i8>* %2, align 4, !tbaa !24
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070090 ret void
91}
92
Tim Murray01ca8a42014-09-24 10:08:25 -070093define <4 x i8> @rsGetElementAtImpl_char4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
94 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070095 %2 = bitcast i8* %1 to <4 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -070096 %3 = load <4 x i8>, <4 x i8>* %2, align 4, !tbaa !24
Tobias Grosser1ed5ef92013-07-29 11:39:38 -070097 ret <4 x i8> %3
98}
99
Stephen Hines4d0de132015-03-18 14:53:03 -0700100!25 = !{!"uchar", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700101define void @rsSetElementAtImpl_uchar(%struct.rs_allocation* nocapture readonly %a, i8 zeroext %val, i32 %x, i32 %y, i32 %z) #1 {
102 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 1, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700103 store i8 %val, i8* %1, align 1, !tbaa !25
104 ret void
105}
106
Tim Murray01ca8a42014-09-24 10:08:25 -0700107define zeroext i8 @rsGetElementAtImpl_uchar(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
108 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 1, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700109 %2 = load i8, i8* %1, align 1, !tbaa !25
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700110 ret i8 %2
111}
112
Stephen Hines4d0de132015-03-18 14:53:03 -0700113!26 = !{!"uchar2", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700114define void @rsSetElementAtImpl_uchar2(%struct.rs_allocation* nocapture readonly %a, i16 %val, i32 %x, i32 %y, i32 %z) #1 {
115 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 2, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700116 %2 = bitcast i8* %1 to <2 x i8>*
Tim Murraybdceed52014-08-18 13:58:46 -0700117 %3 = bitcast i16 %val to <2 x i8>
118 store <2 x i8> %3, <2 x i8>* %2, align 2, !tbaa !26
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700119 ret void
120}
121
Tim Murray01ca8a42014-09-24 10:08:25 -0700122define <2 x i8> @rsGetElementAtImpl_uchar2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
123 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 2, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700124 %2 = bitcast i8* %1 to <2 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700125 %3 = load <2 x i8>, <2 x i8>* %2, align 2, !tbaa !26
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700126 ret <2 x i8> %3
127}
128
Stephen Hines4d0de132015-03-18 14:53:03 -0700129!27 = !{!"uchar3", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700130define void @rsSetElementAtImpl_uchar3(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
131 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tim Murraybdceed52014-08-18 13:58:46 -0700132 %2 = bitcast i32 %val to <4 x i8>
133 %3 = shufflevector <4 x i8> %2, <4 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
134 %4 = bitcast i8* %1 to <4 x i8>*
135 store <4 x i8> %3, <4 x i8>* %4, align 4, !tbaa !27
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700136 ret void
137}
138
Tim Murray01ca8a42014-09-24 10:08:25 -0700139define <3 x i8> @rsGetElementAtImpl_uchar3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
140 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700141 %2 = bitcast i8* %1 to <4 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700142 %3 = load <4 x i8>, <4 x i8>* %2, align 4, !tbaa !27
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700143 %4 = shufflevector <4 x i8> %3, <4 x i8> undef, <3 x i32> <i32 0, i32 1, i32 2>
144 ret <3 x i8> %4
145}
146
Stephen Hines4d0de132015-03-18 14:53:03 -0700147!28 = !{!"uchar4", !15}
Yang Nifb709342017-05-16 14:20:03 -0700148define void @rsSetElementAtImpl_uchar4(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -0700149 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700150 %2 = bitcast i8* %1 to <4 x i8>*
Yang Nifb709342017-05-16 14:20:03 -0700151 %3 = bitcast i32 %val to <4 x i8>
152 store <4 x i8> %3, <4 x i8>* %2, align 4, !tbaa !28
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700153 ret void
154}
155
Tim Murray01ca8a42014-09-24 10:08:25 -0700156define <4 x i8> @rsGetElementAtImpl_uchar4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
157 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700158 %2 = bitcast i8* %1 to <4 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700159 %3 = load <4 x i8>, <4 x i8>* %2, align 4, !tbaa !28
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700160 ret <4 x i8> %3
161}
162
Stephen Hines4d0de132015-03-18 14:53:03 -0700163!29 = !{!"short", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700164define void @rsSetElementAtImpl_short(%struct.rs_allocation* nocapture readonly %a, i16 signext %val, i32 %x, i32 %y, i32 %z) #1 {
165 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 2, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700166 %2 = bitcast i8* %1 to i16*
167 store i16 %val, i16* %2, align 2, !tbaa !29
168 ret void
169}
170
Tim Murray01ca8a42014-09-24 10:08:25 -0700171define signext i16 @rsGetElementAtImpl_short(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
172 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 2, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700173 %2 = bitcast i8* %1 to i16*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700174 %3 = load i16, i16* %2, align 2, !tbaa !29
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700175 ret i16 %3
176}
177
Stephen Hines4d0de132015-03-18 14:53:03 -0700178!30 = !{!"short2", !15}
Yang Nifb709342017-05-16 14:20:03 -0700179define void @rsSetElementAtImpl_short2(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -0700180 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700181 %2 = bitcast i8* %1 to <2 x i16>*
Yang Nifb709342017-05-16 14:20:03 -0700182 %3 = bitcast i32 %val to <2 x i16>
183 store <2 x i16> %3, <2 x i16>* %2, align 4, !tbaa !30
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700184 ret void
185}
186
Tim Murray01ca8a42014-09-24 10:08:25 -0700187define <2 x i16> @rsGetElementAtImpl_short2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
188 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700189 %2 = bitcast i8* %1 to <2 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700190 %3 = load <2 x i16>, <2 x i16>* %2, align 4, !tbaa !30
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700191 ret <2 x i16> %3
192}
193
Stephen Hines4d0de132015-03-18 14:53:03 -0700194!31 = !{!"short3", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700195define void @rsSetElementAtImpl_short3(%struct.rs_allocation* nocapture readonly %a, <2 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
196 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
197 %2 = bitcast <2 x i32> %val to <4 x i16>
198 %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
199 %4 = bitcast i8* %1 to <4 x i16>*
200 store <4 x i16> %3, <4 x i16>* %4, align 8, !tbaa !31
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700201 ret void
202}
203
Tim Murray01ca8a42014-09-24 10:08:25 -0700204define <3 x i16> @rsGetElementAtImpl_short3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
205 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700206 %2 = bitcast i8* %1 to <4 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700207 %3 = load <4 x i16>, <4 x i16>* %2, align 8, !tbaa !31
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700208 %4 = shufflevector <4 x i16> %3, <4 x i16> undef, <3 x i32> <i32 0, i32 1, i32 2>
209 ret <3 x i16> %4
210}
211
Stephen Hines4d0de132015-03-18 14:53:03 -0700212!32 = !{!"short4", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700213define void @rsSetElementAtImpl_short4(%struct.rs_allocation* nocapture readonly %a, <4 x i16> %val, i32 %x, i32 %y, i32 %z) #1 {
214 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700215 %2 = bitcast i8* %1 to <4 x i16>*
216 store <4 x i16> %val, <4 x i16>* %2, align 8, !tbaa !32
217 ret void
218}
219
Tim Murray01ca8a42014-09-24 10:08:25 -0700220define <4 x i16> @rsGetElementAtImpl_short4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
221 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700222 %2 = bitcast i8* %1 to <4 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700223 %3 = load <4 x i16>, <4 x i16>* %2, align 8, !tbaa !32
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700224 ret <4 x i16> %3
225}
226
Stephen Hines4d0de132015-03-18 14:53:03 -0700227!33 = !{!"ushort", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700228define void @rsSetElementAtImpl_ushort(%struct.rs_allocation* nocapture readonly %a, i16 zeroext %val, i32 %x, i32 %y, i32 %z) #1 {
229 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 2, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700230 %2 = bitcast i8* %1 to i16*
231 store i16 %val, i16* %2, align 2, !tbaa !33
232 ret void
233}
234
Tim Murray01ca8a42014-09-24 10:08:25 -0700235define zeroext i16 @rsGetElementAtImpl_ushort(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
236 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 2, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700237 %2 = bitcast i8* %1 to i16*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700238 %3 = load i16, i16* %2, align 2, !tbaa !33
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700239 ret i16 %3
240}
241
Stephen Hines4d0de132015-03-18 14:53:03 -0700242!34 = !{!"ushort2", !15}
Yang Nifb709342017-05-16 14:20:03 -0700243define void @rsSetElementAtImpl_ushort2(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -0700244 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700245 %2 = bitcast i8* %1 to <2 x i16>*
Yang Nifb709342017-05-16 14:20:03 -0700246 %3 = bitcast i32 %val to <2 x i16>
247 store <2 x i16> %3, <2 x i16>* %2, align 4, !tbaa !34
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700248 ret void
249}
250
Tim Murray01ca8a42014-09-24 10:08:25 -0700251define <2 x i16> @rsGetElementAtImpl_ushort2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
252 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700253 %2 = bitcast i8* %1 to <2 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700254 %3 = load <2 x i16>, <2 x i16>* %2, align 4, !tbaa !34
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700255 ret <2 x i16> %3
256}
257
Stephen Hines4d0de132015-03-18 14:53:03 -0700258!35 = !{!"ushort3", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700259define void @rsSetElementAtImpl_ushort3(%struct.rs_allocation* nocapture readonly %a, <2 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
260 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
261 %2 = bitcast <2 x i32> %val to <4 x i16>
262 %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
263 %4 = bitcast i8* %1 to <4 x i16>*
Pirama Arumuga Nainar501f4332016-02-11 15:17:23 -0800264 store <4 x i16> %3, <4 x i16>* %4, align 8, !tbaa !35
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700265 ret void
266}
267
Tim Murray01ca8a42014-09-24 10:08:25 -0700268define <3 x i16> @rsGetElementAtImpl_ushort3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
269 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700270 %2 = bitcast i8* %1 to <4 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700271 %3 = load <4 x i16>, <4 x i16>* %2, align 8, !tbaa !35
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700272 %4 = shufflevector <4 x i16> %3, <4 x i16> undef, <3 x i32> <i32 0, i32 1, i32 2>
273 ret <3 x i16> %4
274}
275
Stephen Hines4d0de132015-03-18 14:53:03 -0700276!36 = !{!"ushort4", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700277define void @rsSetElementAtImpl_ushort4(%struct.rs_allocation* nocapture readonly %a, <4 x i16> %val, i32 %x, i32 %y, i32 %z) #1 {
278 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700279 %2 = bitcast i8* %1 to <4 x i16>*
280 store <4 x i16> %val, <4 x i16>* %2, align 8, !tbaa !36
281 ret void
282}
283
Tim Murray01ca8a42014-09-24 10:08:25 -0700284define <4 x i16> @rsGetElementAtImpl_ushort4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
285 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700286 %2 = bitcast i8* %1 to <4 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700287 %3 = load <4 x i16>, <4 x i16>* %2, align 8, !tbaa !36
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700288 ret <4 x i16> %3
289}
290
Stephen Hines4d0de132015-03-18 14:53:03 -0700291!37 = !{!"int", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700292define void @rsSetElementAtImpl_int(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
293 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700294 %2 = bitcast i8* %1 to i32*
295 store i32 %val, i32* %2, align 4, !tbaa !37
296 ret void
297}
298
Tim Murray01ca8a42014-09-24 10:08:25 -0700299define i32 @rsGetElementAtImpl_int(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
300 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700301 %2 = bitcast i8* %1 to i32*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700302 %3 = load i32, i32* %2, align 4, !tbaa !37
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700303 ret i32 %3
304}
305
Stephen Hines4d0de132015-03-18 14:53:03 -0700306!38 = !{!"int2", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700307define void @rsSetElementAtImpl_int2(%struct.rs_allocation* nocapture readonly %a, <2 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
308 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700309 %2 = bitcast i8* %1 to <2 x i32>*
310 store <2 x i32> %val, <2 x i32>* %2, align 8, !tbaa !38
311 ret void
312}
313
Tim Murray01ca8a42014-09-24 10:08:25 -0700314define <2 x i32> @rsGetElementAtImpl_int2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
315 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700316 %2 = bitcast i8* %1 to <2 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700317 %3 = load <2 x i32>, <2 x i32>* %2, align 8, !tbaa !38
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700318 ret <2 x i32> %3
319}
320
Stephen Hines4d0de132015-03-18 14:53:03 -0700321!39 = !{!"int3", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700322define void @rsSetElementAtImpl_int3(%struct.rs_allocation* nocapture readonly %a, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
323 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
324 %2 = shufflevector <4 x i32> %val, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700325 %3 = bitcast i8* %1 to <4 x i32>*
326 store <4 x i32> %2, <4 x i32>* %3, align 16, !tbaa !39
327 ret void
328}
329
Tim Murray01ca8a42014-09-24 10:08:25 -0700330define <3 x i32> @rsGetElementAtImpl_int3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
331 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700332 %2 = bitcast i8* %1 to <4 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700333 %3 = load <4 x i32>, <4 x i32>* %2, align 8, !tbaa !39
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700334 %4 = shufflevector <4 x i32> %3, <4 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
335 ret <3 x i32> %4
336}
337
Stephen Hines4d0de132015-03-18 14:53:03 -0700338!40 = !{!"int4", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700339define void @rsSetElementAtImpl_int4(%struct.rs_allocation* nocapture readonly %a, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
340 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700341 %2 = bitcast i8* %1 to <4 x i32>*
342 store <4 x i32> %val, <4 x i32>* %2, align 16, !tbaa !40
343 ret void
344}
345
Tim Murray01ca8a42014-09-24 10:08:25 -0700346define <4 x i32> @rsGetElementAtImpl_int4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
347 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700348 %2 = bitcast i8* %1 to <4 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700349 %3 = load <4 x i32>, <4 x i32>* %2, align 16, !tbaa !40
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700350 ret <4 x i32> %3
351}
352
Stephen Hines4d0de132015-03-18 14:53:03 -0700353!41 = !{!"uint", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700354define void @rsSetElementAtImpl_uint(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
355 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700356 %2 = bitcast i8* %1 to i32*
357 store i32 %val, i32* %2, align 4, !tbaa !41
358 ret void
359}
360
Tim Murray01ca8a42014-09-24 10:08:25 -0700361define i32 @rsGetElementAtImpl_uint(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
362 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700363 %2 = bitcast i8* %1 to i32*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700364 %3 = load i32, i32* %2, align 4, !tbaa !41
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700365 ret i32 %3
366}
367
Stephen Hines4d0de132015-03-18 14:53:03 -0700368!42 = !{!"uint2", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700369define void @rsSetElementAtImpl_uint2(%struct.rs_allocation* nocapture readonly %a, <2 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
370 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700371 %2 = bitcast i8* %1 to <2 x i32>*
372 store <2 x i32> %val, <2 x i32>* %2, align 8, !tbaa !42
373 ret void
374}
375
Tim Murray01ca8a42014-09-24 10:08:25 -0700376define <2 x i32> @rsGetElementAtImpl_uint2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
377 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700378 %2 = bitcast i8* %1 to <2 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700379 %3 = load <2 x i32>, <2 x i32>* %2, align 8, !tbaa !42
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700380 ret <2 x i32> %3
381}
382
Stephen Hines4d0de132015-03-18 14:53:03 -0700383!43 = !{!"uint3", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700384define void @rsSetElementAtImpl_uint3(%struct.rs_allocation* nocapture readonly %a, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
385 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
386 %2 = shufflevector <4 x i32> %val, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700387 %3 = bitcast i8* %1 to <4 x i32>*
388 store <4 x i32> %2, <4 x i32>* %3, align 16, !tbaa !43
389 ret void
390}
391
Tim Murray01ca8a42014-09-24 10:08:25 -0700392define <3 x i32> @rsGetElementAtImpl_uint3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
393 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700394 %2 = bitcast i8* %1 to <4 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700395 %3 = load <4 x i32>, <4 x i32>* %2, align 8, !tbaa !43
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700396 %4 = shufflevector <4 x i32> %3, <4 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
397 ret <3 x i32> %4
398}
399
Stephen Hines4d0de132015-03-18 14:53:03 -0700400!44 = !{!"uint4", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700401define void @rsSetElementAtImpl_uint4(%struct.rs_allocation* nocapture readonly %a, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
402 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700403 %2 = bitcast i8* %1 to <4 x i32>*
404 store <4 x i32> %val, <4 x i32>* %2, align 16, !tbaa !44
405 ret void
406}
407
Tim Murray01ca8a42014-09-24 10:08:25 -0700408define <4 x i32> @rsGetElementAtImpl_uint4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
409 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700410 %2 = bitcast i8* %1 to <4 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700411 %3 = load <4 x i32>, <4 x i32>* %2, align 16, !tbaa !44
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700412 ret <4 x i32> %3
413}
414
Stephen Hines4d0de132015-03-18 14:53:03 -0700415!45 = !{!"long", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700416define void @rsSetElementAtImpl_long(%struct.rs_allocation* nocapture readonly %a, i64 %val, i32 %x, i32 %y, i32 %z) #1 {
417 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700418 %2 = bitcast i8* %1 to i64*
419 store i64 %val, i64* %2, align 8, !tbaa !45
420 ret void
421}
422
Tim Murray01ca8a42014-09-24 10:08:25 -0700423define i64 @rsGetElementAtImpl_long(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
424 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700425 %2 = bitcast i8* %1 to i64*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700426 %3 = load i64, i64* %2, align 8, !tbaa !45
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700427 ret i64 %3
428}
429
Stephen Hines4d0de132015-03-18 14:53:03 -0700430!46 = !{!"long2", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700431define void @rsSetElementAtImpl_long2(%struct.rs_allocation* nocapture readonly %a, <2 x i64> %val, i32 %x, i32 %y, i32 %z) #1 {
432 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700433 %2 = bitcast i8* %1 to <2 x i64>*
434 store <2 x i64> %val, <2 x i64>* %2, align 16, !tbaa !46
435 ret void
436}
437
Tim Murray01ca8a42014-09-24 10:08:25 -0700438define <2 x i64> @rsGetElementAtImpl_long2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
439 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700440 %2 = bitcast i8* %1 to <2 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700441 %3 = load <2 x i64>, <2 x i64>* %2, align 16, !tbaa !46
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700442 ret <2 x i64> %3
443}
444
Stephen Hines4d0de132015-03-18 14:53:03 -0700445!47 = !{!"long3", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700446define void @rsSetElementAtImpl_long3(%struct.rs_allocation* nocapture readonly %a, <3 x i64>* %val, i32 %x, i32 %y, i32 %z) #1 {
447 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700448 %2 = load <3 x i64>, <3 x i64>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -0700449 %3 = shufflevector <3 x i64> %2, <3 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
450 %4 = bitcast i8* %1 to <4 x i64>*
451 store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !47
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700452 ret void
453}
454
Tim Murray01ca8a42014-09-24 10:08:25 -0700455define void @rsGetElementAtImpl_long3(<3 x i64>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
456 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700457 %2 = bitcast i8* %1 to <4 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700458 %3 = load <4 x i64>, <4 x i64>* %2, align 32
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700459 %4 = bitcast <3 x i64>* %agg.result to <4 x i64>*
460 store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !47
461 ret void
462}
463
Stephen Hines4d0de132015-03-18 14:53:03 -0700464!48 = !{!"long4", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700465define void @rsSetElementAtImpl_long4(%struct.rs_allocation* nocapture readonly %a, <4 x i64>* %val, i32 %x, i32 %y, i32 %z) #1 {
466 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700467 %2 = load <4 x i64>, <4 x i64>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -0700468 %3 = bitcast i8* %1 to <4 x i64>*
469 store <4 x i64> %2, <4 x i64>* %3, align 32, !tbaa !48
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700470 ret void
471}
472
Tim Murray01ca8a42014-09-24 10:08:25 -0700473define void @rsGetElementAtImpl_long4(<4 x i64>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
474 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700475 %2 = bitcast i8* %1 to <4 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700476 %3 = load <4 x i64>, <4 x i64>* %2, align 32, !tbaa !15
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700477 store <4 x i64> %3, <4 x i64>* %agg.result, align 32, !tbaa !48
478 ret void
479}
480
Stephen Hines4d0de132015-03-18 14:53:03 -0700481!49 = !{!"ulong", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700482define void @rsSetElementAtImpl_ulong(%struct.rs_allocation* nocapture readonly %a, i64 %val, i32 %x, i32 %y, i32 %z) #1 {
483 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700484 %2 = bitcast i8* %1 to i64*
485 store i64 %val, i64* %2, align 8, !tbaa !49
486 ret void
487}
488
Tim Murray01ca8a42014-09-24 10:08:25 -0700489define i64 @rsGetElementAtImpl_ulong(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
490 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700491 %2 = bitcast i8* %1 to i64*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700492 %3 = load i64, i64* %2, align 8, !tbaa !49
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700493 ret i64 %3
494}
495
Stephen Hines4d0de132015-03-18 14:53:03 -0700496!50 = !{!"ulong2", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700497define void @rsSetElementAtImpl_ulong2(%struct.rs_allocation* nocapture readonly %a, <2 x i64> %val, i32 %x, i32 %y, i32 %z) #1 {
498 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700499 %2 = bitcast i8* %1 to <2 x i64>*
500 store <2 x i64> %val, <2 x i64>* %2, align 16, !tbaa !50
501 ret void
502}
503
Tim Murray01ca8a42014-09-24 10:08:25 -0700504define <2 x i64> @rsGetElementAtImpl_ulong2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
505 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700506 %2 = bitcast i8* %1 to <2 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700507 %3 = load <2 x i64>, <2 x i64>* %2, align 16, !tbaa !50
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700508 ret <2 x i64> %3
509}
510
Stephen Hines4d0de132015-03-18 14:53:03 -0700511!51 = !{!"ulong3", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700512define void @rsSetElementAtImpl_ulong3(%struct.rs_allocation* nocapture readonly %a, <3 x i64>* %val, i32 %x, i32 %y, i32 %z) #1 {
513 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700514 %2 = load <3 x i64>, <3 x i64>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -0700515 %3 = shufflevector <3 x i64> %2, <3 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
516 %4 = bitcast i8* %1 to <4 x i64>*
Pirama Arumuga Nainar501f4332016-02-11 15:17:23 -0800517 store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !51
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700518 ret void
519}
520
Tim Murray01ca8a42014-09-24 10:08:25 -0700521define void @rsGetElementAtImpl_ulong3(<3 x i64>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
522 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700523 %2 = bitcast i8* %1 to <4 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700524 %3 = load <4 x i64>, <4 x i64>* %2, align 32
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700525 %4 = bitcast <3 x i64>* %agg.result to <4 x i64>*
526 store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !51
527 ret void
528}
529
Stephen Hines4d0de132015-03-18 14:53:03 -0700530!52 = !{!"ulong4", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700531define void @rsSetElementAtImpl_ulong4(%struct.rs_allocation* nocapture readonly %a, <4 x i64>* %val, i32 %x, i32 %y, i32 %z) #1 {
532 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700533 %2 = load <4 x i64>, <4 x i64>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -0700534 %3 = bitcast i8* %1 to <4 x i64>*
535 store <4 x i64> %2, <4 x i64>* %3, align 32, !tbaa !52
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700536 ret void
537}
538
Tim Murray01ca8a42014-09-24 10:08:25 -0700539define void @rsGetElementAtImpl_ulong4(<4 x i64>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
540 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700541 %2 = bitcast i8* %1 to <4 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700542 %3 = load <4 x i64>, <4 x i64>* %2, align 32, !tbaa !15
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700543 store <4 x i64> %3, <4 x i64>* %agg.result, align 32, !tbaa !52
544 ret void
545}
546
Stephen Hines4d0de132015-03-18 14:53:03 -0700547!53 = !{!"float", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700548define void @rsSetElementAtImpl_float(%struct.rs_allocation* nocapture readonly %a, float %val, i32 %x, i32 %y, i32 %z) #1 {
549 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700550 %2 = bitcast i8* %1 to float*
551 store float %val, float* %2, align 4, !tbaa !53
552 ret void
553}
554
Tim Murray01ca8a42014-09-24 10:08:25 -0700555define float @rsGetElementAtImpl_float(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
556 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 4, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700557 %2 = bitcast i8* %1 to float*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700558 %3 = load float, float* %2, align 4, !tbaa !53
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700559 ret float %3
560}
561
Stephen Hines4d0de132015-03-18 14:53:03 -0700562!54 = !{!"float2", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700563define void @rsSetElementAtImpl_float2(%struct.rs_allocation* nocapture readonly %a, <2 x float> %val, i32 %x, i32 %y, i32 %z) #1 {
564 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700565 %2 = bitcast i8* %1 to <2 x float>*
566 store <2 x float> %val, <2 x float>* %2, align 8, !tbaa !54
567 ret void
568}
569
Tim Murray01ca8a42014-09-24 10:08:25 -0700570define <2 x float> @rsGetElementAtImpl_float2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
571 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700572 %2 = bitcast i8* %1 to <2 x float>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700573 %3 = load <2 x float>, <2 x float>* %2, align 8, !tbaa !54
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700574 ret <2 x float> %3
575}
576
Stephen Hines4d0de132015-03-18 14:53:03 -0700577!55 = !{!"float3", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700578define void @rsSetElementAtImpl_float3(%struct.rs_allocation* nocapture readonly %a, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
579 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
580 %2 = bitcast <4 x i32> %val to <4 x float>
581 %3 = shufflevector <4 x float> %2, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
582 %4 = bitcast i8* %1 to <4 x float>*
583 store <4 x float> %3, <4 x float>* %4, align 16, !tbaa !55
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700584 ret void
585}
586
Tim Murray01ca8a42014-09-24 10:08:25 -0700587define <3 x float> @rsGetElementAtImpl_float3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
588 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700589 %2 = bitcast i8* %1 to <4 x float>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700590 %3 = load <4 x float>, <4 x float>* %2, align 8, !tbaa !55
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700591 %4 = shufflevector <4 x float> %3, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
592 ret <3 x float> %4
593}
594
Stephen Hines4d0de132015-03-18 14:53:03 -0700595!56 = !{!"float4", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700596define void @rsSetElementAtImpl_float4(%struct.rs_allocation* nocapture readonly %a, <4 x float> %val, i32 %x, i32 %y, i32 %z) #1 {
597 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700598 %2 = bitcast i8* %1 to <4 x float>*
599 store <4 x float> %val, <4 x float>* %2, align 16, !tbaa !56
600 ret void
601}
602
Tim Murray01ca8a42014-09-24 10:08:25 -0700603define <4 x float> @rsGetElementAtImpl_float4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
604 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700605 %2 = bitcast i8* %1 to <4 x float>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700606 %3 = load <4 x float>, <4 x float>* %2, align 16, !tbaa !56
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700607 ret <4 x float> %3
608}
609
Stephen Hines4d0de132015-03-18 14:53:03 -0700610!57 = !{!"double", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700611define void @rsSetElementAtImpl_double(%struct.rs_allocation* nocapture readonly %a, double %val, i32 %x, i32 %y, i32 %z) #1 {
612 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700613 %2 = bitcast i8* %1 to double*
614 store double %val, double* %2, align 8, !tbaa !57
615 ret void
616}
617
Tim Murray01ca8a42014-09-24 10:08:25 -0700618define double @rsGetElementAtImpl_double(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
619 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 8, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700620 %2 = bitcast i8* %1 to double*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700621 %3 = load double, double* %2, align 8, !tbaa !57
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700622 ret double %3
623}
624
Stephen Hines4d0de132015-03-18 14:53:03 -0700625!58 = !{!"double2", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700626define void @rsSetElementAtImpl_double2(%struct.rs_allocation* nocapture readonly %a, <2 x double> %val, i32 %x, i32 %y, i32 %z) #1 {
627 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700628 %2 = bitcast i8* %1 to <2 x double>*
629 store <2 x double> %val, <2 x double>* %2, align 16, !tbaa !58
630 ret void
631}
632
Tim Murray01ca8a42014-09-24 10:08:25 -0700633define <2 x double> @rsGetElementAtImpl_double2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
634 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 16, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700635 %2 = bitcast i8* %1 to <2 x double>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700636 %3 = load <2 x double>, <2 x double>* %2, align 16, !tbaa !58
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700637 ret <2 x double> %3
638}
639
Stephen Hines4d0de132015-03-18 14:53:03 -0700640!59 = !{!"double3", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700641define void @rsSetElementAtImpl_double3(%struct.rs_allocation* nocapture readonly %a, <3 x double>* %val, i32 %x, i32 %y, i32 %z) #1 {
642 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700643 %2 = load <3 x double>, <3 x double>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -0700644 %3 = shufflevector <3 x double> %2, <3 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
645 %4 = bitcast i8* %1 to <4 x double>*
Pirama Arumuga Nainar501f4332016-02-11 15:17:23 -0800646 store <4 x double> %3, <4 x double>* %4, align 32, !tbaa !59
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700647 ret void
648}
649
650
Tim Murray01ca8a42014-09-24 10:08:25 -0700651define void @rsGetElementAtImpl_double3(<3 x double>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
652 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700653 %2 = bitcast i8* %1 to <4 x double>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700654 %3 = load <4 x double>, <4 x double>* %2, align 32
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700655 %4 = bitcast <3 x double>* %agg.result to <4 x double>*
656 store <4 x double> %3, <4 x double>* %4, align 32, !tbaa !59
657 ret void
658}
659
Stephen Hines4d0de132015-03-18 14:53:03 -0700660!60 = !{!"double4", !15}
Tim Murray01ca8a42014-09-24 10:08:25 -0700661define void @rsSetElementAtImpl_double4(%struct.rs_allocation* nocapture readonly %a, <4 x double>* %val, i32 %x, i32 %y, i32 %z) #1 {
662 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700663 %2 = load <4 x double>, <4 x double>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -0700664 %3 = bitcast i8* %1 to <4 x double>*
665 store <4 x double> %2, <4 x double>* %3, align 32, !tbaa !60
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700666 ret void
667}
Tim Murray01ca8a42014-09-24 10:08:25 -0700668define void @rsGetElementAtImpl_double4(<4 x double>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
669 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 32, i32 %x, i32 %y, i32 %z) #2
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700670 %2 = bitcast i8* %1 to <4 x double>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700671 %3 = load <4 x double>, <4 x double>* %2, align 32, !tbaa !15
Tobias Grosser1ed5ef92013-07-29 11:39:38 -0700672 store <4 x double> %3, <4 x double>* %agg.result, align 32, !tbaa !60
673 ret void
674}
675
Pirama Arumuga Nainar2dcbc3d2015-04-07 10:32:17 -0700676!61 = !{!"half", !15}
677define void @rsSetElementAtImpl_half(%struct.rs_allocation* nocapture readonly %a.coerce, half %val, i32 %x, i32 %y, i32 %z) #1 {
678 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a.coerce, i32 2, i32 %x, i32 %y, i32 %z) #2
679 %2 = bitcast i8* %1 to half*
680 store half %val, half* %2, align 2, !tbaa !61
681 ret void
682}
683
684define half @rsGetElementAtImpl_half(%struct.rs_allocation* nocapture readonly %a.coerce, i32 %x, i32 %y, i32 %z) #0 {
685 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a.coerce, i32 2, i32 %x, i32 %y, i32 %z) #2
686 %2 = bitcast i8* %1 to half*
687 %3 = load half, half* %2, align 2, !tbaa !61
688 ret half %3
689}
690
691!62 = !{!"half2", !15}
Yang Nifb709342017-05-16 14:20:03 -0700692define void @rsSetElementAtImpl_half2(%struct.rs_allocation* nocapture readonly %a.coerce, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
Pirama Arumuga Nainar2dcbc3d2015-04-07 10:32:17 -0700693 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #2
694 %2 = bitcast i8* %1 to <2 x half>*
Yang Nifb709342017-05-16 14:20:03 -0700695 %3 = bitcast i32 %val to <2 x half>
696 store <2 x half> %3, <2 x half>* %2, align 4, !tbaa !62
Pirama Arumuga Nainar2dcbc3d2015-04-07 10:32:17 -0700697 ret void
698}
699
700define <2 x half> @rsGetElementAtImpl_half2(%struct.rs_allocation* nocapture readonly %a.coerce, i32 %x, i32 %y, i32 %z) #0 {
701 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a.coerce, i32 4, i32 %x, i32 %y, i32 %z) #2
702 %2 = bitcast i8* %1 to <2 x half>*
703 %3 = load <2 x half>, <2 x half>* %2, align 4, !tbaa !62
704 ret <2 x half> %3
705}
706
707!63 = !{!"half3", !15}
Pirama Arumuga Nainar5d6fa392016-02-11 14:20:17 -0800708define void @rsSetElementAtImpl_half3(%struct.rs_allocation* nocapture readonly %a.coerce, <2 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
Pirama Arumuga Nainar2dcbc3d2015-04-07 10:32:17 -0700709 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar5d6fa392016-02-11 14:20:17 -0800710 %2 = bitcast <2 x i32> %val to <4 x half>
711 %3 = shufflevector <4 x half> %2, <4 x half> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
712 %4 = bitcast i8* %1 to <4 x half>*
713 store <4 x half> %3, <4 x half>* %4, align 8, !tbaa !63
Pirama Arumuga Nainar2dcbc3d2015-04-07 10:32:17 -0700714 ret void
715}
716
Pirama Arumuga Nainarf1ce4be2015-08-17 13:06:12 -0700717define <3 x half> @rsGetElementAtImpl_half3(%struct.rs_allocation* nocapture readonly %a.coerce, i32 %x, i32 %y, i32 %z) #1 {
718 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar2dcbc3d2015-04-07 10:32:17 -0700719 %2 = bitcast i8* %1 to <4 x half>*
Pirama Arumuga Nainarf1ce4be2015-08-17 13:06:12 -0700720 %3 = load <4 x half>, <4 x half>* %2, align 8, !tbaa !63
721 %4 = shufflevector <4 x half> %3, <4 x half> undef, <3 x i32> <i32 0, i32 1, i32 2>
722 ret <3 x half> %4
Pirama Arumuga Nainar2dcbc3d2015-04-07 10:32:17 -0700723}
724
725!64 = !{!"half4", !15}
726define void @rsSetElementAtImpl_half4(%struct.rs_allocation* nocapture readonly %a.coerce, <4 x half> %val, i32 %x, i32 %y, i32 %z) #1 {
Pirama Arumuga Nainarf1ce4be2015-08-17 13:06:12 -0700727 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar2dcbc3d2015-04-07 10:32:17 -0700728 %2 = bitcast i8* %1 to <4 x half>*
729 store <4 x half> %val, <4 x half>* %2, align 8, !tbaa !64
730 ret void
731}
732
733define <4 x half> @rsGetElementAtImpl_half4(%struct.rs_allocation* nocapture readonly %a.coerce, i32 %x, i32 %y, i32 %z) #0 {
734 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a.coerce, i32 8, i32 %x, i32 %y, i32 %z) #2
735 %2 = bitcast i8* %1 to <4 x half>*
736 %3 = load <4 x half>, <4 x half>* %2, align 8, !tbaa !64
737 ret <4 x half> %3
738}
739
Jason Sams41660c42014-02-28 16:08:18 -0800740
Tim Murrayacff9f22014-10-15 11:14:06 -0700741define void @__rsAllocationVLoadXImpl_long4(<4 x i64>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -0700742 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800743 %2 = bitcast i8* %1 to <4 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700744 %3 = load <4 x i64>, <4 x i64>* %2, align 8
Tim Murray01ca8a42014-09-24 10:08:25 -0700745 store <4 x i64> %3, <4 x i64>* %agg.result
746 ret void
Jason Sams41660c42014-02-28 16:08:18 -0800747}
Tim Murrayacff9f22014-10-15 11:14:06 -0700748define void @__rsAllocationVLoadXImpl_long3(<3 x i64>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -0700749 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800750 %2 = bitcast i8* %1 to <3 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700751 %3 = load <3 x i64>, <3 x i64>* %2, align 8
Tim Murray01ca8a42014-09-24 10:08:25 -0700752 store <3 x i64> %3, <3 x i64>* %agg.result
753 ret void
Jason Sams41660c42014-02-28 16:08:18 -0800754}
Tim Murray01ca8a42014-09-24 10:08:25 -0700755define <2 x i64> @__rsAllocationVLoadXImpl_long2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
756 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800757 %2 = bitcast i8* %1 to <2 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700758 %3 = load <2 x i64>, <2 x i64>* %2, align 8
Jason Sams41660c42014-02-28 16:08:18 -0800759 ret <2 x i64> %3
760}
761
Tim Murrayacff9f22014-10-15 11:14:06 -0700762define void @__rsAllocationVLoadXImpl_ulong4(<4 x i64>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -0700763 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800764 %2 = bitcast i8* %1 to <4 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700765 %3 = load <4 x i64>, <4 x i64>* %2, align 8
Tim Murray01ca8a42014-09-24 10:08:25 -0700766 store <4 x i64> %3, <4 x i64>* %agg.result
767 ret void
Jason Sams41660c42014-02-28 16:08:18 -0800768}
Tim Murrayacff9f22014-10-15 11:14:06 -0700769define void @__rsAllocationVLoadXImpl_ulong3(<3 x i64>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -0700770 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800771 %2 = bitcast i8* %1 to <3 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700772 %3 = load <3 x i64>, <3 x i64>* %2, align 8
Tim Murray01ca8a42014-09-24 10:08:25 -0700773 store <3 x i64> %3, <3 x i64>* %agg.result
774 ret void
Jason Sams41660c42014-02-28 16:08:18 -0800775}
Tim Murray01ca8a42014-09-24 10:08:25 -0700776define <2 x i64> @__rsAllocationVLoadXImpl_ulong2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
777 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800778 %2 = bitcast i8* %1 to <2 x i64>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700779 %3 = load <2 x i64>, <2 x i64>* %2, align 8
Jason Sams41660c42014-02-28 16:08:18 -0800780 ret <2 x i64> %3
781}
782
Tim Murray01ca8a42014-09-24 10:08:25 -0700783define <4 x i32> @__rsAllocationVLoadXImpl_int4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
784 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800785 %2 = bitcast i8* %1 to <4 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700786 %3 = load <4 x i32>, <4 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800787 ret <4 x i32> %3
788}
Tim Murray01ca8a42014-09-24 10:08:25 -0700789define <3 x i32> @__rsAllocationVLoadXImpl_int3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
790 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800791 %2 = bitcast i8* %1 to <3 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700792 %3 = load <3 x i32>, <3 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800793 ret <3 x i32> %3
794}
Tim Murray01ca8a42014-09-24 10:08:25 -0700795define <2 x i32> @__rsAllocationVLoadXImpl_int2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
796 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800797 %2 = bitcast i8* %1 to <2 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700798 %3 = load <2 x i32>, <2 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800799 ret <2 x i32> %3
800}
801
Tim Murray01ca8a42014-09-24 10:08:25 -0700802define <4 x i32> @__rsAllocationVLoadXImpl_uint4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
803 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800804 %2 = bitcast i8* %1 to <4 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700805 %3 = load <4 x i32>, <4 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800806 ret <4 x i32> %3
807}
Tim Murray01ca8a42014-09-24 10:08:25 -0700808define <3 x i32> @__rsAllocationVLoadXImpl_uint3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
809 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800810 %2 = bitcast i8* %1 to <3 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700811 %3 = load <3 x i32>, <3 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800812 ret <3 x i32> %3
813}
Tim Murray01ca8a42014-09-24 10:08:25 -0700814define <2 x i32> @__rsAllocationVLoadXImpl_uint2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
815 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800816 %2 = bitcast i8* %1 to <2 x i32>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700817 %3 = load <2 x i32>, <2 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800818 ret <2 x i32> %3
819}
820
Tim Murray01ca8a42014-09-24 10:08:25 -0700821define <4 x i16> @__rsAllocationVLoadXImpl_short4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
822 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800823 %2 = bitcast i8* %1 to <4 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700824 %3 = load <4 x i16>, <4 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -0800825 ret <4 x i16> %3
826}
Tim Murray01ca8a42014-09-24 10:08:25 -0700827define <3 x i16> @__rsAllocationVLoadXImpl_short3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
828 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800829 %2 = bitcast i8* %1 to <3 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700830 %3 = load <3 x i16>, <3 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -0800831 ret <3 x i16> %3
832}
Tim Murray01ca8a42014-09-24 10:08:25 -0700833define <2 x i16> @__rsAllocationVLoadXImpl_short2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
834 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800835 %2 = bitcast i8* %1 to <2 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700836 %3 = load <2 x i16>, <2 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -0800837 ret <2 x i16> %3
838}
839
Tim Murray01ca8a42014-09-24 10:08:25 -0700840define <4 x i16> @__rsAllocationVLoadXImpl_ushort4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
841 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800842 %2 = bitcast i8* %1 to <4 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700843 %3 = load <4 x i16>, <4 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -0800844 ret <4 x i16> %3
845}
Tim Murray01ca8a42014-09-24 10:08:25 -0700846define <3 x i16> @__rsAllocationVLoadXImpl_ushort3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
847 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800848 %2 = bitcast i8* %1 to <3 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700849 %3 = load <3 x i16>, <3 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -0800850 ret <3 x i16> %3
851}
Tim Murray01ca8a42014-09-24 10:08:25 -0700852define <2 x i16> @__rsAllocationVLoadXImpl_ushort2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
853 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800854 %2 = bitcast i8* %1 to <2 x i16>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700855 %3 = load <2 x i16>, <2 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -0800856 ret <2 x i16> %3
857}
858
Tim Murray01ca8a42014-09-24 10:08:25 -0700859define <4 x i8> @__rsAllocationVLoadXImpl_char4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
860 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800861 %2 = bitcast i8* %1 to <4 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700862 %3 = load <4 x i8>, <4 x i8>* %2, align 1
Jason Sams41660c42014-02-28 16:08:18 -0800863 ret <4 x i8> %3
864}
Tim Murray01ca8a42014-09-24 10:08:25 -0700865define <3 x i8> @__rsAllocationVLoadXImpl_char3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
866 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800867 %2 = bitcast i8* %1 to <3 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700868 %3 = load <3 x i8>, <3 x i8>* %2, align 1
Jason Sams41660c42014-02-28 16:08:18 -0800869 ret <3 x i8> %3
870}
Tim Murray01ca8a42014-09-24 10:08:25 -0700871define <2 x i8> @__rsAllocationVLoadXImpl_char2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
872 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800873 %2 = bitcast i8* %1 to <2 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700874 %3 = load <2 x i8>, <2 x i8>* %2, align 1
Jason Sams41660c42014-02-28 16:08:18 -0800875 ret <2 x i8> %3
876}
877
Tim Murray01ca8a42014-09-24 10:08:25 -0700878define <4 x i8> @__rsAllocationVLoadXImpl_uchar4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
879 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800880 %2 = bitcast i8* %1 to <4 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700881 %3 = load <4 x i8>, <4 x i8>* %2, align 1
Jason Sams41660c42014-02-28 16:08:18 -0800882 ret <4 x i8> %3
883}
Tim Murray01ca8a42014-09-24 10:08:25 -0700884define <3 x i8> @__rsAllocationVLoadXImpl_uchar3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
885 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800886 %2 = bitcast i8* %1 to <3 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700887 %3 = load <3 x i8>, <3 x i8>* %2, align 1
Jason Sams41660c42014-02-28 16:08:18 -0800888 ret <3 x i8> %3
889}
Tim Murray01ca8a42014-09-24 10:08:25 -0700890define <2 x i8> @__rsAllocationVLoadXImpl_uchar2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
891 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800892 %2 = bitcast i8* %1 to <2 x i8>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700893 %3 = load <2 x i8>, <2 x i8>* %2, align 1
Jason Sams41660c42014-02-28 16:08:18 -0800894 ret <2 x i8> %3
895}
896
Tim Murray01ca8a42014-09-24 10:08:25 -0700897define <4 x float> @__rsAllocationVLoadXImpl_float4(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
898 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800899 %2 = bitcast i8* %1 to <4 x float>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700900 %3 = load <4 x float>, <4 x float>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800901 ret <4 x float> %3
902}
Tim Murray01ca8a42014-09-24 10:08:25 -0700903define <3 x float> @__rsAllocationVLoadXImpl_float3(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
904 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800905 %2 = bitcast i8* %1 to <3 x float>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700906 %3 = load <3 x float>, <3 x float>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800907 ret <3 x float> %3
908}
Tim Murray01ca8a42014-09-24 10:08:25 -0700909define <2 x float> @__rsAllocationVLoadXImpl_float2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
910 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800911 %2 = bitcast i8* %1 to <2 x float>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700912 %3 = load <2 x float>, <2 x float>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800913 ret <2 x float> %3
914}
915
Tim Murrayacff9f22014-10-15 11:14:06 -0700916define void @__rsAllocationVLoadXImpl_double4(<4 x double>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -0700917 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800918 %2 = bitcast i8* %1 to <4 x double>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700919 %3 = load <4 x double>, <4 x double>* %2, align 8
Tim Murray01ca8a42014-09-24 10:08:25 -0700920 store <4 x double> %3, <4 x double>* %agg.result
921 ret void
Jason Sams41660c42014-02-28 16:08:18 -0800922}
Tim Murrayacff9f22014-10-15 11:14:06 -0700923define void @__rsAllocationVLoadXImpl_double3(<3 x double>* noalias nocapture sret %agg.result, %struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -0700924 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800925 %2 = bitcast i8* %1 to <3 x double>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700926 %3 = load <3 x double>, <3 x double>* %2, align 8
Tim Murray01ca8a42014-09-24 10:08:25 -0700927 store <3 x double> %3, <3 x double>* %agg.result
928 ret void
Jason Sams41660c42014-02-28 16:08:18 -0800929}
Tim Murray01ca8a42014-09-24 10:08:25 -0700930define <2 x double> @__rsAllocationVLoadXImpl_double2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z) #0 {
931 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800932 %2 = bitcast i8* %1 to <2 x double>*
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700933 %3 = load <2 x double>, <2 x double>* %2, align 8
Jason Sams41660c42014-02-28 16:08:18 -0800934 ret <2 x double> %3
935}
936
937
Tim Murray01ca8a42014-09-24 10:08:25 -0700938define void @__rsAllocationVStoreXImpl_long4(%struct.rs_allocation* nocapture readonly %a, <4 x i64>* %val, i32 %x, i32 %y, i32 %z) #1 {
939 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700940 %2 = load <4 x i64>, <4 x i64>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -0700941 %3 = bitcast i8* %1 to <4 x i64>*
942 store <4 x i64> %2, <4 x i64>* %3, align 8
Jason Sams41660c42014-02-28 16:08:18 -0800943 ret void
944}
Tim Murray01ca8a42014-09-24 10:08:25 -0700945define void @__rsAllocationVStoreXImpl_long3(%struct.rs_allocation* nocapture readonly %a, <3 x i64>* %val, i32 %x, i32 %y, i32 %z) #1 {
946 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700947 %2 = load <3 x i64>, <3 x i64>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -0700948 %3 = bitcast i8* %1 to <3 x i64>*
949 store <3 x i64> %2, <3 x i64>* %3, align 8
Jason Sams41660c42014-02-28 16:08:18 -0800950 ret void
951}
Tim Murray01ca8a42014-09-24 10:08:25 -0700952define void @__rsAllocationVStoreXImpl_long2(%struct.rs_allocation* nocapture readonly %a, <2 x i64> %val, i32 %x, i32 %y, i32 %z) #1 {
953 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800954 %2 = bitcast i8* %1 to <2 x i64>*
955 store <2 x i64> %val, <2 x i64>* %2, align 8
956 ret void
957}
958
Tim Murray01ca8a42014-09-24 10:08:25 -0700959define void @__rsAllocationVStoreXImpl_ulong4(%struct.rs_allocation* nocapture readonly %a, <4 x i64>* %val, i32 %x, i32 %y, i32 %z) #1 {
960 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700961 %2 = load <4 x i64>, <4 x i64>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -0700962 %3 = bitcast i8* %1 to <4 x i64>*
963 store <4 x i64> %2, <4 x i64>* %3, align 8
Jason Sams41660c42014-02-28 16:08:18 -0800964 ret void
965}
Tim Murray01ca8a42014-09-24 10:08:25 -0700966define void @__rsAllocationVStoreXImpl_ulong3(%struct.rs_allocation* nocapture readonly %a, <3 x i64>* %val, i32 %x, i32 %y, i32 %z) #1 {
967 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -0700968 %2 = load <3 x i64>, <3 x i64>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -0700969 %3 = bitcast i8* %1 to <3 x i64>*
970 store <3 x i64> %2, <3 x i64>* %3, align 8
Jason Sams41660c42014-02-28 16:08:18 -0800971 ret void
972}
Tim Murray01ca8a42014-09-24 10:08:25 -0700973define void @__rsAllocationVStoreXImpl_ulong2(%struct.rs_allocation* nocapture readonly %a, <2 x i64> %val, i32 %x, i32 %y, i32 %z) #1 {
974 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800975 %2 = bitcast i8* %1 to <2 x i64>*
976 store <2 x i64> %val, <2 x i64>* %2, align 8
977 ret void
978}
979
Tim Murray01ca8a42014-09-24 10:08:25 -0700980define void @__rsAllocationVStoreXImpl_int4(%struct.rs_allocation* nocapture readonly %a, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
981 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800982 %2 = bitcast i8* %1 to <4 x i32>*
Tim Murray01ca8a42014-09-24 10:08:25 -0700983 store <4 x i32> %val, <4 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800984 ret void
985}
Tim Murray01ca8a42014-09-24 10:08:25 -0700986define void @__rsAllocationVStoreXImpl_int3(%struct.rs_allocation* nocapture readonly %a, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
987 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800988 %2 = bitcast i8* %1 to <3 x i32>*
Tim Murray01ca8a42014-09-24 10:08:25 -0700989 %3 = shufflevector <4 x i32> %val, <4 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
990 store <3 x i32> %3, <3 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800991 ret void
992}
Tim Murray01ca8a42014-09-24 10:08:25 -0700993define void @__rsAllocationVStoreXImpl_int2(%struct.rs_allocation* nocapture readonly %a, <2 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
994 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -0800995 %2 = bitcast i8* %1 to <2 x i32>*
Tim Murray01ca8a42014-09-24 10:08:25 -0700996 store <2 x i32> %val, <2 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -0800997 ret void
998}
999
Tim Murray01ca8a42014-09-24 10:08:25 -07001000define void @__rsAllocationVStoreXImpl_uint4(%struct.rs_allocation* nocapture readonly %a, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
1001 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001002 %2 = bitcast i8* %1 to <4 x i32>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001003 store <4 x i32> %val, <4 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -08001004 ret void
1005}
Tim Murray01ca8a42014-09-24 10:08:25 -07001006define void @__rsAllocationVStoreXImpl_uint3(%struct.rs_allocation* nocapture readonly %a, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
1007 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001008 %2 = bitcast i8* %1 to <3 x i32>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001009 %3 = shufflevector <4 x i32> %val, <4 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
1010 store <3 x i32> %3, <3 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -08001011 ret void
1012}
Tim Murray01ca8a42014-09-24 10:08:25 -07001013define void @__rsAllocationVStoreXImpl_uint2(%struct.rs_allocation* nocapture readonly %a, <2 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
1014 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001015 %2 = bitcast i8* %1 to <2 x i32>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001016 store <2 x i32> %val, <2 x i32>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -08001017 ret void
1018}
1019
Tim Murray01ca8a42014-09-24 10:08:25 -07001020define void @__rsAllocationVStoreXImpl_short4(%struct.rs_allocation* nocapture readonly %a, <4 x i16> %val, i32 %x, i32 %y, i32 %z) #1 {
1021 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001022 %2 = bitcast i8* %1 to <4 x i16>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001023 store <4 x i16> %val, <4 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -08001024 ret void
1025}
Tim Murray01ca8a42014-09-24 10:08:25 -07001026define void @__rsAllocationVStoreXImpl_short3(%struct.rs_allocation* nocapture readonly %a, <2 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
1027 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001028 %2 = bitcast i8* %1 to <3 x i16>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001029 %3 = bitcast <2 x i32> %val to <4 x i16>
1030 %4 = shufflevector <4 x i16> %3, <4 x i16> undef, <3 x i32> <i32 0, i32 1, i32 2>
1031 store <3 x i16> %4, <3 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -08001032 ret void
1033}
Yang Nifb709342017-05-16 14:20:03 -07001034define void @__rsAllocationVStoreXImpl_short2(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -07001035 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001036 %2 = bitcast i8* %1 to <2 x i16>*
Yang Nifb709342017-05-16 14:20:03 -07001037 %3 = bitcast i32 %val to <2 x i16>
1038 store <2 x i16> %3, <2 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -08001039 ret void
1040}
1041
Tim Murray01ca8a42014-09-24 10:08:25 -07001042define void @__rsAllocationVStoreXImpl_ushort4(%struct.rs_allocation* nocapture readonly %a, <4 x i16> %val, i32 %x, i32 %y, i32 %z) #1 {
1043 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001044 %2 = bitcast i8* %1 to <4 x i16>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001045 store <4 x i16> %val, <4 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -08001046 ret void
1047}
Tim Murray01ca8a42014-09-24 10:08:25 -07001048define void @__rsAllocationVStoreXImpl_ushort3(%struct.rs_allocation* nocapture readonly %a, <2 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
1049 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001050 %2 = bitcast i8* %1 to <3 x i16>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001051 %3 = bitcast <2 x i32> %val to <4 x i16>
1052 %4 = shufflevector <4 x i16> %3, <4 x i16> undef, <3 x i32> <i32 0, i32 1, i32 2>
1053 store <3 x i16> %4, <3 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -08001054 ret void
1055}
Yang Nifb709342017-05-16 14:20:03 -07001056define void @__rsAllocationVStoreXImpl_ushort2(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -07001057 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001058 %2 = bitcast i8* %1 to <2 x i16>*
Yang Nifb709342017-05-16 14:20:03 -07001059 %3 = bitcast i32 %val to <2 x i16>
1060 store <2 x i16> %3, <2 x i16>* %2, align 2
Jason Sams41660c42014-02-28 16:08:18 -08001061 ret void
1062}
1063
Yang Nifb709342017-05-16 14:20:03 -07001064define void @__rsAllocationVStoreXImpl_char4(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -07001065 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001066 %2 = bitcast i8* %1 to <4 x i8>*
Yang Nifb709342017-05-16 14:20:03 -07001067 %3 = bitcast i32 %val to <4 x i8>
1068 store <4 x i8> %3, <4 x i8>* %2, align 1
Jason Sams41660c42014-02-28 16:08:18 -08001069 ret void
1070}
Tim Murray01ca8a42014-09-24 10:08:25 -07001071define void @__rsAllocationVStoreXImpl_char3(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
1072 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001073 %2 = bitcast i8* %1 to <3 x i8>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001074 %3 = bitcast i32 %val to <4 x i8>
1075 %4 = shufflevector <4 x i8> %3, <4 x i8> undef, <3 x i32> <i32 0, i32 1, i32 2>
1076 store <3 x i8> %4, <3 x i8>* %2, align 1
Jason Sams41660c42014-02-28 16:08:18 -08001077 ret void
1078}
Tim Murray01ca8a42014-09-24 10:08:25 -07001079define void @__rsAllocationVStoreXImpl_char2(%struct.rs_allocation* nocapture readonly %a, i16 %val, i32 %x, i32 %y, i32 %z) #1 {
1080 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001081 %2 = bitcast i8* %1 to <2 x i8>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001082 %3 = bitcast i16 %val to <2 x i8>
1083 store <2 x i8> %3, <2 x i8>* %2, align 8
Jason Sams41660c42014-02-28 16:08:18 -08001084 ret void
1085}
1086
Yang Nifb709342017-05-16 14:20:03 -07001087define void @__rsAllocationVStoreXImpl_uchar4(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
Tim Murray01ca8a42014-09-24 10:08:25 -07001088 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001089 %2 = bitcast i8* %1 to <4 x i8>*
Yang Nifb709342017-05-16 14:20:03 -07001090 %3 = bitcast i32 %val to <4 x i8>
1091 store <4 x i8> %3, <4 x i8>* %2, align 1
Jason Sams41660c42014-02-28 16:08:18 -08001092 ret void
1093}
Tim Murray01ca8a42014-09-24 10:08:25 -07001094define void @__rsAllocationVStoreXImpl_uchar3(%struct.rs_allocation* nocapture readonly %a, i32 %val, i32 %x, i32 %y, i32 %z) #1 {
1095 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001096 %2 = bitcast i8* %1 to <3 x i8>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001097 %3 = bitcast i32 %val to <4 x i8>
1098 %4 = shufflevector <4 x i8> %3, <4 x i8> undef, <3 x i32> <i32 0, i32 1, i32 2>
1099 store <3 x i8> %4, <3 x i8>* %2, align 1
Jason Sams41660c42014-02-28 16:08:18 -08001100 ret void
1101}
Tim Murray01ca8a42014-09-24 10:08:25 -07001102define void @__rsAllocationVStoreXImpl_uchar2(%struct.rs_allocation* nocapture readonly %a, i16 %val, i32 %x, i32 %y, i32 %z) #1 {
1103 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001104 %2 = bitcast i8* %1 to <2 x i8>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001105 %3 = bitcast i16 %val to <2 x i8>
1106 store <2 x i8> %3, <2 x i8>* %2, align 8
Jason Sams41660c42014-02-28 16:08:18 -08001107 ret void
1108}
1109
Tim Murray01ca8a42014-09-24 10:08:25 -07001110define void @__rsAllocationVStoreXImpl_float4(%struct.rs_allocation* nocapture readonly %a, <4 x float> %val, i32 %x, i32 %y, i32 %z) #1 {
1111 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001112 %2 = bitcast i8* %1 to <4 x float>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001113 store <4 x float> %val, <4 x float>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -08001114 ret void
1115}
Tim Murray01ca8a42014-09-24 10:08:25 -07001116define void @__rsAllocationVStoreXImpl_float3(%struct.rs_allocation* nocapture readonly %a, <4 x i32> %val, i32 %x, i32 %y, i32 %z) #1 {
1117 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001118 %2 = bitcast i8* %1 to <3 x float>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001119 %3 = bitcast <4 x i32> %val to <4 x float>
1120 %4 = shufflevector <4 x float> %3, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
1121 store <3 x float> %4, <3 x float>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -08001122 ret void
1123}
Tim Murray01ca8a42014-09-24 10:08:25 -07001124define void @__rsAllocationVStoreXImpl_float2(%struct.rs_allocation* nocapture readonly %a, <2 x float> %val, i32 %x, i32 %y, i32 %z) #1 {
1125 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001126 %2 = bitcast i8* %1 to <2 x float>*
Tim Murray01ca8a42014-09-24 10:08:25 -07001127 store <2 x float> %val, <2 x float>* %2, align 4
Jason Sams41660c42014-02-28 16:08:18 -08001128 ret void
1129}
1130
Tim Murray01ca8a42014-09-24 10:08:25 -07001131define void @__rsAllocationVStoreXImpl_double4(%struct.rs_allocation* nocapture readonly %a, <4 x double>* %val, i32 %x, i32 %y, i32 %z) #1 {
1132 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -07001133 %2 = load <4 x double>, <4 x double>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -07001134 %3 = bitcast i8* %1 to <4 x double>*
1135 store <4 x double> %2, <4 x double>* %3, align 8
Jason Sams41660c42014-02-28 16:08:18 -08001136 ret void
1137}
Tim Murray01ca8a42014-09-24 10:08:25 -07001138define void @__rsAllocationVStoreXImpl_double3(%struct.rs_allocation* nocapture readonly %a, <3 x double>* %val, i32 %x, i32 %y, i32 %z) #1 {
1139 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Pirama Arumuga Nainar81847392015-04-08 12:35:45 -07001140 %2 = load <3 x double>, <3 x double>* %val
Tim Murray01ca8a42014-09-24 10:08:25 -07001141 %3 = bitcast i8* %1 to <3 x double>*
1142 store <3 x double> %2, <3 x double>* %3, align 8
Jason Sams41660c42014-02-28 16:08:18 -08001143 ret void
1144}
Tim Murray01ca8a42014-09-24 10:08:25 -07001145define void @__rsAllocationVStoreXImpl_double2(%struct.rs_allocation* nocapture readonly %a, <2 x double> %val, i32 %x, i32 %y, i32 %z) #1 {
1146 %1 = tail call i8* @rsOffsetNs(%struct.rs_allocation* %a, i32 %x, i32 %y, i32 %z) #2
Jason Sams41660c42014-02-28 16:08:18 -08001147 %2 = bitcast i8* %1 to <2 x double>*
1148 store <2 x double> %val, <2 x double>* %2, align 8
1149 ret void
1150}
1151
1152
Tobias Grosser1ed5ef92013-07-29 11:39:38 -07001153attributes #0 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
1154attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
Tim Murray01ca8a42014-09-24 10:08:25 -07001155attributes #2 = { nobuiltin }
Tobias Grosser1ed5ef92013-07-29 11:39:38 -07001156