| ############################################################################### |
| #Board Varaints and Versions are defined below: |
| #BOARD_VARIANT_NXPREF 0x01 |
| #BOARD_NXPREF_VERSIONS(0x01, 0x02) |
| |
| #BOARD_VARIANT_CUSTREF1 0x2A |
| #BOARD_CUSTREF1_VERSIONS(0x01,0x02,0x03) |
| |
| UWB_BOARD_VARIANT_CONFIG=0x01 |
| UWB_BOARD_VARIANT_VERSION=0x01 |
| |
| ############################################################################### |
| # Extended CofigID |
| #DELAY_CALIBRATION_VALUE E400 |
| #AOA_CALIBRATION_CTRL E401 |
| #DPD_WAKEUP_SRC E402 |
| #DPD_ENTRY_TIMEOUT E404 |
| #GPIO_USAGE_CONFIG E408 |
| ##Note: Configure the GPIO for multiple purposes depending on usecase ID |
| ## config(E4, 08, 03, 00, 00, 00) |
| ## Length and number of parameter accordingly in the header part. |
| #CLK_CONFIG_CTRL E430 |
| ##Note: Config for clock source selection and refer UCI specification |
| ## for more information. |
| # Refer the NXP UCI specification for below configs |
| #ANTENNA_RX_IDX_DEFINE E460 |
| #ANTENNA_TX_IDX_DEFINE E461 |
| #ANTENNAS_CONFIGURATION_RX E465 |
| |
| UWB_CORE_EXT_DEVICE_DEFAULT_CONFIG={05, |
| E4, 03, 01, b4, |
| E4, 04, 02, f4, 01, |
| E4, 60, 07, 01, 01, 02, 01, 00, 01, 00, |
| E4, 61, 06, 01, 01, 01, 00, 00, 00, |
| E4, 65, 06, 01, 03, 03, 00, 01, 01 |
| } |
| |
| # This config enable/disable the dpd entry prevention ntf config during init |
| # 00 for disable |
| # 01 for enable |
| UWB_DPD_ENTRY_PREVENTION_NTF_CONFIG=0x01 |
| |
| #This config call's suspend to kernel driver on idle |
| #This is only activated when AUTO_SUSPEND_ENABLED=1 |
| #0=disable |
| #1=enable |
| AUTO_SUSPEND_ENABLE=0 |
| #This config defines duration to resume the device before sending any commands |
| AUTO_SUSPEND_TIMEOUT_MS=100 |
| |
| ##Note: Below configs are applicable in User_Mode FW only |
| #WIFI_COEX_FEATURE_ALL_CH 0xF0 |
| ##Note: WIFI_COEX_FEATURE_ALL_CH is disabled by default. |
| ## Octet[0]: Enable/Disable WiFi CoEx feature |
| ## 0x00: Disable (default) |
| ## • b[3:0]: Enable/Disable functionality CoEx |
| ## – 0x1 : Enable CoEx Interface without Debug and without Warning Verbose |
| ## – 0x2 : Enable CoEx Interface with Debug Verbose only |
| ## – 0x3 : Enable CoEx Interface with Warnings Verbose only |
| ## – 0x4 : Enable CoEx Interface with both Debug and Warning Verbose |
| ## • b[7:4]: CoEx Interface (GPIO) selection: |
| ## – 0x0 : GPIO Interface |
| ## – Rest of the values are Reserved |
| ## Octect[1]: Number of channels N Shall be >= 1 (0 will be rejected by UWBS) |
| ## N*4 octets to follow |
| ## Octet[2]: Channel ID |
| ## Octet[3]: MIN_GUARD_DURATION |
| ## Octet[4]: MAX_GRANT_DURATION |
| ## Octet[5]: ADVANCED GRANT DURATION |
| ## Based on requirement add the below configs: |
| ## Enable CH5 - (F0, 06, 01, 01, 05, 3C, 1E, 1E) |
| ## Enable CH9 - (F0, 06, 01, 01, 09, 3C, 1E, 1E) |
| ## Enable both CH5 and CH9 - (F0, 0A, 01, 02, 05, 3C, 1E, 1E, 09, 3C, 1E, 1E) |
| ## |
| ## Update the length and number of parameter accordingly in |
| ## the header part. |
| ## WIFI COEX feature supports only in user binary. |
| #GPIO_USAGE_CONFIG E4 08 |
| ## Customer need to set the DPD_WAKEUP_SOURCE as 02 (GPIO1) before applying |
| ## the GPIO_USAGE_CONFIG command to enable time sync notification feature |
| UWB_USER_FW_BOOT_MODE_CONFIG={20, 04, 00, 13, 02, |
| F0, 06, 00, 01, 05, 3C, 1E, 1E, |
| E4, 02, 01, 00, |
| E4, 08, 03, 00, 00, 00 |
| } |
| |
| # Set system time uncertainty value in microsec for CCC ranging |
| UWB_INITIATION_TIME_DELTA=200000 |
| |
| #LIST OF UWB CAPABILITY INFO NOT RECEIVED FROM UWBS |
| # mapping device caps according to Fira 2.0 |
| # TODO: Remove once FW support available |
| UWB_VENDOR_CAPABILITY={A8, 04, 05, 00, 00, 00, |
| E3, 01, 01, |
| E4, 04, 64, 00, 00, 00, |
| E5, 04, 03, 00, 00, 00, |
| E6, 01, 01, |
| E7, 01, 01, |
| E8, 04, B0, 04, 00, 00, |
| E9, 04, 05, 00, 00, 00, |
| EA, 02, 09, 00, |
| AB, 02, 64, 00, |
| EB, 04, 05, 00, 00, 00 |
| } |
| |
| ############################################################################### |
| # Helios PROD Mode FW version |
| # Make sure you push the Production FW while using this Macro |
| NXP_UWB_PROD_FW_FILENAME="libsr100t_prod_fw.bin" |
| |
| # Helios Dev Mode FW version |
| # Make sure you push the Dev Mode FW while using this Macro |
| NXP_UWB_DEV_FW_FILENAME="libsr100t_dev_fw.bin" |
| ############################################################################### |
| |
| ############################################################################### |
| #enable or disable fw download logging |
| UWB_FW_DOWNLOAD_LOG=0x00 |
| ############################################################################### |
| |
| ############################################################################### |
| #enable or disable delete ursk for ccc session |
| DELETE_URSK_FOR_CCC_SESSION=0x00 |
| ############################################################################### |
| |
| ############################################################################### |
| #enable or disable sts index overriding for ccc session |
| OVERRIDE_STS_INDEX_FOR_CCC_SESSION=0x01 |
| ############################################################################### |
| |
| ############################################################################### |
| # set Crystal calibration settings |
| # byte[0] No Of registers |
| # byte[2-1] 38.4 MHz XTAL CAP1 |
| # byte[4-3] 38.4 MHz XTAL CAP2 |
| # byte[6-5] 38.4 MHz XTAL GM |
| |
| # NXP_UWB_XTAL_38MHZ_CONFIG={2F, 21, 00, 0A, 05, 01, 07, 03, 0F, 00, 0F, 00, 21, 00} |
| |
| ############################################################################### |
| # This config enable/disable the Vendor extended notifications |
| # 00 for disable |
| # 01 for enable |
| NXP_UWB_EXTENDED_NTF_CONFIG={20, 04, 00, 05, 01, E4, 33, 01, 01} |
| |
| ############################################################################### |
| ############################################################################### |
| # Core Device configurations |
| # Below sections needs to be updated with the correct values for needed core device configurations |
| |
| #NXP_CORE_CONF_BLK_1={} |
| |
| #NXP_CORE_CONF_BLK_2={} |
| |
| #NXP_CORE_CONF_BLK_3={} |
| |
| #NXP_CORE_CONF_BLK_4={} |
| |
| #NXP_CORE_CONF_BLK_5={} |
| |
| #NXP_CORE_CONF_BLK_6={} |
| |
| #NXP_CORE_CONF_BLK_7={} |
| |
| #NXP_CORE_CONF_BLK_8={} |
| |
| #NXP_CORE_CONF_BLK_9={} |
| |
| #NXP_CORE_CONF_BLK_10={} |
| |
| |
| NXP_LOG_JNI_LOGLEVEL=0x05 |
| NXP_LOG_UCI_CORE_LOGLEVEL=0x05 |
| NXP_LOG_UCIHAL_LOGLEVEL=0x05 |
| NXP_LOG_FWDNLD_LOGLEVEL=0x05 |
| NXP_LOG_TML_LOGLEVEL=0x05 |
| NXP_LOG_UCIX_LOGLEVEL=0x05 |
| NXP_LOG_UCIR_LOGLEVEL=0x05 |
